2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_crtc.h>
35 #include "intel_connector.h"
37 #include "intel_display_types.h"
38 #include "intel_dvo.h"
39 #include "intel_dvo_dev.h"
40 #include "intel_gmbus.h"
41 #include "intel_panel.h"
43 #define INTEL_DVO_CHIP_NONE 0
44 #define INTEL_DVO_CHIP_LVDS 1
45 #define INTEL_DVO_CHIP_TMDS 2
46 #define INTEL_DVO_CHIP_TVOUT 4
47 #define INTEL_DVO_CHIP_LVDS_NO_FIXED 5
49 #define SIL164_ADDR 0x38
50 #define CH7xxx_ADDR 0x76
51 #define TFP410_ADDR 0x38
52 #define NS2501_ADDR 0x38
54 static const struct intel_dvo_device intel_dvo_devices[] = {
56 .type = INTEL_DVO_CHIP_TMDS,
59 .dvo_srcdim_reg = DVOC_SRCDIM,
60 .slave_addr = SIL164_ADDR,
61 .dev_ops = &sil164_ops,
64 .type = INTEL_DVO_CHIP_TMDS,
67 .dvo_srcdim_reg = DVOC_SRCDIM,
68 .slave_addr = CH7xxx_ADDR,
69 .dev_ops = &ch7xxx_ops,
72 .type = INTEL_DVO_CHIP_TMDS,
75 .dvo_srcdim_reg = DVOC_SRCDIM,
76 .slave_addr = 0x75, /* For some ch7010 */
77 .dev_ops = &ch7xxx_ops,
80 .type = INTEL_DVO_CHIP_LVDS,
83 .dvo_srcdim_reg = DVOA_SRCDIM,
84 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
88 .type = INTEL_DVO_CHIP_TMDS,
91 .dvo_srcdim_reg = DVOC_SRCDIM,
92 .slave_addr = TFP410_ADDR,
93 .dev_ops = &tfp410_ops,
96 .type = INTEL_DVO_CHIP_LVDS,
99 .dvo_srcdim_reg = DVOC_SRCDIM,
101 .gpio = GMBUS_PIN_DPB,
102 .dev_ops = &ch7017_ops,
105 .type = INTEL_DVO_CHIP_LVDS_NO_FIXED,
108 .dvo_srcdim_reg = DVOB_SRCDIM,
109 .slave_addr = NS2501_ADDR,
110 .dev_ops = &ns2501_ops,
115 struct intel_encoder base;
117 struct intel_dvo_device dev;
119 struct intel_connector *attached_connector;
121 bool panel_wants_dither;
124 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
126 return container_of(encoder, struct intel_dvo, base);
129 static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
131 return enc_to_dvo(intel_attached_encoder(connector));
134 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
136 struct drm_device *dev = connector->base.dev;
137 struct drm_i915_private *dev_priv = to_i915(dev);
138 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
141 tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
143 if (!(tmp & DVO_ENABLE))
146 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
149 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
152 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
153 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
156 tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
158 *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT;
160 return tmp & DVO_ENABLE;
163 static void intel_dvo_get_config(struct intel_encoder *encoder,
164 struct intel_crtc_state *pipe_config)
166 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
167 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
170 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
172 tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
173 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
174 flags |= DRM_MODE_FLAG_PHSYNC;
176 flags |= DRM_MODE_FLAG_NHSYNC;
177 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
178 flags |= DRM_MODE_FLAG_PVSYNC;
180 flags |= DRM_MODE_FLAG_NVSYNC;
182 pipe_config->hw.adjusted_mode.flags |= flags;
184 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
187 static void intel_disable_dvo(struct intel_atomic_state *state,
188 struct intel_encoder *encoder,
189 const struct intel_crtc_state *old_crtc_state,
190 const struct drm_connector_state *old_conn_state)
192 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
193 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
194 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
195 u32 temp = intel_de_read(dev_priv, dvo_reg);
197 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
198 intel_de_write(dev_priv, dvo_reg, temp & ~DVO_ENABLE);
199 intel_de_read(dev_priv, dvo_reg);
202 static void intel_enable_dvo(struct intel_atomic_state *state,
203 struct intel_encoder *encoder,
204 const struct intel_crtc_state *pipe_config,
205 const struct drm_connector_state *conn_state)
207 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
208 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
209 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
210 u32 temp = intel_de_read(dev_priv, dvo_reg);
212 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
213 &pipe_config->hw.mode,
214 &pipe_config->hw.adjusted_mode);
216 intel_de_write(dev_priv, dvo_reg, temp | DVO_ENABLE);
217 intel_de_read(dev_priv, dvo_reg);
219 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
222 static enum drm_mode_status
223 intel_dvo_mode_valid(struct drm_connector *connector,
224 struct drm_display_mode *mode)
226 struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector));
227 const struct drm_display_mode *fixed_mode =
228 to_intel_connector(connector)->panel.fixed_mode;
229 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
230 int target_clock = mode->clock;
232 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
233 return MODE_NO_DBLESCAN;
235 /* XXX: Validate clock range */
238 if (mode->hdisplay > fixed_mode->hdisplay)
240 if (mode->vdisplay > fixed_mode->vdisplay)
243 target_clock = fixed_mode->clock;
246 if (target_clock > max_dotclk)
247 return MODE_CLOCK_HIGH;
249 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
252 static int intel_dvo_compute_config(struct intel_encoder *encoder,
253 struct intel_crtc_state *pipe_config,
254 struct drm_connector_state *conn_state)
256 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
257 const struct drm_display_mode *fixed_mode =
258 intel_dvo->attached_connector->panel.fixed_mode;
259 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
262 * If we have timings from the BIOS for the panel, put them in
263 * to the adjusted mode. The CRTC will be set up for this mode,
264 * with the panel scaling set up to source from the H/VDisplay
265 * of the original mode.
268 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
270 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
273 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
278 static void intel_dvo_pre_enable(struct intel_atomic_state *state,
279 struct intel_encoder *encoder,
280 const struct intel_crtc_state *pipe_config,
281 const struct drm_connector_state *conn_state)
283 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
284 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
285 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
286 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
287 enum pipe pipe = crtc->pipe;
289 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
290 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
292 /* Save the data order, since I don't know what it should be set to. */
293 dvo_val = intel_de_read(dev_priv, dvo_reg) &
294 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
295 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
296 DVO_BLANK_ACTIVE_HIGH;
298 dvo_val |= DVO_PIPE_SEL(pipe);
299 dvo_val |= DVO_PIPE_STALL;
300 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
301 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
302 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
303 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
305 intel_de_write(dev_priv, dvo_srcdim_reg,
306 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
307 intel_de_write(dev_priv, dvo_reg, dvo_val);
310 static enum drm_connector_status
311 intel_dvo_detect(struct drm_connector *connector, bool force)
313 struct drm_i915_private *i915 = to_i915(connector->dev);
314 struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector));
316 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
317 connector->base.id, connector->name);
319 if (!INTEL_DISPLAY_ENABLED(i915))
320 return connector_status_disconnected;
322 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
325 static int intel_dvo_get_modes(struct drm_connector *connector)
327 struct drm_i915_private *dev_priv = to_i915(connector->dev);
328 const struct drm_display_mode *fixed_mode =
329 to_intel_connector(connector)->panel.fixed_mode;
333 * We should probably have an i2c driver get_modes function for those
334 * devices which will have a fixed set of modes determined by the chip
335 * (TV-out, for example), but for now with just TMDS and LVDS,
336 * that's not the case.
338 num_modes = intel_ddc_get_modes(connector,
339 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
344 struct drm_display_mode *mode;
346 mode = drm_mode_duplicate(connector->dev, fixed_mode);
348 drm_mode_probed_add(connector, mode);
356 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
357 .detect = intel_dvo_detect,
358 .late_register = intel_connector_register,
359 .early_unregister = intel_connector_unregister,
360 .destroy = intel_connector_destroy,
361 .fill_modes = drm_helper_probe_single_connector_modes,
362 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
363 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
366 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
367 .mode_valid = intel_dvo_mode_valid,
368 .get_modes = intel_dvo_get_modes,
371 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
373 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
375 if (intel_dvo->dev.dev_ops->destroy)
376 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
378 intel_encoder_destroy(encoder);
381 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
382 .destroy = intel_dvo_enc_destroy,
386 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
388 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
389 * chip being on DVOB/C and having multiple pipes.
391 static struct drm_display_mode *
392 intel_dvo_get_current_mode(struct intel_encoder *encoder)
394 struct drm_display_mode *mode;
396 mode = intel_encoder_current_mode(encoder);
398 DRM_DEBUG_KMS("using current (BIOS) mode: ");
399 drm_mode_debug_printmodeline(mode);
400 mode->type |= DRM_MODE_TYPE_PREFERRED;
406 static enum port intel_dvo_port(i915_reg_t dvo_reg)
408 if (i915_mmio_reg_equal(dvo_reg, DVOA))
410 else if (i915_mmio_reg_equal(dvo_reg, DVOB))
416 void intel_dvo_init(struct drm_i915_private *dev_priv)
418 struct intel_encoder *intel_encoder;
419 struct intel_dvo *intel_dvo;
420 struct intel_connector *intel_connector;
422 int encoder_type = DRM_MODE_ENCODER_NONE;
424 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
428 intel_connector = intel_connector_alloc();
429 if (!intel_connector) {
434 intel_dvo->attached_connector = intel_connector;
436 intel_encoder = &intel_dvo->base;
438 intel_encoder->disable = intel_disable_dvo;
439 intel_encoder->enable = intel_enable_dvo;
440 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
441 intel_encoder->get_config = intel_dvo_get_config;
442 intel_encoder->compute_config = intel_dvo_compute_config;
443 intel_encoder->pre_enable = intel_dvo_pre_enable;
444 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
446 /* Now, try to find a controller */
447 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
448 struct drm_connector *connector = &intel_connector->base;
449 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
450 struct i2c_adapter *i2c;
454 u32 dpll[I915_MAX_PIPES];
458 * Allow the I2C driver info to specify the GPIO to be used in
459 * special cases, but otherwise default to what's defined
462 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
464 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
465 gpio = GMBUS_PIN_SSC;
467 gpio = GMBUS_PIN_DPB;
470 * Set up the I2C bus necessary for the chip we're probing.
471 * It appears that everything is on GPIOE except for panels
472 * on i830 laptops, which are on GPIOB (DVOA).
474 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
476 intel_dvo->dev = *dvo;
479 * GMBUS NAK handling seems to be unstable, hence let the
480 * transmitter detection run in bit banging mode for now.
482 intel_gmbus_force_bit(i2c, true);
485 * ns2501 requires the DVO 2x clock before it will
486 * respond to i2c accesses, so make sure we have
487 * have the clock enabled before we attempt to
488 * initialize the device.
490 for_each_pipe(dev_priv, pipe) {
491 dpll[pipe] = intel_de_read(dev_priv, DPLL(pipe));
492 intel_de_write(dev_priv, DPLL(pipe),
493 dpll[pipe] | DPLL_DVO_2X_MODE);
496 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
498 /* restore the DVO 2x clock state to original */
499 for_each_pipe(dev_priv, pipe) {
500 intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]);
503 intel_gmbus_force_bit(i2c, false);
508 port = intel_dvo_port(dvo->dvo_reg);
509 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
510 &intel_dvo_enc_funcs, encoder_type,
511 "DVO %c", port_name(port));
513 intel_encoder->type = INTEL_OUTPUT_DVO;
514 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
515 intel_encoder->port = port;
516 intel_encoder->pipe_mask = ~0;
518 if (dvo->type != INTEL_DVO_CHIP_LVDS)
519 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
520 (1 << INTEL_OUTPUT_DVO);
523 case INTEL_DVO_CHIP_TMDS:
524 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT |
525 DRM_CONNECTOR_POLL_DISCONNECT;
526 drm_connector_init(&dev_priv->drm, connector,
527 &intel_dvo_connector_funcs,
528 DRM_MODE_CONNECTOR_DVII);
529 encoder_type = DRM_MODE_ENCODER_TMDS;
531 case INTEL_DVO_CHIP_LVDS_NO_FIXED:
532 case INTEL_DVO_CHIP_LVDS:
533 drm_connector_init(&dev_priv->drm, connector,
534 &intel_dvo_connector_funcs,
535 DRM_MODE_CONNECTOR_LVDS);
536 encoder_type = DRM_MODE_ENCODER_LVDS;
540 drm_connector_helper_add(connector,
541 &intel_dvo_connector_helper_funcs);
542 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
543 connector->interlace_allowed = false;
544 connector->doublescan_allowed = false;
546 intel_connector_attach_encoder(intel_connector, intel_encoder);
547 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
549 * For our LVDS chipsets, we should hopefully be able
550 * to dig the fixed panel mode out of the BIOS data.
551 * However, it's in a different format from the BIOS
552 * data on chipsets with integrated LVDS (stored in AIM
553 * headers, likely), so for now, just get the current
554 * mode being output through DVO.
556 intel_panel_init(&intel_connector->panel,
557 intel_dvo_get_current_mode(intel_encoder),
559 intel_dvo->panel_wants_dither = true;
566 kfree(intel_connector);