drivers/gpu/drm/i915/display/intel_dvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  */
  27
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30
  31 #include <drm/drm_atomic_helper.h>
  32 #include <drm/drm_crtc.h>
  33
  34 #include "i915_drv.h"
  35 #include "intel_connector.h"
  36 #include "intel_de.h"
  37 #include "intel_display_types.h"
  38 #include "intel_dvo.h"
  39 #include "intel_dvo_dev.h"
  40 #include "intel_gmbus.h"
  41 #include "intel_panel.h"
  42
  43 #define INTEL_DVO_CHIP_NONE     0
  44 #define INTEL_DVO_CHIP_LVDS     1
  45 #define INTEL_DVO_CHIP_TMDS     2
  46 #define INTEL_DVO_CHIP_TVOUT    4
  47 #define INTEL_DVO_CHIP_LVDS_NO_FIXED    5
  48
  49 #define SIL164_ADDR     0x38
  50 #define CH7xxx_ADDR     0x76
  51 #define TFP410_ADDR     0x38
  52 #define NS2501_ADDR     0x38
  53
  54 static const struct intel_dvo_device intel_dvo_devices[] = {
  55         {
  56                 .type = INTEL_DVO_CHIP_TMDS,
  57                 .name = "sil164",
  58                 .dvo_reg = DVOC,
  59                 .dvo_srcdim_reg = DVOC_SRCDIM,
  60                 .slave_addr = SIL164_ADDR,
  61                 .dev_ops = &sil164_ops,
  62         },
  63         {
  64                 .type = INTEL_DVO_CHIP_TMDS,
  65                 .name = "ch7xxx",
  66                 .dvo_reg = DVOC,
  67                 .dvo_srcdim_reg = DVOC_SRCDIM,
  68                 .slave_addr = CH7xxx_ADDR,
  69                 .dev_ops = &ch7xxx_ops,
  70         },
  71         {
  72                 .type = INTEL_DVO_CHIP_TMDS,
  73                 .name = "ch7xxx",
  74                 .dvo_reg = DVOC,
  75                 .dvo_srcdim_reg = DVOC_SRCDIM,
  76                 .slave_addr = 0x75, /* For some ch7010 */
  77                 .dev_ops = &ch7xxx_ops,
  78         },
  79         {
  80                 .type = INTEL_DVO_CHIP_LVDS,
  81                 .name = "ivch",
  82                 .dvo_reg = DVOA,
  83                 .dvo_srcdim_reg = DVOA_SRCDIM,
  84                 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  85                 .dev_ops = &ivch_ops,
  86         },
  87         {
  88                 .type = INTEL_DVO_CHIP_TMDS,
  89                 .name = "tfp410",
  90                 .dvo_reg = DVOC,
  91                 .dvo_srcdim_reg = DVOC_SRCDIM,
  92                 .slave_addr = TFP410_ADDR,
  93                 .dev_ops = &tfp410_ops,
  94         },
  95         {
  96                 .type = INTEL_DVO_CHIP_LVDS,
  97                 .name = "ch7017",
  98                 .dvo_reg = DVOC,
  99                 .dvo_srcdim_reg = DVOC_SRCDIM,
 100                 .slave_addr = 0x75,
 101                 .gpio = GMBUS_PIN_DPB,
 102                 .dev_ops = &ch7017_ops,
 103         },
 104         {
 105                 .type = INTEL_DVO_CHIP_LVDS_NO_FIXED,
 106                 .name = "ns2501",
 107                 .dvo_reg = DVOB,
 108                 .dvo_srcdim_reg = DVOB_SRCDIM,
 109                 .slave_addr = NS2501_ADDR,
 110                 .dev_ops = &ns2501_ops,
 111         },
 112 };
 113
 114 struct intel_dvo {
 115         struct intel_encoder base;
 116
 117         struct intel_dvo_device dev;
 118
 119         struct intel_connector *attached_connector;
 120
 121         bool panel_wants_dither;
 122 };
 123
 124 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
 125 {
 126         return container_of(encoder, struct intel_dvo, base);
 127 }
 128
 129 static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
 130 {
 131         return enc_to_dvo(intel_attached_encoder(connector));
 132 }
 133
 134 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
 135 {
 136         struct drm_device *dev = connector->base.dev;
 137         struct drm_i915_private *dev_priv = to_i915(dev);
 138         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 139         u32 tmp;
 140
 141         tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
 142
 143         if (!(tmp & DVO_ENABLE))
 144                 return false;
 145
 146         return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
 147 }
 148
 149 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
 150                                    enum pipe *pipe)
 151 {
 152         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 153         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 154         u32 tmp;
 155
 156         tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
 157
 158         *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT;
 159
 160         return tmp & DVO_ENABLE;
 161 }
 162
 163 static void intel_dvo_get_config(struct intel_encoder *encoder,
 164                                  struct intel_crtc_state *pipe_config)
 165 {
 166         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 167         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 168         u32 tmp, flags = 0;
 169
 170         pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
 171
 172         tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
 173         if (tmp & DVO_HSYNC_ACTIVE_HIGH)
 174                 flags |= DRM_MODE_FLAG_PHSYNC;
 175         else
 176                 flags |= DRM_MODE_FLAG_NHSYNC;
 177         if (tmp & DVO_VSYNC_ACTIVE_HIGH)
 178                 flags |= DRM_MODE_FLAG_PVSYNC;
 179         else
 180                 flags |= DRM_MODE_FLAG_NVSYNC;
 181
 182         pipe_config->hw.adjusted_mode.flags |= flags;
 183
 184         pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
 185 }
 186
 187 static void intel_disable_dvo(struct intel_atomic_state *state,
 188                               struct intel_encoder *encoder,
 189                               const struct intel_crtc_state *old_crtc_state,
 190                               const struct drm_connector_state *old_conn_state)
 191 {
 192         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 193         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 194         i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 195         u32 temp = intel_de_read(dev_priv, dvo_reg);
 196
 197         intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
 198         intel_de_write(dev_priv, dvo_reg, temp & ~DVO_ENABLE);
 199         intel_de_read(dev_priv, dvo_reg);
 200 }
 201
 202 static void intel_enable_dvo(struct intel_atomic_state *state,
 203                              struct intel_encoder *encoder,
 204                              const struct intel_crtc_state *pipe_config,
 205                              const struct drm_connector_state *conn_state)
 206 {
 207         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 208         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 209         i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 210         u32 temp = intel_de_read(dev_priv, dvo_reg);
 211
 212         intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
 213                                          &pipe_config->hw.mode,
 214                                          &pipe_config->hw.adjusted_mode);
 215
 216         intel_de_write(dev_priv, dvo_reg, temp | DVO_ENABLE);
 217         intel_de_read(dev_priv, dvo_reg);
 218
 219         intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
 220 }
 221
 222 static enum drm_mode_status
 223 intel_dvo_mode_valid(struct drm_connector *connector,
 224                      struct drm_display_mode *mode)
 225 {
 226         struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector));
 227         const struct drm_display_mode *fixed_mode =
 228                 to_intel_connector(connector)->panel.fixed_mode;
 229         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 230         int target_clock = mode->clock;
 231
 232         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 233                 return MODE_NO_DBLESCAN;
 234
 235         /* XXX: Validate clock range */
 236
 237         if (fixed_mode) {
 238                 if (mode->hdisplay > fixed_mode->hdisplay)
 239                         return MODE_PANEL;
 240                 if (mode->vdisplay > fixed_mode->vdisplay)
 241                         return MODE_PANEL;
 242
 243                 target_clock = fixed_mode->clock;
 244         }
 245
 246         if (target_clock > max_dotclk)
 247                 return MODE_CLOCK_HIGH;
 248
 249         return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
 250 }
 251
 252 static int intel_dvo_compute_config(struct intel_encoder *encoder,
 253                                     struct intel_crtc_state *pipe_config,
 254                                     struct drm_connector_state *conn_state)
 255 {
 256         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 257         const struct drm_display_mode *fixed_mode =
 258                 intel_dvo->attached_connector->panel.fixed_mode;
 259         struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
 260
 261         /*
 262          * If we have timings from the BIOS for the panel, put them in
 263          * to the adjusted mode.  The CRTC will be set up for this mode,
 264          * with the panel scaling set up to source from the H/VDisplay
 265          * of the original mode.
 266          */
 267         if (fixed_mode)
 268                 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
 269
 270         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 271                 return -EINVAL;
 272
 273         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 274
 275         return 0;
 276 }
 277
 278 static void intel_dvo_pre_enable(struct intel_atomic_state *state,
 279                                  struct intel_encoder *encoder,
 280                                  const struct intel_crtc_state *pipe_config,
 281                                  const struct drm_connector_state *conn_state)
 282 {
 283         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 284         struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
 285         const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
 286         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 287         enum pipe pipe = crtc->pipe;
 288         u32 dvo_val;
 289         i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 290         i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
 291
 292         /* Save the data order, since I don't know what it should be set to. */
 293         dvo_val = intel_de_read(dev_priv, dvo_reg) &
 294                   (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
 295         dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
 296                    DVO_BLANK_ACTIVE_HIGH;
 297
 298         dvo_val |= DVO_PIPE_SEL(pipe);
 299         dvo_val |= DVO_PIPE_STALL;
 300         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 301                 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
 302         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 303                 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
 304
 305         intel_de_write(dev_priv, dvo_srcdim_reg,
 306                        (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
 307         intel_de_write(dev_priv, dvo_reg, dvo_val);
 308 }
 309
 310 static enum drm_connector_status
 311 intel_dvo_detect(struct drm_connector *connector, bool force)
 312 {
 313         struct drm_i915_private *i915 = to_i915(connector->dev);
 314         struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector));
 315
 316         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 317                       connector->base.id, connector->name);
 318
 319         if (!INTEL_DISPLAY_ENABLED(i915))
 320                 return connector_status_disconnected;
 321
 322         return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
 323 }
 324
 325 static int intel_dvo_get_modes(struct drm_connector *connector)
 326 {
 327         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 328         const struct drm_display_mode *fixed_mode =
 329                 to_intel_connector(connector)->panel.fixed_mode;
 330         int num_modes;
 331
 332         /*
 333          * We should probably have an i2c driver get_modes function for those
 334          * devices which will have a fixed set of modes determined by the chip
 335          * (TV-out, for example), but for now with just TMDS and LVDS,
 336          * that's not the case.
 337          */
 338         num_modes = intel_ddc_get_modes(connector,
 339                                         intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
 340         if (num_modes)
 341                 return num_modes;
 342
 343         if (fixed_mode) {
 344                 struct drm_display_mode *mode;
 345
 346                 mode = drm_mode_duplicate(connector->dev, fixed_mode);
 347                 if (mode) {
 348                         drm_mode_probed_add(connector, mode);
 349                         num_modes++;
 350                 }
 351         }
 352
 353         return num_modes;
 354 }
 355
 356 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
 357         .detect = intel_dvo_detect,
 358         .late_register = intel_connector_register,
 359         .early_unregister = intel_connector_unregister,
 360         .destroy = intel_connector_destroy,
 361         .fill_modes = drm_helper_probe_single_connector_modes,
 362         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 363         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 364 };
 365
 366 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
 367         .mode_valid = intel_dvo_mode_valid,
 368         .get_modes = intel_dvo_get_modes,
 369 };
 370
 371 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
 372 {
 373         struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
 374
 375         if (intel_dvo->dev.dev_ops->destroy)
 376                 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
 377
 378         intel_encoder_destroy(encoder);
 379 }
 380
 381 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
 382         .destroy = intel_dvo_enc_destroy,
 383 };
 384
 385 /*
 386  * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 387  *
 388  * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 389  * chip being on DVOB/C and having multiple pipes.
 390  */
 391 static struct drm_display_mode *
 392 intel_dvo_get_current_mode(struct intel_encoder *encoder)
 393 {
 394         struct drm_display_mode *mode;
 395
 396         mode = intel_encoder_current_mode(encoder);
 397         if (mode) {
 398                 DRM_DEBUG_KMS("using current (BIOS) mode: ");
 399                 drm_mode_debug_printmodeline(mode);
 400                 mode->type |= DRM_MODE_TYPE_PREFERRED;
 401         }
 402
 403         return mode;
 404 }
 405
 406 static enum port intel_dvo_port(i915_reg_t dvo_reg)
 407 {
 408         if (i915_mmio_reg_equal(dvo_reg, DVOA))
 409                 return PORT_A;
 410         else if (i915_mmio_reg_equal(dvo_reg, DVOB))
 411                 return PORT_B;
 412         else
 413                 return PORT_C;
 414 }
 415
 416 void intel_dvo_init(struct drm_i915_private *dev_priv)
 417 {
 418         struct intel_encoder *intel_encoder;
 419         struct intel_dvo *intel_dvo;
 420         struct intel_connector *intel_connector;
 421         int i;
 422         int encoder_type = DRM_MODE_ENCODER_NONE;
 423
 424         intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
 425         if (!intel_dvo)
 426                 return;
 427
 428         intel_connector = intel_connector_alloc();
 429         if (!intel_connector) {
 430                 kfree(intel_dvo);
 431                 return;
 432         }
 433
 434         intel_dvo->attached_connector = intel_connector;
 435
 436         intel_encoder = &intel_dvo->base;
 437
 438         intel_encoder->disable = intel_disable_dvo;
 439         intel_encoder->enable = intel_enable_dvo;
 440         intel_encoder->get_hw_state = intel_dvo_get_hw_state;
 441         intel_encoder->get_config = intel_dvo_get_config;
 442         intel_encoder->compute_config = intel_dvo_compute_config;
 443         intel_encoder->pre_enable = intel_dvo_pre_enable;
 444         intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
 445
 446         /* Now, try to find a controller */
 447         for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
 448                 struct drm_connector *connector = &intel_connector->base;
 449                 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
 450                 struct i2c_adapter *i2c;
 451                 int gpio;
 452                 bool dvoinit;
 453                 enum pipe pipe;
 454                 u32 dpll[I915_MAX_PIPES];
 455                 enum port port;
 456
 457                 /*
 458                  * Allow the I2C driver info to specify the GPIO to be used in
 459                  * special cases, but otherwise default to what's defined
 460                  * in the spec.
 461                  */
 462                 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
 463                         gpio = dvo->gpio;
 464                 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
 465                         gpio = GMBUS_PIN_SSC;
 466                 else
 467                         gpio = GMBUS_PIN_DPB;
 468
 469                 /*
 470                  * Set up the I2C bus necessary for the chip we're probing.
 471                  * It appears that everything is on GPIOE except for panels
 472                  * on i830 laptops, which are on GPIOB (DVOA).
 473                  */
 474                 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
 475
 476                 intel_dvo->dev = *dvo;
 477
 478                 /*
 479                  * GMBUS NAK handling seems to be unstable, hence let the
 480                  * transmitter detection run in bit banging mode for now.
 481                  */
 482                 intel_gmbus_force_bit(i2c, true);
 483
 484                 /*
 485                  * ns2501 requires the DVO 2x clock before it will
 486                  * respond to i2c accesses, so make sure we have
 487                  * have the clock enabled before we attempt to
 488                  * initialize the device.
 489                  */
 490                 for_each_pipe(dev_priv, pipe) {
 491                         dpll[pipe] = intel_de_read(dev_priv, DPLL(pipe));
 492                         intel_de_write(dev_priv, DPLL(pipe),
 493                                        dpll[pipe] | DPLL_DVO_2X_MODE);
 494                 }
 495
 496                 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
 497
 498                 /* restore the DVO 2x clock state to original */
 499                 for_each_pipe(dev_priv, pipe) {
 500                         intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]);
 501                 }
 502
 503                 intel_gmbus_force_bit(i2c, false);
 504
 505                 if (!dvoinit)
 506                         continue;
 507
 508                 port = intel_dvo_port(dvo->dvo_reg);
 509                 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
 510                                  &intel_dvo_enc_funcs, encoder_type,
 511                                  "DVO %c", port_name(port));
 512
 513                 intel_encoder->type = INTEL_OUTPUT_DVO;
 514                 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
 515                 intel_encoder->port = port;
 516                 intel_encoder->pipe_mask = ~0;
 517
 518                 if (dvo->type != INTEL_DVO_CHIP_LVDS)
 519                         intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
 520                                 (1 << INTEL_OUTPUT_DVO);
 521
 522                 switch (dvo->type) {
 523                 case INTEL_DVO_CHIP_TMDS:
 524                         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT |
 525                                 DRM_CONNECTOR_POLL_DISCONNECT;
 526                         drm_connector_init(&dev_priv->drm, connector,
 527                                            &intel_dvo_connector_funcs,
 528                                            DRM_MODE_CONNECTOR_DVII);
 529                         encoder_type = DRM_MODE_ENCODER_TMDS;
 530                         break;
 531                 case INTEL_DVO_CHIP_LVDS_NO_FIXED:
 532                 case INTEL_DVO_CHIP_LVDS:
 533                         drm_connector_init(&dev_priv->drm, connector,
 534                                            &intel_dvo_connector_funcs,
 535                                            DRM_MODE_CONNECTOR_LVDS);
 536                         encoder_type = DRM_MODE_ENCODER_LVDS;
 537                         break;
 538                 }
 539
 540                 drm_connector_helper_add(connector,
 541                                          &intel_dvo_connector_helper_funcs);
 542                 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 543                 connector->interlace_allowed = false;
 544                 connector->doublescan_allowed = false;
 545
 546                 intel_connector_attach_encoder(intel_connector, intel_encoder);
 547                 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
 548                         /*
 549                          * For our LVDS chipsets, we should hopefully be able
 550                          * to dig the fixed panel mode out of the BIOS data.
 551                          * However, it's in a different format from the BIOS
 552                          * data on chipsets with integrated LVDS (stored in AIM
 553                          * headers, likely), so for now, just get the current
 554                          * mode being output through DVO.
 555                          */
 556                         intel_panel_init(&intel_connector->panel,
 557                                          intel_dvo_get_current_mode(intel_encoder),
 558                                          NULL);
 559                         intel_dvo->panel_wants_dither = true;
 560                 }
 561
 562                 return;
 563         }
 564
 565         kfree(intel_dvo);
 566         kfree(intel_connector);
 567 }