2 * Copyright © 2008 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26 #include <drm/drm_atomic_helper.h>
27 #include <drm/drm_edid.h>
28 #include <drm/drm_probe_helper.h>
31 #include "intel_atomic.h"
32 #include "intel_audio.h"
33 #include "intel_connector.h"
34 #include "intel_ddi.h"
35 #include "intel_display_types.h"
37 #include "intel_dp_mst.h"
38 #include "intel_dpio_phy.h"
40 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
41 struct intel_crtc_state *crtc_state,
42 struct drm_connector_state *conn_state,
43 struct link_config_limits *limits)
45 struct drm_atomic_state *state = crtc_state->uapi.state;
46 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
47 struct intel_dp *intel_dp = &intel_mst->primary->dp;
48 struct intel_connector *connector =
49 to_intel_connector(conn_state->connector);
50 const struct drm_display_mode *adjusted_mode =
51 &crtc_state->hw.adjusted_mode;
52 void *port = connector->port;
53 bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0,
54 DP_DPCD_QUIRK_CONSTANT_N);
55 int bpp, slots = -EINVAL;
57 crtc_state->lane_count = limits->max_lane_count;
58 crtc_state->port_clock = limits->max_clock;
60 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
61 crtc_state->pipe_bpp = bpp;
63 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
67 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
68 port, crtc_state->pbn, 0);
69 if (slots == -EDEADLK)
76 DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
80 intel_link_compute_m_n(crtc_state->pipe_bpp,
81 crtc_state->lane_count,
82 adjusted_mode->crtc_clock,
83 crtc_state->port_clock,
85 constant_n, crtc_state->fec_enable);
86 crtc_state->dp_m_n.tu = slots;
92 * Iterate over all connectors and return the smallest transcoder in the MST
95 static enum transcoder
96 intel_dp_mst_master_trans_compute(struct intel_atomic_state *state,
97 struct intel_dp *mst_port)
99 struct drm_i915_private *dev_priv = to_i915(state->base.dev);
100 struct intel_digital_connector_state *conn_state;
101 struct intel_connector *connector;
102 enum pipe ret = I915_MAX_PIPES;
105 if (INTEL_GEN(dev_priv) < 12)
106 return INVALID_TRANSCODER;
108 for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
109 struct intel_crtc_state *crtc_state;
110 struct intel_crtc *crtc;
112 if (connector->mst_port != mst_port || !conn_state->base.crtc)
115 crtc = to_intel_crtc(conn_state->base.crtc);
116 crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
117 if (!crtc_state->uapi.active)
121 * Using crtc->pipe because crtc_state->cpu_transcoder is
122 * computed, so others CRTCs could have non-computed
125 if (crtc->pipe < ret)
129 if (ret == I915_MAX_PIPES)
130 return INVALID_TRANSCODER;
132 /* Simple cast works because TGL don't have a eDP transcoder */
133 return (enum transcoder)ret;
136 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
137 struct intel_crtc_state *pipe_config,
138 struct drm_connector_state *conn_state)
140 struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
141 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
142 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
143 struct intel_dp *intel_dp = &intel_mst->primary->dp;
144 struct intel_connector *connector =
145 to_intel_connector(conn_state->connector);
146 struct intel_digital_connector_state *intel_conn_state =
147 to_intel_digital_connector_state(conn_state);
148 const struct drm_display_mode *adjusted_mode =
149 &pipe_config->hw.adjusted_mode;
150 void *port = connector->port;
151 struct link_config_limits limits;
154 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
157 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
158 pipe_config->has_pch_encoder = false;
160 if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
161 pipe_config->has_audio =
162 drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port);
164 pipe_config->has_audio =
165 intel_conn_state->force_audio == HDMI_AUDIO_ON;
168 * for MST we always configure max link bw - the spec doesn't
169 * seem to suggest we should do otherwise.
172 limits.max_clock = intel_dp_max_link_rate(intel_dp);
174 limits.min_lane_count =
175 limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
177 limits.min_bpp = intel_dp_min_bpp(pipe_config);
179 * FIXME: If all the streams can't fit into the link with
180 * their current pipe_bpp we should reduce pipe_bpp across
181 * the board until things start to fit. Until then we
182 * limit to <= 8bpc since that's what was hardcoded for all
183 * MST streams previously. This hack should be removed once
184 * we have the proper retry logic in place.
186 limits.max_bpp = min(pipe_config->pipe_bpp, 24);
188 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
190 ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
191 conn_state, &limits);
195 pipe_config->limited_color_range =
196 intel_dp_limited_color_range(pipe_config, conn_state);
198 if (IS_GEN9_LP(dev_priv))
199 pipe_config->lane_lat_optim_mask =
200 bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
202 intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
204 pipe_config->mst_master_transcoder = intel_dp_mst_master_trans_compute(state, intel_dp);
210 * If one of the connectors in a MST stream needs a modeset, mark all CRTCs
211 * that shares the same MST stream as mode changed,
212 * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do
213 * a fastset when possible.
216 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
217 struct intel_atomic_state *state)
219 struct drm_i915_private *dev_priv = to_i915(state->base.dev);
220 struct drm_connector_list_iter connector_list_iter;
221 struct intel_connector *connector_iter;
223 if (INTEL_GEN(dev_priv) < 12)
226 if (!intel_connector_needs_modeset(state, &connector->base))
229 drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter);
230 for_each_intel_connector_iter(connector_iter, &connector_list_iter) {
231 struct intel_digital_connector_state *conn_iter_state;
232 struct intel_crtc_state *crtc_state;
233 struct intel_crtc *crtc;
236 if (connector_iter->mst_port != connector->mst_port ||
237 connector_iter == connector)
240 conn_iter_state = intel_atomic_get_digital_connector_state(state,
242 if (IS_ERR(conn_iter_state)) {
243 drm_connector_list_iter_end(&connector_list_iter);
244 return PTR_ERR(conn_iter_state);
247 if (!conn_iter_state->base.crtc)
250 crtc = to_intel_crtc(conn_iter_state->base.crtc);
251 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
252 if (IS_ERR(crtc_state)) {
253 drm_connector_list_iter_end(&connector_list_iter);
254 return PTR_ERR(crtc_state);
257 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
259 drm_connector_list_iter_end(&connector_list_iter);
262 crtc_state->uapi.mode_changed = true;
264 drm_connector_list_iter_end(&connector_list_iter);
270 intel_dp_mst_atomic_check(struct drm_connector *connector,
271 struct drm_atomic_state *_state)
273 struct intel_atomic_state *state = to_intel_atomic_state(_state);
274 struct drm_connector_state *new_conn_state =
275 drm_atomic_get_new_connector_state(&state->base, connector);
276 struct drm_connector_state *old_conn_state =
277 drm_atomic_get_old_connector_state(&state->base, connector);
278 struct intel_connector *intel_connector =
279 to_intel_connector(connector);
280 struct drm_crtc *new_crtc = new_conn_state->crtc;
281 struct drm_dp_mst_topology_mgr *mgr;
284 ret = intel_digital_connector_atomic_check(connector, &state->base);
288 ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state);
292 if (!old_conn_state->crtc)
295 /* We only want to free VCPI if this state disables the CRTC on this
299 struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc);
300 struct intel_crtc_state *crtc_state =
301 intel_atomic_get_new_crtc_state(state, intel_crtc);
304 !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) ||
305 crtc_state->uapi.enable)
309 mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr;
310 ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr,
311 intel_connector->port);
316 static void intel_mst_disable_dp(struct intel_encoder *encoder,
317 const struct intel_crtc_state *old_crtc_state,
318 const struct drm_connector_state *old_conn_state)
320 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
321 struct intel_digital_port *intel_dig_port = intel_mst->primary;
322 struct intel_dp *intel_dp = &intel_dig_port->dp;
323 struct intel_connector *connector =
324 to_intel_connector(old_conn_state->connector);
327 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
329 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
331 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
333 DRM_DEBUG_KMS("failed to update payload %d\n", ret);
335 if (old_crtc_state->has_audio)
336 intel_audio_codec_disable(encoder,
337 old_crtc_state, old_conn_state);
340 static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
341 const struct intel_crtc_state *old_crtc_state,
342 const struct drm_connector_state *old_conn_state)
344 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
345 struct intel_digital_port *intel_dig_port = intel_mst->primary;
346 struct intel_dp *intel_dp = &intel_dig_port->dp;
347 struct intel_connector *connector =
348 to_intel_connector(old_conn_state->connector);
349 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
350 bool last_mst_stream;
353 intel_dp->active_mst_links--;
354 last_mst_stream = intel_dp->active_mst_links == 0;
355 drm_WARN_ON(&dev_priv->drm,
356 INTEL_GEN(dev_priv) >= 12 && last_mst_stream &&
357 !intel_dp_mst_is_master_trans(old_crtc_state));
359 intel_crtc_vblank_off(old_crtc_state);
361 intel_disable_pipe(old_crtc_state);
363 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
365 val = intel_de_read(dev_priv,
366 TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder));
367 val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
368 intel_de_write(dev_priv,
369 TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
372 if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
373 DP_TP_STATUS_ACT_SENT, 1))
374 DRM_ERROR("Timed out waiting for ACT sent when disabling\n");
375 drm_dp_check_act_status(&intel_dp->mst_mgr);
377 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
379 intel_ddi_disable_transcoder_func(old_crtc_state);
381 if (INTEL_GEN(dev_priv) >= 9)
382 skl_scaler_disable(old_crtc_state);
384 ilk_pfit_disable(old_crtc_state);
387 * Power down mst path before disabling the port, otherwise we end
388 * up getting interrupts from the sink upon detecting link loss.
390 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
393 * From TGL spec: "If multi-stream slave transcoder: Configure
394 * Transcoder Clock Select to direct no clock to the transcoder"
396 * From older GENs spec: "Configure Transcoder Clock Select to direct
397 * no clock to the transcoder"
399 if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream)
400 intel_ddi_disable_pipe_clock(old_crtc_state);
403 intel_mst->connector = NULL;
405 intel_dig_port->base.post_disable(&intel_dig_port->base,
406 old_crtc_state, NULL);
408 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
411 static void intel_mst_pre_pll_enable_dp(struct intel_encoder *encoder,
412 const struct intel_crtc_state *pipe_config,
413 const struct drm_connector_state *conn_state)
415 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
416 struct intel_digital_port *intel_dig_port = intel_mst->primary;
417 struct intel_dp *intel_dp = &intel_dig_port->dp;
419 if (intel_dp->active_mst_links == 0)
420 intel_dig_port->base.pre_pll_enable(&intel_dig_port->base,
424 static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
425 const struct intel_crtc_state *pipe_config,
426 const struct drm_connector_state *conn_state)
428 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
429 struct intel_digital_port *intel_dig_port = intel_mst->primary;
430 struct intel_dp *intel_dp = &intel_dig_port->dp;
431 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
432 struct intel_connector *connector =
433 to_intel_connector(conn_state->connector);
436 bool first_mst_stream;
438 /* MST encoders are bound to a crtc, not to a connector,
439 * force the mapping here for get_hw_state.
441 connector->encoder = encoder;
442 intel_mst->connector = connector;
443 first_mst_stream = intel_dp->active_mst_links == 0;
444 drm_WARN_ON(&dev_priv->drm,
445 INTEL_GEN(dev_priv) >= 12 && first_mst_stream &&
446 !intel_dp_mst_is_master_trans(pipe_config));
448 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
450 if (first_mst_stream)
451 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
453 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
455 if (first_mst_stream)
456 intel_dig_port->base.pre_enable(&intel_dig_port->base,
459 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
462 pipe_config->dp_m_n.tu);
464 DRM_ERROR("failed to allocate vcpi\n");
466 intel_dp->active_mst_links++;
467 temp = intel_de_read(dev_priv, intel_dp->regs.dp_tp_status);
468 intel_de_write(dev_priv, intel_dp->regs.dp_tp_status, temp);
470 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
473 * Before Gen 12 this is not done as part of
474 * intel_dig_port->base.pre_enable() and should be done here. For
475 * Gen 12+ the step in which this should be done is different for the
476 * first MST stream, so it's done on the DDI for the first stream and
477 * here for the following ones.
479 if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream)
480 intel_ddi_enable_pipe_clock(pipe_config);
482 intel_ddi_set_dp_msa(pipe_config, conn_state);
484 intel_dp_set_m_n(pipe_config, M1_N1);
487 static void intel_mst_enable_dp(struct intel_encoder *encoder,
488 const struct intel_crtc_state *pipe_config,
489 const struct drm_connector_state *conn_state)
491 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
492 struct intel_digital_port *intel_dig_port = intel_mst->primary;
493 struct intel_dp *intel_dp = &intel_dig_port->dp;
494 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
496 drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
498 intel_enable_pipe(pipe_config);
500 intel_crtc_vblank_on(pipe_config);
502 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
504 if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
505 DP_TP_STATUS_ACT_SENT, 1))
506 DRM_ERROR("Timed out waiting for ACT sent\n");
508 drm_dp_check_act_status(&intel_dp->mst_mgr);
510 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
511 if (pipe_config->has_audio)
512 intel_audio_codec_enable(encoder, pipe_config, conn_state);
515 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
518 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
519 *pipe = intel_mst->pipe;
520 if (intel_mst->connector)
525 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
526 struct intel_crtc_state *pipe_config)
528 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
529 struct intel_digital_port *intel_dig_port = intel_mst->primary;
531 intel_ddi_get_config(&intel_dig_port->base, pipe_config);
534 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
536 struct intel_connector *intel_connector = to_intel_connector(connector);
537 struct intel_dp *intel_dp = intel_connector->mst_port;
541 if (drm_connector_is_unregistered(connector))
542 return intel_connector_update_modes(connector, NULL);
544 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
545 ret = intel_connector_update_modes(connector, edid);
552 intel_dp_mst_connector_late_register(struct drm_connector *connector)
554 struct intel_connector *intel_connector = to_intel_connector(connector);
557 ret = drm_dp_mst_connector_late_register(connector,
558 intel_connector->port);
562 ret = intel_connector_register(connector);
564 drm_dp_mst_connector_early_unregister(connector,
565 intel_connector->port);
571 intel_dp_mst_connector_early_unregister(struct drm_connector *connector)
573 struct intel_connector *intel_connector = to_intel_connector(connector);
575 intel_connector_unregister(connector);
576 drm_dp_mst_connector_early_unregister(connector,
577 intel_connector->port);
580 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
581 .fill_modes = drm_helper_probe_single_connector_modes,
582 .atomic_get_property = intel_digital_connector_atomic_get_property,
583 .atomic_set_property = intel_digital_connector_atomic_set_property,
584 .late_register = intel_dp_mst_connector_late_register,
585 .early_unregister = intel_dp_mst_connector_early_unregister,
586 .destroy = intel_connector_destroy,
587 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
588 .atomic_duplicate_state = intel_digital_connector_duplicate_state,
591 static int intel_dp_mst_get_modes(struct drm_connector *connector)
593 return intel_dp_mst_get_ddc_modes(connector);
596 static enum drm_mode_status
597 intel_dp_mst_mode_valid(struct drm_connector *connector,
598 struct drm_display_mode *mode)
600 struct drm_i915_private *dev_priv = to_i915(connector->dev);
601 struct intel_connector *intel_connector = to_intel_connector(connector);
602 struct intel_dp *intel_dp = intel_connector->mst_port;
603 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
604 int max_rate, mode_rate, max_lanes, max_link_clock;
606 if (drm_connector_is_unregistered(connector))
609 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
610 return MODE_NO_DBLESCAN;
612 max_link_clock = intel_dp_max_link_rate(intel_dp);
613 max_lanes = intel_dp_max_lane_count(intel_dp);
615 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
616 mode_rate = intel_dp_link_required(mode->clock, 18);
618 /* TODO - validate mode against available PBN for link */
619 if (mode->clock < 10000)
620 return MODE_CLOCK_LOW;
622 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
623 return MODE_H_ILLEGAL;
625 if (mode_rate > max_rate || mode->clock > max_dotclk)
626 return MODE_CLOCK_HIGH;
628 return intel_mode_valid_max_plane_size(dev_priv, mode);
631 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
632 struct drm_connector_state *state)
634 struct intel_connector *intel_connector = to_intel_connector(connector);
635 struct intel_dp *intel_dp = intel_connector->mst_port;
636 struct intel_crtc *crtc = to_intel_crtc(state->crtc);
638 return &intel_dp->mst_encoders[crtc->pipe]->base.base;
642 intel_dp_mst_detect(struct drm_connector *connector,
643 struct drm_modeset_acquire_ctx *ctx, bool force)
645 struct intel_connector *intel_connector = to_intel_connector(connector);
646 struct intel_dp *intel_dp = intel_connector->mst_port;
648 if (drm_connector_is_unregistered(connector))
649 return connector_status_disconnected;
651 return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
652 intel_connector->port);
655 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
656 .get_modes = intel_dp_mst_get_modes,
657 .mode_valid = intel_dp_mst_mode_valid,
658 .atomic_best_encoder = intel_mst_atomic_best_encoder,
659 .atomic_check = intel_dp_mst_atomic_check,
660 .detect_ctx = intel_dp_mst_detect,
663 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
665 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder));
667 drm_encoder_cleanup(encoder);
671 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
672 .destroy = intel_dp_mst_encoder_destroy,
675 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
677 if (intel_attached_encoder(connector) && connector->base.state->crtc) {
679 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe))
686 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
688 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
689 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
690 struct drm_device *dev = intel_dig_port->base.base.dev;
691 struct drm_i915_private *dev_priv = to_i915(dev);
692 struct intel_connector *intel_connector;
693 struct drm_connector *connector;
697 intel_connector = intel_connector_alloc();
698 if (!intel_connector)
701 intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
702 intel_connector->mst_port = intel_dp;
703 intel_connector->port = port;
704 drm_dp_mst_get_port_malloc(port);
706 connector = &intel_connector->base;
707 ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
708 DRM_MODE_CONNECTOR_DisplayPort);
710 intel_connector_free(intel_connector);
714 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
716 for_each_pipe(dev_priv, pipe) {
717 struct drm_encoder *enc =
718 &intel_dp->mst_encoders[pipe]->base.base;
720 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
725 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
726 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
728 ret = drm_connector_set_path_property(connector, pathprop);
732 intel_attach_force_audio_property(connector);
733 intel_attach_broadcast_rgb_property(connector);
736 * Reuse the prop from the SST connector because we're
737 * not allowed to create new props after device registration.
739 connector->max_bpc_property =
740 intel_dp->attached_connector->base.max_bpc_property;
741 if (connector->max_bpc_property)
742 drm_connector_attach_max_bpc_property(connector, 6, 12);
747 drm_connector_cleanup(connector);
751 static const struct drm_dp_mst_topology_cbs mst_cbs = {
752 .add_connector = intel_dp_add_mst_connector,
755 static struct intel_dp_mst_encoder *
756 intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
758 struct intel_dp_mst_encoder *intel_mst;
759 struct intel_encoder *intel_encoder;
760 struct drm_device *dev = intel_dig_port->base.base.dev;
762 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
767 intel_mst->pipe = pipe;
768 intel_encoder = &intel_mst->base;
769 intel_mst->primary = intel_dig_port;
771 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
772 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
774 intel_encoder->type = INTEL_OUTPUT_DP_MST;
775 intel_encoder->power_domain = intel_dig_port->base.power_domain;
776 intel_encoder->port = intel_dig_port->base.port;
777 intel_encoder->cloneable = 0;
779 * This is wrong, but broken userspace uses the intersection
780 * of possible_crtcs of all the encoders of a given connector
781 * to figure out which crtcs can drive said connector. What
782 * should be used instead is the union of possible_crtcs.
783 * To keep such userspace functioning we must misconfigure
784 * this to make sure the intersection is not empty :(
786 intel_encoder->pipe_mask = ~0;
788 intel_encoder->compute_config = intel_dp_mst_compute_config;
789 intel_encoder->disable = intel_mst_disable_dp;
790 intel_encoder->post_disable = intel_mst_post_disable_dp;
791 intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
792 intel_encoder->pre_enable = intel_mst_pre_enable_dp;
793 intel_encoder->enable = intel_mst_enable_dp;
794 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
795 intel_encoder->get_config = intel_dp_mst_enc_get_config;
802 intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
804 struct intel_dp *intel_dp = &intel_dig_port->dp;
805 struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
808 for_each_pipe(dev_priv, pipe)
809 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe);
814 intel_dp_mst_encoder_active_links(struct intel_digital_port *intel_dig_port)
816 return intel_dig_port->dp.active_mst_links;
820 intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
822 struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev);
823 struct intel_dp *intel_dp = &intel_dig_port->dp;
824 enum port port = intel_dig_port->base.port;
827 if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
830 if (INTEL_GEN(i915) < 12 && port == PORT_A)
833 if (INTEL_GEN(i915) < 11 && port == PORT_E)
836 intel_dp->mst_mgr.cbs = &mst_cbs;
838 /* create encoders */
839 intel_dp_create_fake_mst_encoders(intel_dig_port);
840 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
841 &intel_dp->aux, 16, 3, conn_base_id);
845 intel_dp->can_mst = true;
851 intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
853 struct intel_dp *intel_dp = &intel_dig_port->dp;
855 if (!intel_dp->can_mst)
858 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
859 /* encoders will get killed by normal cleanup */
862 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
864 return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder;
867 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state)
869 return crtc_state->mst_master_transcoder != INVALID_TRANSCODER &&
870 crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder;