drivers/gpu/drm/i915/display/intel_dp_mst.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *             2014 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  *
  24  */
  25
  26 #include <drm/drm_atomic.h>
  27 #include <drm/drm_atomic_helper.h>
  28 #include <drm/drm_edid.h>
  29 #include <drm/drm_probe_helper.h>
  30
  31 #include "i915_drv.h"
  32 #include "intel_atomic.h"
  33 #include "intel_audio.h"
  34 #include "intel_connector.h"
  35 #include "intel_crtc.h"
  36 #include "intel_ddi.h"
  37 #include "intel_de.h"
  38 #include "intel_display_types.h"
  39 #include "intel_dp.h"
  40 #include "intel_dp_hdcp.h"
  41 #include "intel_dp_mst.h"
  42 #include "intel_dpio_phy.h"
  43 #include "intel_hdcp.h"
  44 #include "intel_hotplug.h"
  45 #include "skl_scaler.h"
  46
  47 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
  48                                             struct intel_crtc_state *crtc_state,
  49                                             struct drm_connector_state *conn_state,
  50                                             struct link_config_limits *limits)
  51 {
  52         struct drm_atomic_state *state = crtc_state->uapi.state;
  53         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  54         struct intel_dp *intel_dp = &intel_mst->primary->dp;
  55         struct intel_connector *connector =
  56                 to_intel_connector(conn_state->connector);
  57         struct drm_i915_private *i915 = to_i915(connector->base.dev);
  58         const struct drm_display_mode *adjusted_mode =
  59                 &crtc_state->hw.adjusted_mode;
  60         bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
  61         int bpp, slots = -EINVAL;
  62
  63         crtc_state->lane_count = limits->max_lane_count;
  64         crtc_state->port_clock = limits->max_rate;
  65
  66         for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
  67                 crtc_state->pipe_bpp = bpp;
  68
  69                 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
  70                                                        crtc_state->pipe_bpp,
  71                                                        false);
  72
  73                 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
  74                                                       connector->port,
  75                                                       crtc_state->pbn,
  76                                                       drm_dp_get_vc_payload_bw(&intel_dp->mst_mgr,
  77                                                                                crtc_state->port_clock,
  78                                                                                crtc_state->lane_count));
  79                 if (slots == -EDEADLK)
  80                         return slots;
  81                 if (slots >= 0)
  82                         break;
  83         }
  84
  85         if (slots < 0) {
  86                 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
  87                             slots);
  88                 return slots;
  89         }
  90
  91         intel_link_compute_m_n(crtc_state->pipe_bpp,
  92                                crtc_state->lane_count,
  93                                adjusted_mode->crtc_clock,
  94                                crtc_state->port_clock,
  95                                &crtc_state->dp_m_n,
  96                                constant_n, crtc_state->fec_enable);
  97         crtc_state->dp_m_n.tu = slots;
  98
  99         return 0;
 100 }
 101
 102 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 103                                        struct intel_crtc_state *pipe_config,
 104                                        struct drm_connector_state *conn_state)
 105 {
 106         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 107         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 108         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 109         struct intel_connector *connector =
 110                 to_intel_connector(conn_state->connector);
 111         struct intel_digital_connector_state *intel_conn_state =
 112                 to_intel_digital_connector_state(conn_state);
 113         const struct drm_display_mode *adjusted_mode =
 114                 &pipe_config->hw.adjusted_mode;
 115         struct link_config_limits limits;
 116         int ret;
 117
 118         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 119                 return -EINVAL;
 120
 121         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 122         pipe_config->has_pch_encoder = false;
 123
 124         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
 125                 pipe_config->has_audio = connector->port->has_audio;
 126         else
 127                 pipe_config->has_audio =
 128                         intel_conn_state->force_audio == HDMI_AUDIO_ON;
 129
 130         /*
 131          * for MST we always configure max link bw - the spec doesn't
 132          * seem to suggest we should do otherwise.
 133          */
 134         limits.min_rate =
 135         limits.max_rate = intel_dp_max_link_rate(intel_dp);
 136
 137         limits.min_lane_count =
 138         limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 139
 140         limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format);
 141         /*
 142          * FIXME: If all the streams can't fit into the link with
 143          * their current pipe_bpp we should reduce pipe_bpp across
 144          * the board until things start to fit. Until then we
 145          * limit to <= 8bpc since that's what was hardcoded for all
 146          * MST streams previously. This hack should be removed once
 147          * we have the proper retry logic in place.
 148          */
 149         limits.max_bpp = min(pipe_config->pipe_bpp, 24);
 150
 151         intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
 152
 153         ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
 154                                                conn_state, &limits);
 155         if (ret)
 156                 return ret;
 157
 158         pipe_config->limited_color_range =
 159                 intel_dp_limited_color_range(pipe_config, conn_state);
 160
 161         if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
 162                 pipe_config->lane_lat_optim_mask =
 163                         bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
 164
 165         intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 166
 167         return 0;
 168 }
 169
 170 /*
 171  * Iterate over all connectors and return a mask of
 172  * all CPU transcoders streaming over the same DP link.
 173  */
 174 static unsigned int
 175 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
 176                              struct intel_dp *mst_port)
 177 {
 178         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 179         const struct intel_digital_connector_state *conn_state;
 180         struct intel_connector *connector;
 181         u8 transcoders = 0;
 182         int i;
 183
 184         if (DISPLAY_VER(dev_priv) < 12)
 185                 return 0;
 186
 187         for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
 188                 const struct intel_crtc_state *crtc_state;
 189                 struct intel_crtc *crtc;
 190
 191                 if (connector->mst_port != mst_port || !conn_state->base.crtc)
 192                         continue;
 193
 194                 crtc = to_intel_crtc(conn_state->base.crtc);
 195                 crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
 196
 197                 if (!crtc_state->hw.active)
 198                         continue;
 199
 200                 transcoders |= BIT(crtc_state->cpu_transcoder);
 201         }
 202
 203         return transcoders;
 204 }
 205
 206 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder,
 207                                             struct intel_crtc_state *crtc_state,
 208                                             struct drm_connector_state *conn_state)
 209 {
 210         struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
 211         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 212         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 213
 214         /* lowest numbered transcoder will be designated master */
 215         crtc_state->mst_master_transcoder =
 216                 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
 217
 218         return 0;
 219 }
 220
 221 /*
 222  * If one of the connectors in a MST stream needs a modeset, mark all CRTCs
 223  * that shares the same MST stream as mode changed,
 224  * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do
 225  * a fastset when possible.
 226  */
 227 static int
 228 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
 229                                        struct intel_atomic_state *state)
 230 {
 231         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 232         struct drm_connector_list_iter connector_list_iter;
 233         struct intel_connector *connector_iter;
 234
 235         if (DISPLAY_VER(dev_priv) < 12)
 236                 return  0;
 237
 238         if (!intel_connector_needs_modeset(state, &connector->base))
 239                 return 0;
 240
 241         drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter);
 242         for_each_intel_connector_iter(connector_iter, &connector_list_iter) {
 243                 struct intel_digital_connector_state *conn_iter_state;
 244                 struct intel_crtc_state *crtc_state;
 245                 struct intel_crtc *crtc;
 246                 int ret;
 247
 248                 if (connector_iter->mst_port != connector->mst_port ||
 249                     connector_iter == connector)
 250                         continue;
 251
 252                 conn_iter_state = intel_atomic_get_digital_connector_state(state,
 253                                                                            connector_iter);
 254                 if (IS_ERR(conn_iter_state)) {
 255                         drm_connector_list_iter_end(&connector_list_iter);
 256                         return PTR_ERR(conn_iter_state);
 257                 }
 258
 259                 if (!conn_iter_state->base.crtc)
 260                         continue;
 261
 262                 crtc = to_intel_crtc(conn_iter_state->base.crtc);
 263                 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
 264                 if (IS_ERR(crtc_state)) {
 265                         drm_connector_list_iter_end(&connector_list_iter);
 266                         return PTR_ERR(crtc_state);
 267                 }
 268
 269                 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
 270                 if (ret) {
 271                         drm_connector_list_iter_end(&connector_list_iter);
 272                         return ret;
 273                 }
 274                 crtc_state->uapi.mode_changed = true;
 275         }
 276         drm_connector_list_iter_end(&connector_list_iter);
 277
 278         return 0;
 279 }
 280
 281 static int
 282 intel_dp_mst_atomic_check(struct drm_connector *connector,
 283                           struct drm_atomic_state *_state)
 284 {
 285         struct intel_atomic_state *state = to_intel_atomic_state(_state);
 286         struct drm_connector_state *new_conn_state =
 287                 drm_atomic_get_new_connector_state(&state->base, connector);
 288         struct drm_connector_state *old_conn_state =
 289                 drm_atomic_get_old_connector_state(&state->base, connector);
 290         struct intel_connector *intel_connector =
 291                 to_intel_connector(connector);
 292         struct drm_crtc *new_crtc = new_conn_state->crtc;
 293         struct drm_dp_mst_topology_mgr *mgr;
 294         int ret;
 295
 296         ret = intel_digital_connector_atomic_check(connector, &state->base);
 297         if (ret)
 298                 return ret;
 299
 300         ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state);
 301         if (ret)
 302                 return ret;
 303
 304         if (!old_conn_state->crtc)
 305                 return 0;
 306
 307         /* We only want to free VCPI if this state disables the CRTC on this
 308          * connector
 309          */
 310         if (new_crtc) {
 311                 struct intel_crtc *crtc = to_intel_crtc(new_crtc);
 312                 struct intel_crtc_state *crtc_state =
 313                         intel_atomic_get_new_crtc_state(state, crtc);
 314
 315                 if (!crtc_state ||
 316                     !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) ||
 317                     crtc_state->uapi.enable)
 318                         return 0;
 319         }
 320
 321         mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr;
 322         ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr,
 323                                                intel_connector->port);
 324
 325         return ret;
 326 }
 327
 328 static void clear_act_sent(struct intel_encoder *encoder,
 329                            const struct intel_crtc_state *crtc_state)
 330 {
 331         struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 332
 333         intel_de_write(i915, dp_tp_status_reg(encoder, crtc_state),
 334                        DP_TP_STATUS_ACT_SENT);
 335 }
 336
 337 static void wait_for_act_sent(struct intel_encoder *encoder,
 338                               const struct intel_crtc_state *crtc_state)
 339 {
 340         struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 341         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 342         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 343
 344         if (intel_de_wait_for_set(i915, dp_tp_status_reg(encoder, crtc_state),
 345                                   DP_TP_STATUS_ACT_SENT, 1))
 346                 drm_err(&i915->drm, "Timed out waiting for ACT sent\n");
 347
 348         drm_dp_check_act_status(&intel_dp->mst_mgr);
 349 }
 350
 351 static void intel_mst_pre_disable_dp(struct intel_atomic_state *state,
 352                                      struct intel_encoder *encoder,
 353                                      const struct intel_crtc_state *old_crtc_state,
 354                                      const struct drm_connector_state *old_conn_state)
 355 {
 356         if (old_crtc_state->has_audio)
 357                 intel_audio_codec_disable(encoder, old_crtc_state,
 358                                           old_conn_state);
 359 }
 360
 361 static void intel_mst_disable_dp(struct intel_atomic_state *state,
 362                                  struct intel_encoder *encoder,
 363                                  const struct intel_crtc_state *old_crtc_state,
 364                                  const struct drm_connector_state *old_conn_state)
 365 {
 366         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 367         struct intel_digital_port *dig_port = intel_mst->primary;
 368         struct intel_dp *intel_dp = &dig_port->dp;
 369         struct intel_connector *connector =
 370                 to_intel_connector(old_conn_state->connector);
 371         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 372         int ret;
 373
 374         drm_dbg_kms(&i915->drm, "active links %d\n",
 375                     intel_dp->active_mst_links);
 376
 377         intel_hdcp_disable(intel_mst->connector);
 378
 379         drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
 380
 381         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr, 1);
 382         if (ret) {
 383                 drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
 384         }
 385 }
 386
 387 static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
 388                                       struct intel_encoder *encoder,
 389                                       const struct intel_crtc_state *old_crtc_state,
 390                                       const struct drm_connector_state *old_conn_state)
 391 {
 392         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 393         struct intel_digital_port *dig_port = intel_mst->primary;
 394         struct intel_dp *intel_dp = &dig_port->dp;
 395         struct intel_connector *connector =
 396                 to_intel_connector(old_conn_state->connector);
 397         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 398         bool last_mst_stream;
 399
 400         intel_dp->active_mst_links--;
 401         last_mst_stream = intel_dp->active_mst_links == 0;
 402         drm_WARN_ON(&dev_priv->drm,
 403                     DISPLAY_VER(dev_priv) >= 12 && last_mst_stream &&
 404                     !intel_dp_mst_is_master_trans(old_crtc_state));
 405
 406         intel_crtc_vblank_off(old_crtc_state);
 407
 408         intel_disable_transcoder(old_crtc_state);
 409
 410         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 411
 412         clear_act_sent(encoder, old_crtc_state);
 413
 414         intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
 415                      TRANS_DDI_DP_VC_PAYLOAD_ALLOC, 0);
 416
 417         wait_for_act_sent(encoder, old_crtc_state);
 418
 419         drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
 420
 421         intel_ddi_disable_transcoder_func(old_crtc_state);
 422
 423         if (DISPLAY_VER(dev_priv) >= 9)
 424                 skl_scaler_disable(old_crtc_state);
 425         else
 426                 ilk_pfit_disable(old_crtc_state);
 427
 428         /*
 429          * Power down mst path before disabling the port, otherwise we end
 430          * up getting interrupts from the sink upon detecting link loss.
 431          */
 432         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
 433                                      false);
 434
 435         /*
 436          * BSpec 4287: disable DIP after the transcoder is disabled and before
 437          * the transcoder clock select is set to none.
 438          */
 439         if (last_mst_stream)
 440                 intel_dp_set_infoframes(&dig_port->base, false,
 441                                         old_crtc_state, NULL);
 442         /*
 443          * From TGL spec: "If multi-stream slave transcoder: Configure
 444          * Transcoder Clock Select to direct no clock to the transcoder"
 445          *
 446          * From older GENs spec: "Configure Transcoder Clock Select to direct
 447          * no clock to the transcoder"
 448          */
 449         if (DISPLAY_VER(dev_priv) < 12 || !last_mst_stream)
 450                 intel_ddi_disable_pipe_clock(old_crtc_state);
 451
 452
 453         intel_mst->connector = NULL;
 454         if (last_mst_stream)
 455                 dig_port->base.post_disable(state, &dig_port->base,
 456                                                   old_crtc_state, NULL);
 457
 458         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 459                     intel_dp->active_mst_links);
 460 }
 461
 462 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
 463                                         struct intel_encoder *encoder,
 464                                         const struct intel_crtc_state *pipe_config,
 465                                         const struct drm_connector_state *conn_state)
 466 {
 467         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 468         struct intel_digital_port *dig_port = intel_mst->primary;
 469         struct intel_dp *intel_dp = &dig_port->dp;
 470
 471         if (intel_dp->active_mst_links == 0)
 472                 dig_port->base.pre_pll_enable(state, &dig_port->base,
 473                                                     pipe_config, NULL);
 474 }
 475
 476 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
 477                                     struct intel_encoder *encoder,
 478                                     const struct intel_crtc_state *pipe_config,
 479                                     const struct drm_connector_state *conn_state)
 480 {
 481         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 482         struct intel_digital_port *dig_port = intel_mst->primary;
 483         struct intel_dp *intel_dp = &dig_port->dp;
 484         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 485         struct intel_connector *connector =
 486                 to_intel_connector(conn_state->connector);
 487         int ret;
 488         bool first_mst_stream;
 489
 490         /* MST encoders are bound to a crtc, not to a connector,
 491          * force the mapping here for get_hw_state.
 492          */
 493         connector->encoder = encoder;
 494         intel_mst->connector = connector;
 495         first_mst_stream = intel_dp->active_mst_links == 0;
 496         drm_WARN_ON(&dev_priv->drm,
 497                     DISPLAY_VER(dev_priv) >= 12 && first_mst_stream &&
 498                     !intel_dp_mst_is_master_trans(pipe_config));
 499
 500         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 501                     intel_dp->active_mst_links);
 502
 503         if (first_mst_stream)
 504                 intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
 505
 506         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
 507
 508         if (first_mst_stream)
 509                 dig_port->base.pre_enable(state, &dig_port->base,
 510                                                 pipe_config, NULL);
 511
 512         ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
 513                                        connector->port,
 514                                        pipe_config->pbn,
 515                                        pipe_config->dp_m_n.tu);
 516         if (!ret)
 517                 drm_err(&dev_priv->drm, "failed to allocate vcpi\n");
 518
 519         intel_dp->active_mst_links++;
 520
 521         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr, 1);
 522
 523         /*
 524          * Before Gen 12 this is not done as part of
 525          * dig_port->base.pre_enable() and should be done here. For
 526          * Gen 12+ the step in which this should be done is different for the
 527          * first MST stream, so it's done on the DDI for the first stream and
 528          * here for the following ones.
 529          */
 530         if (DISPLAY_VER(dev_priv) < 12 || !first_mst_stream)
 531                 intel_ddi_enable_pipe_clock(encoder, pipe_config);
 532
 533         intel_ddi_set_dp_msa(pipe_config, conn_state);
 534
 535         intel_dp_set_m_n(pipe_config, M1_N1);
 536 }
 537
 538 static void intel_mst_enable_dp(struct intel_atomic_state *state,
 539                                 struct intel_encoder *encoder,
 540                                 const struct intel_crtc_state *pipe_config,
 541                                 const struct drm_connector_state *conn_state)
 542 {
 543         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 544         struct intel_digital_port *dig_port = intel_mst->primary;
 545         struct intel_dp *intel_dp = &dig_port->dp;
 546         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 547         enum transcoder trans = pipe_config->cpu_transcoder;
 548
 549         drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
 550
 551         clear_act_sent(encoder, pipe_config);
 552
 553         if (intel_dp_is_uhbr(pipe_config)) {
 554                 const struct drm_display_mode *adjusted_mode =
 555                         &pipe_config->hw.adjusted_mode;
 556                 u64 crtc_clock_hz = KHz(adjusted_mode->crtc_clock);
 557
 558                 intel_de_write(dev_priv, TRANS_DP2_VFREQHIGH(pipe_config->cpu_transcoder),
 559                                TRANS_DP2_VFREQ_PIXEL_CLOCK(crtc_clock_hz >> 24));
 560                 intel_de_write(dev_priv, TRANS_DP2_VFREQLOW(pipe_config->cpu_transcoder),
 561                                TRANS_DP2_VFREQ_PIXEL_CLOCK(crtc_clock_hz & 0xffffff));
 562         }
 563
 564         intel_ddi_enable_transcoder_func(encoder, pipe_config);
 565
 566         intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(trans), 0,
 567                      TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
 568
 569         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 570                     intel_dp->active_mst_links);
 571
 572         wait_for_act_sent(encoder, pipe_config);
 573
 574         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 575
 576         if (DISPLAY_VER(dev_priv) >= 12 && pipe_config->fec_enable)
 577                 intel_de_rmw(dev_priv, CHICKEN_TRANS(trans), 0,
 578                              FECSTALL_DIS_DPTSTREAM_DPTTG);
 579
 580         intel_enable_transcoder(pipe_config);
 581
 582         intel_crtc_vblank_on(pipe_config);
 583
 584         if (pipe_config->has_audio)
 585                 intel_audio_codec_enable(encoder, pipe_config, conn_state);
 586
 587         /* Enable hdcp if it's desired */
 588         if (conn_state->content_protection ==
 589             DRM_MODE_CONTENT_PROTECTION_DESIRED)
 590                 intel_hdcp_enable(to_intel_connector(conn_state->connector),
 591                                   pipe_config,
 592                                   (u8)conn_state->hdcp_content_type);
 593 }
 594
 595 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
 596                                       enum pipe *pipe)
 597 {
 598         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 599         *pipe = intel_mst->pipe;
 600         if (intel_mst->connector)
 601                 return true;
 602         return false;
 603 }
 604
 605 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
 606                                         struct intel_crtc_state *pipe_config)
 607 {
 608         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 609         struct intel_digital_port *dig_port = intel_mst->primary;
 610
 611         dig_port->base.get_config(&dig_port->base, pipe_config);
 612 }
 613
 614 static bool intel_dp_mst_initial_fastset_check(struct intel_encoder *encoder,
 615                                                struct intel_crtc_state *crtc_state)
 616 {
 617         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 618         struct intel_digital_port *dig_port = intel_mst->primary;
 619
 620         return intel_dp_initial_fastset_check(&dig_port->base, crtc_state);
 621 }
 622
 623 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
 624 {
 625         struct intel_connector *intel_connector = to_intel_connector(connector);
 626         struct intel_dp *intel_dp = intel_connector->mst_port;
 627         struct edid *edid;
 628         int ret;
 629
 630         if (drm_connector_is_unregistered(connector))
 631                 return intel_connector_update_modes(connector, NULL);
 632
 633         edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
 634         ret = intel_connector_update_modes(connector, edid);
 635         kfree(edid);
 636
 637         return ret;
 638 }
 639
 640 static int
 641 intel_dp_mst_connector_late_register(struct drm_connector *connector)
 642 {
 643         struct intel_connector *intel_connector = to_intel_connector(connector);
 644         int ret;
 645
 646         ret = drm_dp_mst_connector_late_register(connector,
 647                                                  intel_connector->port);
 648         if (ret < 0)
 649                 return ret;
 650
 651         ret = intel_connector_register(connector);
 652         if (ret < 0)
 653                 drm_dp_mst_connector_early_unregister(connector,
 654                                                       intel_connector->port);
 655
 656         return ret;
 657 }
 658
 659 static void
 660 intel_dp_mst_connector_early_unregister(struct drm_connector *connector)
 661 {
 662         struct intel_connector *intel_connector = to_intel_connector(connector);
 663
 664         intel_connector_unregister(connector);
 665         drm_dp_mst_connector_early_unregister(connector,
 666                                               intel_connector->port);
 667 }
 668
 669 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
 670         .fill_modes = drm_helper_probe_single_connector_modes,
 671         .atomic_get_property = intel_digital_connector_atomic_get_property,
 672         .atomic_set_property = intel_digital_connector_atomic_set_property,
 673         .late_register = intel_dp_mst_connector_late_register,
 674         .early_unregister = intel_dp_mst_connector_early_unregister,
 675         .destroy = intel_connector_destroy,
 676         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 677         .atomic_duplicate_state = intel_digital_connector_duplicate_state,
 678 };
 679
 680 static int intel_dp_mst_get_modes(struct drm_connector *connector)
 681 {
 682         return intel_dp_mst_get_ddc_modes(connector);
 683 }
 684
 685 static int
 686 intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
 687                             struct drm_display_mode *mode,
 688                             struct drm_modeset_acquire_ctx *ctx,
 689                             enum drm_mode_status *status)
 690 {
 691         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 692         struct intel_connector *intel_connector = to_intel_connector(connector);
 693         struct intel_dp *intel_dp = intel_connector->mst_port;
 694         struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
 695         struct drm_dp_mst_port *port = intel_connector->port;
 696         const int min_bpp = 18;
 697         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 698         int max_rate, mode_rate, max_lanes, max_link_clock;
 699         int ret;
 700
 701         if (drm_connector_is_unregistered(connector)) {
 702                 *status = MODE_ERROR;
 703                 return 0;
 704         }
 705
 706         if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
 707                 *status = MODE_NO_DBLESCAN;
 708                 return 0;
 709         }
 710
 711         max_link_clock = intel_dp_max_link_rate(intel_dp);
 712         max_lanes = intel_dp_max_lane_count(intel_dp);
 713
 714         max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
 715         mode_rate = intel_dp_link_required(mode->clock, min_bpp);
 716
 717         ret = drm_modeset_lock(&mgr->base.lock, ctx);
 718         if (ret)
 719                 return ret;
 720
 721         if (mode_rate > max_rate || mode->clock > max_dotclk ||
 722             drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) {
 723                 *status = MODE_CLOCK_HIGH;
 724                 return 0;
 725         }
 726
 727         if (mode->clock < 10000) {
 728                 *status = MODE_CLOCK_LOW;
 729                 return 0;
 730         }
 731
 732         if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
 733                 *status = MODE_H_ILLEGAL;
 734                 return 0;
 735         }
 736
 737         *status = intel_mode_valid_max_plane_size(dev_priv, mode, false);
 738         return 0;
 739 }
 740
 741 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
 742                                                          struct drm_atomic_state *state)
 743 {
 744         struct drm_connector_state *connector_state = drm_atomic_get_new_connector_state(state,
 745                                                                                          connector);
 746         struct intel_connector *intel_connector = to_intel_connector(connector);
 747         struct intel_dp *intel_dp = intel_connector->mst_port;
 748         struct intel_crtc *crtc = to_intel_crtc(connector_state->crtc);
 749
 750         return &intel_dp->mst_encoders[crtc->pipe]->base.base;
 751 }
 752
 753 static int
 754 intel_dp_mst_detect(struct drm_connector *connector,
 755                     struct drm_modeset_acquire_ctx *ctx, bool force)
 756 {
 757         struct drm_i915_private *i915 = to_i915(connector->dev);
 758         struct intel_connector *intel_connector = to_intel_connector(connector);
 759         struct intel_dp *intel_dp = intel_connector->mst_port;
 760
 761         if (!INTEL_DISPLAY_ENABLED(i915))
 762                 return connector_status_disconnected;
 763
 764         if (drm_connector_is_unregistered(connector))
 765                 return connector_status_disconnected;
 766
 767         return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
 768                                       intel_connector->port);
 769 }
 770
 771 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
 772         .get_modes = intel_dp_mst_get_modes,
 773         .mode_valid_ctx = intel_dp_mst_mode_valid_ctx,
 774         .atomic_best_encoder = intel_mst_atomic_best_encoder,
 775         .atomic_check = intel_dp_mst_atomic_check,
 776         .detect_ctx = intel_dp_mst_detect,
 777 };
 778
 779 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
 780 {
 781         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder));
 782
 783         drm_encoder_cleanup(encoder);
 784         kfree(intel_mst);
 785 }
 786
 787 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
 788         .destroy = intel_dp_mst_encoder_destroy,
 789 };
 790
 791 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
 792 {
 793         if (intel_attached_encoder(connector) && connector->base.state->crtc) {
 794                 enum pipe pipe;
 795                 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe))
 796                         return false;
 797                 return true;
 798         }
 799         return false;
 800 }
 801
 802 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
 803 {
 804         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
 805         struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 806         struct drm_device *dev = dig_port->base.base.dev;
 807         struct drm_i915_private *dev_priv = to_i915(dev);
 808         struct intel_connector *intel_connector;
 809         struct drm_connector *connector;
 810         enum pipe pipe;
 811         int ret;
 812
 813         intel_connector = intel_connector_alloc();
 814         if (!intel_connector)
 815                 return NULL;
 816
 817         intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
 818         intel_connector->mst_port = intel_dp;
 819         intel_connector->port = port;
 820         drm_dp_mst_get_port_malloc(port);
 821
 822         connector = &intel_connector->base;
 823         ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
 824                                  DRM_MODE_CONNECTOR_DisplayPort);
 825         if (ret) {
 826                 intel_connector_free(intel_connector);
 827                 return NULL;
 828         }
 829
 830         drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
 831
 832         for_each_pipe(dev_priv, pipe) {
 833                 struct drm_encoder *enc =
 834                         &intel_dp->mst_encoders[pipe]->base.base;
 835
 836                 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
 837                 if (ret)
 838                         goto err;
 839         }
 840
 841         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
 842         drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
 843
 844         ret = drm_connector_set_path_property(connector, pathprop);
 845         if (ret)
 846                 goto err;
 847
 848         intel_attach_force_audio_property(connector);
 849         intel_attach_broadcast_rgb_property(connector);
 850
 851         ret = intel_dp_hdcp_init(dig_port, intel_connector);
 852         if (ret)
 853                 drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP MST init failed, skipping.\n",
 854                             connector->name, connector->base.id);
 855         /*
 856          * Reuse the prop from the SST connector because we're
 857          * not allowed to create new props after device registration.
 858          */
 859         connector->max_bpc_property =
 860                 intel_dp->attached_connector->base.max_bpc_property;
 861         if (connector->max_bpc_property)
 862                 drm_connector_attach_max_bpc_property(connector, 6, 12);
 863
 864         return connector;
 865
 866 err:
 867         drm_connector_cleanup(connector);
 868         return NULL;
 869 }
 870
 871 static void
 872 intel_dp_mst_poll_hpd_irq(struct drm_dp_mst_topology_mgr *mgr)
 873 {
 874         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
 875
 876         intel_hpd_trigger_irq(dp_to_dig_port(intel_dp));
 877 }
 878
 879 static const struct drm_dp_mst_topology_cbs mst_cbs = {
 880         .add_connector = intel_dp_add_mst_connector,
 881         .poll_hpd_irq = intel_dp_mst_poll_hpd_irq,
 882 };
 883
 884 static struct intel_dp_mst_encoder *
 885 intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe pipe)
 886 {
 887         struct intel_dp_mst_encoder *intel_mst;
 888         struct intel_encoder *intel_encoder;
 889         struct drm_device *dev = dig_port->base.base.dev;
 890
 891         intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
 892
 893         if (!intel_mst)
 894                 return NULL;
 895
 896         intel_mst->pipe = pipe;
 897         intel_encoder = &intel_mst->base;
 898         intel_mst->primary = dig_port;
 899
 900         drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
 901                          DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
 902
 903         intel_encoder->type = INTEL_OUTPUT_DP_MST;
 904         intel_encoder->power_domain = dig_port->base.power_domain;
 905         intel_encoder->port = dig_port->base.port;
 906         intel_encoder->cloneable = 0;
 907         /*
 908          * This is wrong, but broken userspace uses the intersection
 909          * of possible_crtcs of all the encoders of a given connector
 910          * to figure out which crtcs can drive said connector. What
 911          * should be used instead is the union of possible_crtcs.
 912          * To keep such userspace functioning we must misconfigure
 913          * this to make sure the intersection is not empty :(
 914          */
 915         intel_encoder->pipe_mask = ~0;
 916
 917         intel_encoder->compute_config = intel_dp_mst_compute_config;
 918         intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
 919         intel_encoder->pre_disable = intel_mst_pre_disable_dp;
 920         intel_encoder->disable = intel_mst_disable_dp;
 921         intel_encoder->post_disable = intel_mst_post_disable_dp;
 922         intel_encoder->update_pipe = intel_ddi_update_pipe;
 923         intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
 924         intel_encoder->pre_enable = intel_mst_pre_enable_dp;
 925         intel_encoder->enable = intel_mst_enable_dp;
 926         intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
 927         intel_encoder->get_config = intel_dp_mst_enc_get_config;
 928         intel_encoder->initial_fastset_check = intel_dp_mst_initial_fastset_check;
 929
 930         return intel_mst;
 931
 932 }
 933
 934 static bool
 935 intel_dp_create_fake_mst_encoders(struct intel_digital_port *dig_port)
 936 {
 937         struct intel_dp *intel_dp = &dig_port->dp;
 938         struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
 939         enum pipe pipe;
 940
 941         for_each_pipe(dev_priv, pipe)
 942                 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(dig_port, pipe);
 943         return true;
 944 }
 945
 946 int
 947 intel_dp_mst_encoder_active_links(struct intel_digital_port *dig_port)
 948 {
 949         return dig_port->dp.active_mst_links;
 950 }
 951
 952 int
 953 intel_dp_mst_encoder_init(struct intel_digital_port *dig_port, int conn_base_id)
 954 {
 955         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 956         struct intel_dp *intel_dp = &dig_port->dp;
 957         enum port port = dig_port->base.port;
 958         int ret;
 959         int max_source_rate =
 960                 intel_dp->source_rates[intel_dp->num_source_rates - 1];
 961
 962         if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
 963                 return 0;
 964
 965         if (DISPLAY_VER(i915) < 12 && port == PORT_A)
 966                 return 0;
 967
 968         if (DISPLAY_VER(i915) < 11 && port == PORT_E)
 969                 return 0;
 970
 971         intel_dp->mst_mgr.cbs = &mst_cbs;
 972
 973         /* create encoders */
 974         intel_dp_create_fake_mst_encoders(dig_port);
 975         ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
 976                                            &intel_dp->aux, 16, 3,
 977                                            dig_port->max_lanes,
 978                                            max_source_rate,
 979                                            conn_base_id);
 980         if (ret) {
 981                 intel_dp->mst_mgr.cbs = NULL;
 982                 return ret;
 983         }
 984
 985         return 0;
 986 }
 987
 988 bool intel_dp_mst_source_support(struct intel_dp *intel_dp)
 989 {
 990         return intel_dp->mst_mgr.cbs;
 991 }
 992
 993 void
 994 intel_dp_mst_encoder_cleanup(struct intel_digital_port *dig_port)
 995 {
 996         struct intel_dp *intel_dp = &dig_port->dp;
 997
 998         if (!intel_dp_mst_source_support(intel_dp))
 999                 return;
1000
1001         drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
1002         /* encoders will get killed by normal cleanup */
1003
1004         intel_dp->mst_mgr.cbs = NULL;
1005 }
1006
1007 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
1008 {
1009         return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder;
1010 }
1011
1012 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state)
1013 {
1014         return crtc_state->mst_master_transcoder != INVALID_TRANSCODER &&
1015                crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder;
1016 }