drm/i915: Push TRANS_DDI_FUNC_CTL into the encoder->enable() hook
[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / display / intel_dp_mst.c
1 /*
2  * Copyright © 2008 Intel Corporation
3  *             2014 Red Hat Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22  * IN THE SOFTWARE.
23  *
24  */
25
26 #include <drm/drm_atomic_helper.h>
27 #include <drm/drm_edid.h>
28 #include <drm/drm_probe_helper.h>
29
30 #include "i915_drv.h"
31 #include "intel_atomic.h"
32 #include "intel_audio.h"
33 #include "intel_connector.h"
34 #include "intel_ddi.h"
35 #include "intel_display_types.h"
36 #include "intel_dp.h"
37 #include "intel_dp_mst.h"
38 #include "intel_dpio_phy.h"
39
40 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
41                                             struct intel_crtc_state *crtc_state,
42                                             struct drm_connector_state *conn_state,
43                                             struct link_config_limits *limits)
44 {
45         struct drm_atomic_state *state = crtc_state->uapi.state;
46         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
47         struct intel_dp *intel_dp = &intel_mst->primary->dp;
48         struct intel_connector *connector =
49                 to_intel_connector(conn_state->connector);
50         struct drm_i915_private *i915 = to_i915(connector->base.dev);
51         const struct drm_display_mode *adjusted_mode =
52                 &crtc_state->hw.adjusted_mode;
53         bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0,
54                                            DP_DPCD_QUIRK_CONSTANT_N);
55         int bpp, slots = -EINVAL;
56
57         crtc_state->lane_count = limits->max_lane_count;
58         crtc_state->port_clock = limits->max_clock;
59
60         for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
61                 crtc_state->pipe_bpp = bpp;
62
63                 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
64                                                        crtc_state->pipe_bpp,
65                                                        false);
66
67                 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
68                                                       connector->port,
69                                                       crtc_state->pbn, 0);
70                 if (slots == -EDEADLK)
71                         return slots;
72                 if (slots >= 0)
73                         break;
74         }
75
76         if (slots < 0) {
77                 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
78                             slots);
79                 return slots;
80         }
81
82         intel_link_compute_m_n(crtc_state->pipe_bpp,
83                                crtc_state->lane_count,
84                                adjusted_mode->crtc_clock,
85                                crtc_state->port_clock,
86                                &crtc_state->dp_m_n,
87                                constant_n, crtc_state->fec_enable);
88         crtc_state->dp_m_n.tu = slots;
89
90         return 0;
91 }
92
93 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
94                                        struct intel_crtc_state *pipe_config,
95                                        struct drm_connector_state *conn_state)
96 {
97         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
98         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
99         struct intel_dp *intel_dp = &intel_mst->primary->dp;
100         struct intel_connector *connector =
101                 to_intel_connector(conn_state->connector);
102         struct intel_digital_connector_state *intel_conn_state =
103                 to_intel_digital_connector_state(conn_state);
104         const struct drm_display_mode *adjusted_mode =
105                 &pipe_config->hw.adjusted_mode;
106         struct link_config_limits limits;
107         int ret;
108
109         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
110                 return -EINVAL;
111
112         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
113         pipe_config->has_pch_encoder = false;
114
115         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
116                 pipe_config->has_audio =
117                         drm_dp_mst_port_has_audio(&intel_dp->mst_mgr,
118                                                   connector->port);
119         else
120                 pipe_config->has_audio =
121                         intel_conn_state->force_audio == HDMI_AUDIO_ON;
122
123         /*
124          * for MST we always configure max link bw - the spec doesn't
125          * seem to suggest we should do otherwise.
126          */
127         limits.min_clock =
128         limits.max_clock = intel_dp_max_link_rate(intel_dp);
129
130         limits.min_lane_count =
131         limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
132
133         limits.min_bpp = intel_dp_min_bpp(pipe_config);
134         /*
135          * FIXME: If all the streams can't fit into the link with
136          * their current pipe_bpp we should reduce pipe_bpp across
137          * the board until things start to fit. Until then we
138          * limit to <= 8bpc since that's what was hardcoded for all
139          * MST streams previously. This hack should be removed once
140          * we have the proper retry logic in place.
141          */
142         limits.max_bpp = min(pipe_config->pipe_bpp, 24);
143
144         intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
145
146         ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
147                                                conn_state, &limits);
148         if (ret)
149                 return ret;
150
151         pipe_config->limited_color_range =
152                 intel_dp_limited_color_range(pipe_config, conn_state);
153
154         if (IS_GEN9_LP(dev_priv))
155                 pipe_config->lane_lat_optim_mask =
156                         bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
157
158         intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
159
160         return 0;
161 }
162
163 /*
164  * Iterate over all connectors and return a mask of
165  * all CPU transcoders streaming over the same DP link.
166  */
167 static unsigned int
168 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
169                              struct intel_dp *mst_port)
170 {
171         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
172         const struct intel_digital_connector_state *conn_state;
173         struct intel_connector *connector;
174         u8 transcoders = 0;
175         int i;
176
177         if (INTEL_GEN(dev_priv) < 12)
178                 return 0;
179
180         for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
181                 const struct intel_crtc_state *crtc_state;
182                 struct intel_crtc *crtc;
183
184                 if (connector->mst_port != mst_port || !conn_state->base.crtc)
185                         continue;
186
187                 crtc = to_intel_crtc(conn_state->base.crtc);
188                 crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
189
190                 if (!crtc_state->hw.active)
191                         continue;
192
193                 transcoders |= BIT(crtc_state->cpu_transcoder);
194         }
195
196         return transcoders;
197 }
198
199 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder,
200                                             struct intel_crtc_state *crtc_state,
201                                             struct drm_connector_state *conn_state)
202 {
203         struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
204         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
205         struct intel_dp *intel_dp = &intel_mst->primary->dp;
206
207         /* lowest numbered transcoder will be designated master */
208         crtc_state->mst_master_transcoder =
209                 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
210
211         return 0;
212 }
213
214 /*
215  * If one of the connectors in a MST stream needs a modeset, mark all CRTCs
216  * that shares the same MST stream as mode changed,
217  * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do
218  * a fastset when possible.
219  */
220 static int
221 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
222                                        struct intel_atomic_state *state)
223 {
224         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
225         struct drm_connector_list_iter connector_list_iter;
226         struct intel_connector *connector_iter;
227
228         if (INTEL_GEN(dev_priv) < 12)
229                 return  0;
230
231         if (!intel_connector_needs_modeset(state, &connector->base))
232                 return 0;
233
234         drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter);
235         for_each_intel_connector_iter(connector_iter, &connector_list_iter) {
236                 struct intel_digital_connector_state *conn_iter_state;
237                 struct intel_crtc_state *crtc_state;
238                 struct intel_crtc *crtc;
239                 int ret;
240
241                 if (connector_iter->mst_port != connector->mst_port ||
242                     connector_iter == connector)
243                         continue;
244
245                 conn_iter_state = intel_atomic_get_digital_connector_state(state,
246                                                                            connector_iter);
247                 if (IS_ERR(conn_iter_state)) {
248                         drm_connector_list_iter_end(&connector_list_iter);
249                         return PTR_ERR(conn_iter_state);
250                 }
251
252                 if (!conn_iter_state->base.crtc)
253                         continue;
254
255                 crtc = to_intel_crtc(conn_iter_state->base.crtc);
256                 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
257                 if (IS_ERR(crtc_state)) {
258                         drm_connector_list_iter_end(&connector_list_iter);
259                         return PTR_ERR(crtc_state);
260                 }
261
262                 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
263                 if (ret) {
264                         drm_connector_list_iter_end(&connector_list_iter);
265                         return ret;
266                 }
267                 crtc_state->uapi.mode_changed = true;
268         }
269         drm_connector_list_iter_end(&connector_list_iter);
270
271         return 0;
272 }
273
274 static int
275 intel_dp_mst_atomic_check(struct drm_connector *connector,
276                           struct drm_atomic_state *_state)
277 {
278         struct intel_atomic_state *state = to_intel_atomic_state(_state);
279         struct drm_connector_state *new_conn_state =
280                 drm_atomic_get_new_connector_state(&state->base, connector);
281         struct drm_connector_state *old_conn_state =
282                 drm_atomic_get_old_connector_state(&state->base, connector);
283         struct intel_connector *intel_connector =
284                 to_intel_connector(connector);
285         struct drm_crtc *new_crtc = new_conn_state->crtc;
286         struct drm_dp_mst_topology_mgr *mgr;
287         int ret;
288
289         ret = intel_digital_connector_atomic_check(connector, &state->base);
290         if (ret)
291                 return ret;
292
293         ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state);
294         if (ret)
295                 return ret;
296
297         if (!old_conn_state->crtc)
298                 return 0;
299
300         /* We only want to free VCPI if this state disables the CRTC on this
301          * connector
302          */
303         if (new_crtc) {
304                 struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc);
305                 struct intel_crtc_state *crtc_state =
306                         intel_atomic_get_new_crtc_state(state, intel_crtc);
307
308                 if (!crtc_state ||
309                     !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) ||
310                     crtc_state->uapi.enable)
311                         return 0;
312         }
313
314         mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr;
315         ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr,
316                                                intel_connector->port);
317
318         return ret;
319 }
320
321 static void intel_mst_disable_dp(struct intel_atomic_state *state,
322                                  struct intel_encoder *encoder,
323                                  const struct intel_crtc_state *old_crtc_state,
324                                  const struct drm_connector_state *old_conn_state)
325 {
326         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
327         struct intel_digital_port *intel_dig_port = intel_mst->primary;
328         struct intel_dp *intel_dp = &intel_dig_port->dp;
329         struct intel_connector *connector =
330                 to_intel_connector(old_conn_state->connector);
331         struct drm_i915_private *i915 = to_i915(connector->base.dev);
332         int ret;
333
334         drm_dbg_kms(&i915->drm, "active links %d\n",
335                     intel_dp->active_mst_links);
336
337         drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
338
339         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
340         if (ret) {
341                 drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
342         }
343         if (old_crtc_state->has_audio)
344                 intel_audio_codec_disable(encoder,
345                                           old_crtc_state, old_conn_state);
346 }
347
348 static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
349                                       struct intel_encoder *encoder,
350                                       const struct intel_crtc_state *old_crtc_state,
351                                       const struct drm_connector_state *old_conn_state)
352 {
353         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
354         struct intel_digital_port *intel_dig_port = intel_mst->primary;
355         struct intel_dp *intel_dp = &intel_dig_port->dp;
356         struct intel_connector *connector =
357                 to_intel_connector(old_conn_state->connector);
358         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
359         bool last_mst_stream;
360         u32 val;
361
362         intel_dp->active_mst_links--;
363         last_mst_stream = intel_dp->active_mst_links == 0;
364         drm_WARN_ON(&dev_priv->drm,
365                     INTEL_GEN(dev_priv) >= 12 && last_mst_stream &&
366                     !intel_dp_mst_is_master_trans(old_crtc_state));
367
368         intel_crtc_vblank_off(old_crtc_state);
369
370         intel_disable_pipe(old_crtc_state);
371
372         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
373
374         val = intel_de_read(dev_priv,
375                             TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder));
376         val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
377         intel_de_write(dev_priv,
378                        TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
379                        val);
380
381         if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
382                                   DP_TP_STATUS_ACT_SENT, 1))
383                 drm_err(&dev_priv->drm,
384                         "Timed out waiting for ACT sent when disabling\n");
385         drm_dp_check_act_status(&intel_dp->mst_mgr);
386
387         drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
388
389         intel_ddi_disable_transcoder_func(old_crtc_state);
390
391         if (INTEL_GEN(dev_priv) >= 9)
392                 skl_scaler_disable(old_crtc_state);
393         else
394                 ilk_pfit_disable(old_crtc_state);
395
396         /*
397          * Power down mst path before disabling the port, otherwise we end
398          * up getting interrupts from the sink upon detecting link loss.
399          */
400         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
401                                      false);
402         /*
403          * From TGL spec: "If multi-stream slave transcoder: Configure
404          * Transcoder Clock Select to direct no clock to the transcoder"
405          *
406          * From older GENs spec: "Configure Transcoder Clock Select to direct
407          * no clock to the transcoder"
408          */
409         if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream)
410                 intel_ddi_disable_pipe_clock(old_crtc_state);
411
412
413         intel_mst->connector = NULL;
414         if (last_mst_stream)
415                 intel_dig_port->base.post_disable(state, &intel_dig_port->base,
416                                                   old_crtc_state, NULL);
417
418         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
419                     intel_dp->active_mst_links);
420 }
421
422 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
423                                         struct intel_encoder *encoder,
424                                         const struct intel_crtc_state *pipe_config,
425                                         const struct drm_connector_state *conn_state)
426 {
427         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
428         struct intel_digital_port *intel_dig_port = intel_mst->primary;
429         struct intel_dp *intel_dp = &intel_dig_port->dp;
430
431         if (intel_dp->active_mst_links == 0)
432                 intel_dig_port->base.pre_pll_enable(state, &intel_dig_port->base,
433                                                     pipe_config, NULL);
434 }
435
436 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
437                                     struct intel_encoder *encoder,
438                                     const struct intel_crtc_state *pipe_config,
439                                     const struct drm_connector_state *conn_state)
440 {
441         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
442         struct intel_digital_port *intel_dig_port = intel_mst->primary;
443         struct intel_dp *intel_dp = &intel_dig_port->dp;
444         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
445         struct intel_connector *connector =
446                 to_intel_connector(conn_state->connector);
447         int ret;
448         u32 temp;
449         bool first_mst_stream;
450
451         /* MST encoders are bound to a crtc, not to a connector,
452          * force the mapping here for get_hw_state.
453          */
454         connector->encoder = encoder;
455         intel_mst->connector = connector;
456         first_mst_stream = intel_dp->active_mst_links == 0;
457         drm_WARN_ON(&dev_priv->drm,
458                     INTEL_GEN(dev_priv) >= 12 && first_mst_stream &&
459                     !intel_dp_mst_is_master_trans(pipe_config));
460
461         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
462                     intel_dp->active_mst_links);
463
464         if (first_mst_stream)
465                 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
466
467         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
468
469         if (first_mst_stream)
470                 intel_dig_port->base.pre_enable(state, &intel_dig_port->base,
471                                                 pipe_config, NULL);
472
473         ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
474                                        connector->port,
475                                        pipe_config->pbn,
476                                        pipe_config->dp_m_n.tu);
477         if (!ret)
478                 drm_err(&dev_priv->drm, "failed to allocate vcpi\n");
479
480         intel_dp->active_mst_links++;
481         temp = intel_de_read(dev_priv, intel_dp->regs.dp_tp_status);
482         intel_de_write(dev_priv, intel_dp->regs.dp_tp_status, temp);
483
484         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
485
486         /*
487          * Before Gen 12 this is not done as part of
488          * intel_dig_port->base.pre_enable() and should be done here. For
489          * Gen 12+ the step in which this should be done is different for the
490          * first MST stream, so it's done on the DDI for the first stream and
491          * here for the following ones.
492          */
493         if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream)
494                 intel_ddi_enable_pipe_clock(encoder, pipe_config);
495
496         intel_ddi_set_dp_msa(pipe_config, conn_state);
497
498         intel_dp_set_m_n(pipe_config, M1_N1);
499 }
500
501 static void intel_mst_enable_dp(struct intel_atomic_state *state,
502                                 struct intel_encoder *encoder,
503                                 const struct intel_crtc_state *pipe_config,
504                                 const struct drm_connector_state *conn_state)
505 {
506         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
507         struct intel_digital_port *intel_dig_port = intel_mst->primary;
508         struct intel_dp *intel_dp = &intel_dig_port->dp;
509         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
510
511         drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
512
513         intel_ddi_enable_transcoder_func(pipe_config);
514
515         intel_enable_pipe(pipe_config);
516
517         intel_crtc_vblank_on(pipe_config);
518
519         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
520                     intel_dp->active_mst_links);
521
522         if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
523                                   DP_TP_STATUS_ACT_SENT, 1))
524                 drm_err(&dev_priv->drm, "Timed out waiting for ACT sent\n");
525
526         drm_dp_check_act_status(&intel_dp->mst_mgr);
527
528         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
529         if (pipe_config->has_audio)
530                 intel_audio_codec_enable(encoder, pipe_config, conn_state);
531 }
532
533 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
534                                       enum pipe *pipe)
535 {
536         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
537         *pipe = intel_mst->pipe;
538         if (intel_mst->connector)
539                 return true;
540         return false;
541 }
542
543 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
544                                         struct intel_crtc_state *pipe_config)
545 {
546         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
547         struct intel_digital_port *intel_dig_port = intel_mst->primary;
548
549         intel_ddi_get_config(&intel_dig_port->base, pipe_config);
550 }
551
552 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
553 {
554         struct intel_connector *intel_connector = to_intel_connector(connector);
555         struct intel_dp *intel_dp = intel_connector->mst_port;
556         struct edid *edid;
557         int ret;
558
559         if (drm_connector_is_unregistered(connector))
560                 return intel_connector_update_modes(connector, NULL);
561
562         edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
563         ret = intel_connector_update_modes(connector, edid);
564         kfree(edid);
565
566         return ret;
567 }
568
569 static int
570 intel_dp_mst_connector_late_register(struct drm_connector *connector)
571 {
572         struct intel_connector *intel_connector = to_intel_connector(connector);
573         int ret;
574
575         ret = drm_dp_mst_connector_late_register(connector,
576                                                  intel_connector->port);
577         if (ret < 0)
578                 return ret;
579
580         ret = intel_connector_register(connector);
581         if (ret < 0)
582                 drm_dp_mst_connector_early_unregister(connector,
583                                                       intel_connector->port);
584
585         return ret;
586 }
587
588 static void
589 intel_dp_mst_connector_early_unregister(struct drm_connector *connector)
590 {
591         struct intel_connector *intel_connector = to_intel_connector(connector);
592
593         intel_connector_unregister(connector);
594         drm_dp_mst_connector_early_unregister(connector,
595                                               intel_connector->port);
596 }
597
598 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
599         .fill_modes = drm_helper_probe_single_connector_modes,
600         .atomic_get_property = intel_digital_connector_atomic_get_property,
601         .atomic_set_property = intel_digital_connector_atomic_set_property,
602         .late_register = intel_dp_mst_connector_late_register,
603         .early_unregister = intel_dp_mst_connector_early_unregister,
604         .destroy = intel_connector_destroy,
605         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
606         .atomic_duplicate_state = intel_digital_connector_duplicate_state,
607 };
608
609 static int intel_dp_mst_get_modes(struct drm_connector *connector)
610 {
611         return intel_dp_mst_get_ddc_modes(connector);
612 }
613
614 static enum drm_mode_status
615 intel_dp_mst_mode_valid(struct drm_connector *connector,
616                         struct drm_display_mode *mode)
617 {
618         struct drm_i915_private *dev_priv = to_i915(connector->dev);
619         struct intel_connector *intel_connector = to_intel_connector(connector);
620         struct intel_dp *intel_dp = intel_connector->mst_port;
621         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
622         int max_rate, mode_rate, max_lanes, max_link_clock;
623
624         if (drm_connector_is_unregistered(connector))
625                 return MODE_ERROR;
626
627         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
628                 return MODE_NO_DBLESCAN;
629
630         max_link_clock = intel_dp_max_link_rate(intel_dp);
631         max_lanes = intel_dp_max_lane_count(intel_dp);
632
633         max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
634         mode_rate = intel_dp_link_required(mode->clock, 18);
635
636         /* TODO - validate mode against available PBN for link */
637         if (mode->clock < 10000)
638                 return MODE_CLOCK_LOW;
639
640         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
641                 return MODE_H_ILLEGAL;
642
643         if (mode_rate > max_rate || mode->clock > max_dotclk)
644                 return MODE_CLOCK_HIGH;
645
646         return intel_mode_valid_max_plane_size(dev_priv, mode);
647 }
648
649 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
650                                                          struct drm_connector_state *state)
651 {
652         struct intel_connector *intel_connector = to_intel_connector(connector);
653         struct intel_dp *intel_dp = intel_connector->mst_port;
654         struct intel_crtc *crtc = to_intel_crtc(state->crtc);
655
656         return &intel_dp->mst_encoders[crtc->pipe]->base.base;
657 }
658
659 static int
660 intel_dp_mst_detect(struct drm_connector *connector,
661                     struct drm_modeset_acquire_ctx *ctx, bool force)
662 {
663         struct intel_connector *intel_connector = to_intel_connector(connector);
664         struct intel_dp *intel_dp = intel_connector->mst_port;
665
666         if (drm_connector_is_unregistered(connector))
667                 return connector_status_disconnected;
668
669         return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
670                                       intel_connector->port);
671 }
672
673 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
674         .get_modes = intel_dp_mst_get_modes,
675         .mode_valid = intel_dp_mst_mode_valid,
676         .atomic_best_encoder = intel_mst_atomic_best_encoder,
677         .atomic_check = intel_dp_mst_atomic_check,
678         .detect_ctx = intel_dp_mst_detect,
679 };
680
681 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
682 {
683         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder));
684
685         drm_encoder_cleanup(encoder);
686         kfree(intel_mst);
687 }
688
689 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
690         .destroy = intel_dp_mst_encoder_destroy,
691 };
692
693 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
694 {
695         if (intel_attached_encoder(connector) && connector->base.state->crtc) {
696                 enum pipe pipe;
697                 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe))
698                         return false;
699                 return true;
700         }
701         return false;
702 }
703
704 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
705 {
706         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
707         struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
708         struct drm_device *dev = intel_dig_port->base.base.dev;
709         struct drm_i915_private *dev_priv = to_i915(dev);
710         struct intel_connector *intel_connector;
711         struct drm_connector *connector;
712         enum pipe pipe;
713         int ret;
714
715         intel_connector = intel_connector_alloc();
716         if (!intel_connector)
717                 return NULL;
718
719         intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
720         intel_connector->mst_port = intel_dp;
721         intel_connector->port = port;
722         drm_dp_mst_get_port_malloc(port);
723
724         connector = &intel_connector->base;
725         ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
726                                  DRM_MODE_CONNECTOR_DisplayPort);
727         if (ret) {
728                 intel_connector_free(intel_connector);
729                 return NULL;
730         }
731
732         drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
733
734         for_each_pipe(dev_priv, pipe) {
735                 struct drm_encoder *enc =
736                         &intel_dp->mst_encoders[pipe]->base.base;
737
738                 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
739                 if (ret)
740                         goto err;
741         }
742
743         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
744         drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
745
746         ret = drm_connector_set_path_property(connector, pathprop);
747         if (ret)
748                 goto err;
749
750         intel_attach_force_audio_property(connector);
751         intel_attach_broadcast_rgb_property(connector);
752
753         /*
754          * Reuse the prop from the SST connector because we're
755          * not allowed to create new props after device registration.
756          */
757         connector->max_bpc_property =
758                 intel_dp->attached_connector->base.max_bpc_property;
759         if (connector->max_bpc_property)
760                 drm_connector_attach_max_bpc_property(connector, 6, 12);
761
762         return connector;
763
764 err:
765         drm_connector_cleanup(connector);
766         return NULL;
767 }
768
769 static const struct drm_dp_mst_topology_cbs mst_cbs = {
770         .add_connector = intel_dp_add_mst_connector,
771 };
772
773 static struct intel_dp_mst_encoder *
774 intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
775 {
776         struct intel_dp_mst_encoder *intel_mst;
777         struct intel_encoder *intel_encoder;
778         struct drm_device *dev = intel_dig_port->base.base.dev;
779
780         intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
781
782         if (!intel_mst)
783                 return NULL;
784
785         intel_mst->pipe = pipe;
786         intel_encoder = &intel_mst->base;
787         intel_mst->primary = intel_dig_port;
788
789         drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
790                          DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
791
792         intel_encoder->type = INTEL_OUTPUT_DP_MST;
793         intel_encoder->power_domain = intel_dig_port->base.power_domain;
794         intel_encoder->port = intel_dig_port->base.port;
795         intel_encoder->cloneable = 0;
796         /*
797          * This is wrong, but broken userspace uses the intersection
798          * of possible_crtcs of all the encoders of a given connector
799          * to figure out which crtcs can drive said connector. What
800          * should be used instead is the union of possible_crtcs.
801          * To keep such userspace functioning we must misconfigure
802          * this to make sure the intersection is not empty :(
803          */
804         intel_encoder->pipe_mask = ~0;
805
806         intel_encoder->compute_config = intel_dp_mst_compute_config;
807         intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
808         intel_encoder->disable = intel_mst_disable_dp;
809         intel_encoder->post_disable = intel_mst_post_disable_dp;
810         intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
811         intel_encoder->pre_enable = intel_mst_pre_enable_dp;
812         intel_encoder->enable = intel_mst_enable_dp;
813         intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
814         intel_encoder->get_config = intel_dp_mst_enc_get_config;
815
816         return intel_mst;
817
818 }
819
820 static bool
821 intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
822 {
823         struct intel_dp *intel_dp = &intel_dig_port->dp;
824         struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
825         enum pipe pipe;
826
827         for_each_pipe(dev_priv, pipe)
828                 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe);
829         return true;
830 }
831
832 int
833 intel_dp_mst_encoder_active_links(struct intel_digital_port *intel_dig_port)
834 {
835         return intel_dig_port->dp.active_mst_links;
836 }
837
838 int
839 intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
840 {
841         struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev);
842         struct intel_dp *intel_dp = &intel_dig_port->dp;
843         enum port port = intel_dig_port->base.port;
844         int ret;
845
846         if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
847                 return 0;
848
849         if (INTEL_GEN(i915) < 12 && port == PORT_A)
850                 return 0;
851
852         if (INTEL_GEN(i915) < 11 && port == PORT_E)
853                 return 0;
854
855         intel_dp->mst_mgr.cbs = &mst_cbs;
856
857         /* create encoders */
858         intel_dp_create_fake_mst_encoders(intel_dig_port);
859         ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
860                                            &intel_dp->aux, 16, 3, conn_base_id);
861         if (ret)
862                 return ret;
863
864         intel_dp->can_mst = true;
865
866         return 0;
867 }
868
869 void
870 intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
871 {
872         struct intel_dp *intel_dp = &intel_dig_port->dp;
873
874         if (!intel_dp->can_mst)
875                 return;
876
877         drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
878         /* encoders will get killed by normal cleanup */
879 }
880
881 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
882 {
883         return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder;
884 }
885
886 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state)
887 {
888         return crtc_state->mst_master_transcoder != INVALID_TRANSCODER &&
889                crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder;
890 }