drivers/gpu/drm/i915/display/intel_dp_mst.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *             2014 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  *
  24  */
  25
  26 #include <drm/drm_atomic.h>
  27 #include <drm/drm_atomic_helper.h>
  28 #include <drm/drm_edid.h>
  29 #include <drm/drm_probe_helper.h>
  30
  31 #include "i915_drv.h"
  32 #include "intel_atomic.h"
  33 #include "intel_audio.h"
  34 #include "intel_connector.h"
  35 #include "intel_crtc.h"
  36 #include "intel_ddi.h"
  37 #include "intel_de.h"
  38 #include "intel_display_types.h"
  39 #include "intel_dp.h"
  40 #include "intel_dp_hdcp.h"
  41 #include "intel_dp_mst.h"
  42 #include "intel_dpio_phy.h"
  43 #include "intel_hdcp.h"
  44 #include "intel_hotplug.h"
  45 #include "skl_scaler.h"
  46
  47 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
  48                                             struct intel_crtc_state *crtc_state,
  49                                             struct drm_connector_state *conn_state,
  50                                             struct link_config_limits *limits)
  51 {
  52         struct drm_atomic_state *state = crtc_state->uapi.state;
  53         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  54         struct intel_dp *intel_dp = &intel_mst->primary->dp;
  55         struct intel_connector *connector =
  56                 to_intel_connector(conn_state->connector);
  57         struct drm_i915_private *i915 = to_i915(connector->base.dev);
  58         const struct drm_display_mode *adjusted_mode =
  59                 &crtc_state->hw.adjusted_mode;
  60         bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
  61         int bpp, slots = -EINVAL;
  62
  63         crtc_state->lane_count = limits->max_lane_count;
  64         crtc_state->port_clock = limits->max_rate;
  65
  66         for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
  67                 crtc_state->pipe_bpp = bpp;
  68
  69                 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
  70                                                        crtc_state->pipe_bpp,
  71                                                        false);
  72
  73                 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
  74                                                       connector->port,
  75                                                       crtc_state->pbn,
  76                                                       drm_dp_get_vc_payload_bw(&intel_dp->mst_mgr,
  77                                                                                crtc_state->port_clock,
  78                                                                                crtc_state->lane_count));
  79                 if (slots == -EDEADLK)
  80                         return slots;
  81                 if (slots >= 0)
  82                         break;
  83         }
  84
  85         if (slots < 0) {
  86                 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
  87                             slots);
  88                 return slots;
  89         }
  90
  91         intel_link_compute_m_n(crtc_state->pipe_bpp,
  92                                crtc_state->lane_count,
  93                                adjusted_mode->crtc_clock,
  94                                crtc_state->port_clock,
  95                                &crtc_state->dp_m_n,
  96                                constant_n, crtc_state->fec_enable);
  97         crtc_state->dp_m_n.tu = slots;
  98
  99         return 0;
 100 }
 101
 102 static int intel_dp_mst_update_slots(struct intel_encoder *encoder,
 103                                      struct intel_crtc_state *crtc_state,
 104                                      struct drm_connector_state *conn_state)
 105 {
 106         struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 107         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 108         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 109         struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
 110         struct drm_dp_mst_topology_state *topology_state;
 111         u8 link_coding_cap = intel_dp_is_uhbr(crtc_state) ?
 112                 DP_CAP_ANSI_128B132B : DP_CAP_ANSI_8B10B;
 113
 114         topology_state = drm_atomic_get_mst_topology_state(conn_state->state, mgr);
 115         if (IS_ERR(topology_state)) {
 116                 drm_dbg_kms(&i915->drm, "slot update failed\n");
 117                 return PTR_ERR(topology_state);
 118         }
 119
 120         drm_dp_mst_update_slots(topology_state, link_coding_cap);
 121
 122         return 0;
 123 }
 124
 125 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 126                                        struct intel_crtc_state *pipe_config,
 127                                        struct drm_connector_state *conn_state)
 128 {
 129         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 130         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 131         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 132         struct intel_connector *connector =
 133                 to_intel_connector(conn_state->connector);
 134         struct intel_digital_connector_state *intel_conn_state =
 135                 to_intel_digital_connector_state(conn_state);
 136         const struct drm_display_mode *adjusted_mode =
 137                 &pipe_config->hw.adjusted_mode;
 138         struct link_config_limits limits;
 139         int ret;
 140
 141         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 142                 return -EINVAL;
 143
 144         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 145         pipe_config->has_pch_encoder = false;
 146
 147         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
 148                 pipe_config->has_audio = connector->port->has_audio;
 149         else
 150                 pipe_config->has_audio =
 151                         intel_conn_state->force_audio == HDMI_AUDIO_ON;
 152
 153         /*
 154          * for MST we always configure max link bw - the spec doesn't
 155          * seem to suggest we should do otherwise.
 156          */
 157         limits.min_rate =
 158         limits.max_rate = intel_dp_max_link_rate(intel_dp);
 159
 160         limits.min_lane_count =
 161         limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 162
 163         limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format);
 164         /*
 165          * FIXME: If all the streams can't fit into the link with
 166          * their current pipe_bpp we should reduce pipe_bpp across
 167          * the board until things start to fit. Until then we
 168          * limit to <= 8bpc since that's what was hardcoded for all
 169          * MST streams previously. This hack should be removed once
 170          * we have the proper retry logic in place.
 171          */
 172         limits.max_bpp = min(pipe_config->pipe_bpp, 24);
 173
 174         intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
 175
 176         ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
 177                                                conn_state, &limits);
 178         if (ret)
 179                 return ret;
 180
 181         ret = intel_dp_mst_update_slots(encoder, pipe_config, conn_state);
 182         if (ret)
 183                 return ret;
 184
 185         pipe_config->limited_color_range =
 186                 intel_dp_limited_color_range(pipe_config, conn_state);
 187
 188         if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
 189                 pipe_config->lane_lat_optim_mask =
 190                         bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
 191
 192         intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 193
 194         return 0;
 195 }
 196
 197 /*
 198  * Iterate over all connectors and return a mask of
 199  * all CPU transcoders streaming over the same DP link.
 200  */
 201 static unsigned int
 202 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
 203                              struct intel_dp *mst_port)
 204 {
 205         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 206         const struct intel_digital_connector_state *conn_state;
 207         struct intel_connector *connector;
 208         u8 transcoders = 0;
 209         int i;
 210
 211         if (DISPLAY_VER(dev_priv) < 12)
 212                 return 0;
 213
 214         for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
 215                 const struct intel_crtc_state *crtc_state;
 216                 struct intel_crtc *crtc;
 217
 218                 if (connector->mst_port != mst_port || !conn_state->base.crtc)
 219                         continue;
 220
 221                 crtc = to_intel_crtc(conn_state->base.crtc);
 222                 crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
 223
 224                 if (!crtc_state->hw.active)
 225                         continue;
 226
 227                 transcoders |= BIT(crtc_state->cpu_transcoder);
 228         }
 229
 230         return transcoders;
 231 }
 232
 233 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder,
 234                                             struct intel_crtc_state *crtc_state,
 235                                             struct drm_connector_state *conn_state)
 236 {
 237         struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
 238         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 239         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 240
 241         /* lowest numbered transcoder will be designated master */
 242         crtc_state->mst_master_transcoder =
 243                 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
 244
 245         return 0;
 246 }
 247
 248 /*
 249  * If one of the connectors in a MST stream needs a modeset, mark all CRTCs
 250  * that shares the same MST stream as mode changed,
 251  * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do
 252  * a fastset when possible.
 253  */
 254 static int
 255 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
 256                                        struct intel_atomic_state *state)
 257 {
 258         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 259         struct drm_connector_list_iter connector_list_iter;
 260         struct intel_connector *connector_iter;
 261         int ret = 0;
 262
 263         if (DISPLAY_VER(dev_priv) < 12)
 264                 return  0;
 265
 266         if (!intel_connector_needs_modeset(state, &connector->base))
 267                 return 0;
 268
 269         drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter);
 270         for_each_intel_connector_iter(connector_iter, &connector_list_iter) {
 271                 struct intel_digital_connector_state *conn_iter_state;
 272                 struct intel_crtc_state *crtc_state;
 273                 struct intel_crtc *crtc;
 274
 275                 if (connector_iter->mst_port != connector->mst_port ||
 276                     connector_iter == connector)
 277                         continue;
 278
 279                 conn_iter_state = intel_atomic_get_digital_connector_state(state,
 280                                                                            connector_iter);
 281                 if (IS_ERR(conn_iter_state)) {
 282                         ret = PTR_ERR(conn_iter_state);
 283                         break;
 284                 }
 285
 286                 if (!conn_iter_state->base.crtc)
 287                         continue;
 288
 289                 crtc = to_intel_crtc(conn_iter_state->base.crtc);
 290                 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
 291                 if (IS_ERR(crtc_state)) {
 292                         ret = PTR_ERR(crtc_state);
 293                         break;
 294                 }
 295
 296                 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
 297                 if (ret)
 298                         break;
 299                 crtc_state->uapi.mode_changed = true;
 300         }
 301         drm_connector_list_iter_end(&connector_list_iter);
 302
 303         return ret;
 304 }
 305
 306 static int
 307 intel_dp_mst_atomic_check(struct drm_connector *connector,
 308                           struct drm_atomic_state *_state)
 309 {
 310         struct intel_atomic_state *state = to_intel_atomic_state(_state);
 311         struct drm_connector_state *new_conn_state =
 312                 drm_atomic_get_new_connector_state(&state->base, connector);
 313         struct drm_connector_state *old_conn_state =
 314                 drm_atomic_get_old_connector_state(&state->base, connector);
 315         struct intel_connector *intel_connector =
 316                 to_intel_connector(connector);
 317         struct drm_crtc *new_crtc = new_conn_state->crtc;
 318         struct drm_dp_mst_topology_mgr *mgr;
 319         int ret;
 320
 321         ret = intel_digital_connector_atomic_check(connector, &state->base);
 322         if (ret)
 323                 return ret;
 324
 325         ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state);
 326         if (ret)
 327                 return ret;
 328
 329         if (!old_conn_state->crtc)
 330                 return 0;
 331
 332         /* We only want to free VCPI if this state disables the CRTC on this
 333          * connector
 334          */
 335         if (new_crtc) {
 336                 struct intel_crtc *crtc = to_intel_crtc(new_crtc);
 337                 struct intel_crtc_state *crtc_state =
 338                         intel_atomic_get_new_crtc_state(state, crtc);
 339
 340                 if (!crtc_state ||
 341                     !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) ||
 342                     crtc_state->uapi.enable)
 343                         return 0;
 344         }
 345
 346         mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr;
 347         ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr,
 348                                                intel_connector->port);
 349
 350         return ret;
 351 }
 352
 353 static void clear_act_sent(struct intel_encoder *encoder,
 354                            const struct intel_crtc_state *crtc_state)
 355 {
 356         struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 357
 358         intel_de_write(i915, dp_tp_status_reg(encoder, crtc_state),
 359                        DP_TP_STATUS_ACT_SENT);
 360 }
 361
 362 static void wait_for_act_sent(struct intel_encoder *encoder,
 363                               const struct intel_crtc_state *crtc_state)
 364 {
 365         struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 366         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 367         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 368
 369         if (intel_de_wait_for_set(i915, dp_tp_status_reg(encoder, crtc_state),
 370                                   DP_TP_STATUS_ACT_SENT, 1))
 371                 drm_err(&i915->drm, "Timed out waiting for ACT sent\n");
 372
 373         drm_dp_check_act_status(&intel_dp->mst_mgr);
 374 }
 375
 376 static void intel_mst_disable_dp(struct intel_atomic_state *state,
 377                                  struct intel_encoder *encoder,
 378                                  const struct intel_crtc_state *old_crtc_state,
 379                                  const struct drm_connector_state *old_conn_state)
 380 {
 381         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 382         struct intel_digital_port *dig_port = intel_mst->primary;
 383         struct intel_dp *intel_dp = &dig_port->dp;
 384         struct intel_connector *connector =
 385                 to_intel_connector(old_conn_state->connector);
 386         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 387         int start_slot = intel_dp_is_uhbr(old_crtc_state) ? 0 : 1;
 388         int ret;
 389
 390         drm_dbg_kms(&i915->drm, "active links %d\n",
 391                     intel_dp->active_mst_links);
 392
 393         intel_hdcp_disable(intel_mst->connector);
 394
 395         drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
 396
 397         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr, start_slot);
 398         if (ret) {
 399                 drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
 400         }
 401
 402         intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
 403 }
 404
 405 static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
 406                                       struct intel_encoder *encoder,
 407                                       const struct intel_crtc_state *old_crtc_state,
 408                                       const struct drm_connector_state *old_conn_state)
 409 {
 410         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 411         struct intel_digital_port *dig_port = intel_mst->primary;
 412         struct intel_dp *intel_dp = &dig_port->dp;
 413         struct intel_connector *connector =
 414                 to_intel_connector(old_conn_state->connector);
 415         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 416         bool last_mst_stream;
 417
 418         intel_dp->active_mst_links--;
 419         last_mst_stream = intel_dp->active_mst_links == 0;
 420         drm_WARN_ON(&dev_priv->drm,
 421                     DISPLAY_VER(dev_priv) >= 12 && last_mst_stream &&
 422                     !intel_dp_mst_is_master_trans(old_crtc_state));
 423
 424         intel_crtc_vblank_off(old_crtc_state);
 425
 426         intel_disable_transcoder(old_crtc_state);
 427
 428         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 429
 430         clear_act_sent(encoder, old_crtc_state);
 431
 432         intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
 433                      TRANS_DDI_DP_VC_PAYLOAD_ALLOC, 0);
 434
 435         wait_for_act_sent(encoder, old_crtc_state);
 436
 437         drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
 438
 439         intel_ddi_disable_transcoder_func(old_crtc_state);
 440
 441         if (DISPLAY_VER(dev_priv) >= 9)
 442                 skl_scaler_disable(old_crtc_state);
 443         else
 444                 ilk_pfit_disable(old_crtc_state);
 445
 446         /*
 447          * Power down mst path before disabling the port, otherwise we end
 448          * up getting interrupts from the sink upon detecting link loss.
 449          */
 450         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
 451                                      false);
 452
 453         /*
 454          * BSpec 4287: disable DIP after the transcoder is disabled and before
 455          * the transcoder clock select is set to none.
 456          */
 457         if (last_mst_stream)
 458                 intel_dp_set_infoframes(&dig_port->base, false,
 459                                         old_crtc_state, NULL);
 460         /*
 461          * From TGL spec: "If multi-stream slave transcoder: Configure
 462          * Transcoder Clock Select to direct no clock to the transcoder"
 463          *
 464          * From older GENs spec: "Configure Transcoder Clock Select to direct
 465          * no clock to the transcoder"
 466          */
 467         if (DISPLAY_VER(dev_priv) < 12 || !last_mst_stream)
 468                 intel_ddi_disable_pipe_clock(old_crtc_state);
 469
 470
 471         intel_mst->connector = NULL;
 472         if (last_mst_stream)
 473                 dig_port->base.post_disable(state, &dig_port->base,
 474                                                   old_crtc_state, NULL);
 475
 476         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 477                     intel_dp->active_mst_links);
 478 }
 479
 480 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
 481                                         struct intel_encoder *encoder,
 482                                         const struct intel_crtc_state *pipe_config,
 483                                         const struct drm_connector_state *conn_state)
 484 {
 485         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 486         struct intel_digital_port *dig_port = intel_mst->primary;
 487         struct intel_dp *intel_dp = &dig_port->dp;
 488
 489         if (intel_dp->active_mst_links == 0)
 490                 dig_port->base.pre_pll_enable(state, &dig_port->base,
 491                                                     pipe_config, NULL);
 492 }
 493
 494 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
 495                                     struct intel_encoder *encoder,
 496                                     const struct intel_crtc_state *pipe_config,
 497                                     const struct drm_connector_state *conn_state)
 498 {
 499         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 500         struct intel_digital_port *dig_port = intel_mst->primary;
 501         struct intel_dp *intel_dp = &dig_port->dp;
 502         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 503         struct intel_connector *connector =
 504                 to_intel_connector(conn_state->connector);
 505         int start_slot = intel_dp_is_uhbr(pipe_config) ? 0 : 1;
 506         int ret;
 507         bool first_mst_stream;
 508
 509         /* MST encoders are bound to a crtc, not to a connector,
 510          * force the mapping here for get_hw_state.
 511          */
 512         connector->encoder = encoder;
 513         intel_mst->connector = connector;
 514         first_mst_stream = intel_dp->active_mst_links == 0;
 515         drm_WARN_ON(&dev_priv->drm,
 516                     DISPLAY_VER(dev_priv) >= 12 && first_mst_stream &&
 517                     !intel_dp_mst_is_master_trans(pipe_config));
 518
 519         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 520                     intel_dp->active_mst_links);
 521
 522         if (first_mst_stream)
 523                 intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
 524
 525         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
 526
 527         if (first_mst_stream)
 528                 dig_port->base.pre_enable(state, &dig_port->base,
 529                                                 pipe_config, NULL);
 530
 531         ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
 532                                        connector->port,
 533                                        pipe_config->pbn,
 534                                        pipe_config->dp_m_n.tu);
 535         if (!ret)
 536                 drm_err(&dev_priv->drm, "failed to allocate vcpi\n");
 537
 538         intel_dp->active_mst_links++;
 539
 540         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr, start_slot);
 541
 542         /*
 543          * Before Gen 12 this is not done as part of
 544          * dig_port->base.pre_enable() and should be done here. For
 545          * Gen 12+ the step in which this should be done is different for the
 546          * first MST stream, so it's done on the DDI for the first stream and
 547          * here for the following ones.
 548          */
 549         if (DISPLAY_VER(dev_priv) < 12 || !first_mst_stream)
 550                 intel_ddi_enable_pipe_clock(encoder, pipe_config);
 551
 552         intel_ddi_set_dp_msa(pipe_config, conn_state);
 553 }
 554
 555 static void intel_mst_enable_dp(struct intel_atomic_state *state,
 556                                 struct intel_encoder *encoder,
 557                                 const struct intel_crtc_state *pipe_config,
 558                                 const struct drm_connector_state *conn_state)
 559 {
 560         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 561         struct intel_digital_port *dig_port = intel_mst->primary;
 562         struct intel_dp *intel_dp = &dig_port->dp;
 563         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 564         enum transcoder trans = pipe_config->cpu_transcoder;
 565
 566         drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
 567
 568         clear_act_sent(encoder, pipe_config);
 569
 570         if (intel_dp_is_uhbr(pipe_config)) {
 571                 const struct drm_display_mode *adjusted_mode =
 572                         &pipe_config->hw.adjusted_mode;
 573                 u64 crtc_clock_hz = KHz(adjusted_mode->crtc_clock);
 574
 575                 intel_de_write(dev_priv, TRANS_DP2_VFREQHIGH(pipe_config->cpu_transcoder),
 576                                TRANS_DP2_VFREQ_PIXEL_CLOCK(crtc_clock_hz >> 24));
 577                 intel_de_write(dev_priv, TRANS_DP2_VFREQLOW(pipe_config->cpu_transcoder),
 578                                TRANS_DP2_VFREQ_PIXEL_CLOCK(crtc_clock_hz & 0xffffff));
 579         }
 580
 581         intel_ddi_enable_transcoder_func(encoder, pipe_config);
 582
 583         intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(trans), 0,
 584                      TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
 585
 586         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 587                     intel_dp->active_mst_links);
 588
 589         wait_for_act_sent(encoder, pipe_config);
 590
 591         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 592
 593         if (DISPLAY_VER(dev_priv) >= 12 && pipe_config->fec_enable)
 594                 intel_de_rmw(dev_priv, CHICKEN_TRANS(trans), 0,
 595                              FECSTALL_DIS_DPTSTREAM_DPTTG);
 596
 597         intel_enable_transcoder(pipe_config);
 598
 599         intel_crtc_vblank_on(pipe_config);
 600
 601         intel_audio_codec_enable(encoder, pipe_config, conn_state);
 602
 603         /* Enable hdcp if it's desired */
 604         if (conn_state->content_protection ==
 605             DRM_MODE_CONTENT_PROTECTION_DESIRED)
 606                 intel_hdcp_enable(to_intel_connector(conn_state->connector),
 607                                   pipe_config,
 608                                   (u8)conn_state->hdcp_content_type);
 609 }
 610
 611 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
 612                                       enum pipe *pipe)
 613 {
 614         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 615         *pipe = intel_mst->pipe;
 616         if (intel_mst->connector)
 617                 return true;
 618         return false;
 619 }
 620
 621 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
 622                                         struct intel_crtc_state *pipe_config)
 623 {
 624         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 625         struct intel_digital_port *dig_port = intel_mst->primary;
 626
 627         dig_port->base.get_config(&dig_port->base, pipe_config);
 628 }
 629
 630 static bool intel_dp_mst_initial_fastset_check(struct intel_encoder *encoder,
 631                                                struct intel_crtc_state *crtc_state)
 632 {
 633         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 634         struct intel_digital_port *dig_port = intel_mst->primary;
 635
 636         return intel_dp_initial_fastset_check(&dig_port->base, crtc_state);
 637 }
 638
 639 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
 640 {
 641         struct intel_connector *intel_connector = to_intel_connector(connector);
 642         struct intel_dp *intel_dp = intel_connector->mst_port;
 643         struct edid *edid;
 644         int ret;
 645
 646         if (drm_connector_is_unregistered(connector))
 647                 return intel_connector_update_modes(connector, NULL);
 648
 649         edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
 650         ret = intel_connector_update_modes(connector, edid);
 651         kfree(edid);
 652
 653         return ret;
 654 }
 655
 656 static int
 657 intel_dp_mst_connector_late_register(struct drm_connector *connector)
 658 {
 659         struct intel_connector *intel_connector = to_intel_connector(connector);
 660         int ret;
 661
 662         ret = drm_dp_mst_connector_late_register(connector,
 663                                                  intel_connector->port);
 664         if (ret < 0)
 665                 return ret;
 666
 667         ret = intel_connector_register(connector);
 668         if (ret < 0)
 669                 drm_dp_mst_connector_early_unregister(connector,
 670                                                       intel_connector->port);
 671
 672         return ret;
 673 }
 674
 675 static void
 676 intel_dp_mst_connector_early_unregister(struct drm_connector *connector)
 677 {
 678         struct intel_connector *intel_connector = to_intel_connector(connector);
 679
 680         intel_connector_unregister(connector);
 681         drm_dp_mst_connector_early_unregister(connector,
 682                                               intel_connector->port);
 683 }
 684
 685 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
 686         .fill_modes = drm_helper_probe_single_connector_modes,
 687         .atomic_get_property = intel_digital_connector_atomic_get_property,
 688         .atomic_set_property = intel_digital_connector_atomic_set_property,
 689         .late_register = intel_dp_mst_connector_late_register,
 690         .early_unregister = intel_dp_mst_connector_early_unregister,
 691         .destroy = intel_connector_destroy,
 692         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 693         .atomic_duplicate_state = intel_digital_connector_duplicate_state,
 694 };
 695
 696 static int intel_dp_mst_get_modes(struct drm_connector *connector)
 697 {
 698         return intel_dp_mst_get_ddc_modes(connector);
 699 }
 700
 701 static int
 702 intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
 703                             struct drm_display_mode *mode,
 704                             struct drm_modeset_acquire_ctx *ctx,
 705                             enum drm_mode_status *status)
 706 {
 707         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 708         struct intel_connector *intel_connector = to_intel_connector(connector);
 709         struct intel_dp *intel_dp = intel_connector->mst_port;
 710         struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
 711         struct drm_dp_mst_port *port = intel_connector->port;
 712         const int min_bpp = 18;
 713         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 714         int max_rate, mode_rate, max_lanes, max_link_clock;
 715         int ret;
 716
 717         if (drm_connector_is_unregistered(connector)) {
 718                 *status = MODE_ERROR;
 719                 return 0;
 720         }
 721
 722         if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
 723                 *status = MODE_NO_DBLESCAN;
 724                 return 0;
 725         }
 726
 727         max_link_clock = intel_dp_max_link_rate(intel_dp);
 728         max_lanes = intel_dp_max_lane_count(intel_dp);
 729
 730         max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
 731         mode_rate = intel_dp_link_required(mode->clock, min_bpp);
 732
 733         ret = drm_modeset_lock(&mgr->base.lock, ctx);
 734         if (ret)
 735                 return ret;
 736
 737         if (mode_rate > max_rate || mode->clock > max_dotclk ||
 738             drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) {
 739                 *status = MODE_CLOCK_HIGH;
 740                 return 0;
 741         }
 742
 743         if (mode->clock < 10000) {
 744                 *status = MODE_CLOCK_LOW;
 745                 return 0;
 746         }
 747
 748         if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
 749                 *status = MODE_H_ILLEGAL;
 750                 return 0;
 751         }
 752
 753         *status = intel_mode_valid_max_plane_size(dev_priv, mode, false);
 754         return 0;
 755 }
 756
 757 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
 758                                                          struct drm_atomic_state *state)
 759 {
 760         struct drm_connector_state *connector_state = drm_atomic_get_new_connector_state(state,
 761                                                                                          connector);
 762         struct intel_connector *intel_connector = to_intel_connector(connector);
 763         struct intel_dp *intel_dp = intel_connector->mst_port;
 764         struct intel_crtc *crtc = to_intel_crtc(connector_state->crtc);
 765
 766         return &intel_dp->mst_encoders[crtc->pipe]->base.base;
 767 }
 768
 769 static int
 770 intel_dp_mst_detect(struct drm_connector *connector,
 771                     struct drm_modeset_acquire_ctx *ctx, bool force)
 772 {
 773         struct drm_i915_private *i915 = to_i915(connector->dev);
 774         struct intel_connector *intel_connector = to_intel_connector(connector);
 775         struct intel_dp *intel_dp = intel_connector->mst_port;
 776
 777         if (!INTEL_DISPLAY_ENABLED(i915))
 778                 return connector_status_disconnected;
 779
 780         if (drm_connector_is_unregistered(connector))
 781                 return connector_status_disconnected;
 782
 783         return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
 784                                       intel_connector->port);
 785 }
 786
 787 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
 788         .get_modes = intel_dp_mst_get_modes,
 789         .mode_valid_ctx = intel_dp_mst_mode_valid_ctx,
 790         .atomic_best_encoder = intel_mst_atomic_best_encoder,
 791         .atomic_check = intel_dp_mst_atomic_check,
 792         .detect_ctx = intel_dp_mst_detect,
 793 };
 794
 795 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
 796 {
 797         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder));
 798
 799         drm_encoder_cleanup(encoder);
 800         kfree(intel_mst);
 801 }
 802
 803 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
 804         .destroy = intel_dp_mst_encoder_destroy,
 805 };
 806
 807 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
 808 {
 809         if (intel_attached_encoder(connector) && connector->base.state->crtc) {
 810                 enum pipe pipe;
 811                 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe))
 812                         return false;
 813                 return true;
 814         }
 815         return false;
 816 }
 817
 818 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
 819 {
 820         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
 821         struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 822         struct drm_device *dev = dig_port->base.base.dev;
 823         struct drm_i915_private *dev_priv = to_i915(dev);
 824         struct intel_connector *intel_connector;
 825         struct drm_connector *connector;
 826         enum pipe pipe;
 827         int ret;
 828
 829         intel_connector = intel_connector_alloc();
 830         if (!intel_connector)
 831                 return NULL;
 832
 833         intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
 834         intel_connector->mst_port = intel_dp;
 835         intel_connector->port = port;
 836         drm_dp_mst_get_port_malloc(port);
 837
 838         connector = &intel_connector->base;
 839         ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
 840                                  DRM_MODE_CONNECTOR_DisplayPort);
 841         if (ret) {
 842                 intel_connector_free(intel_connector);
 843                 return NULL;
 844         }
 845
 846         drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
 847
 848         for_each_pipe(dev_priv, pipe) {
 849                 struct drm_encoder *enc =
 850                         &intel_dp->mst_encoders[pipe]->base.base;
 851
 852                 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
 853                 if (ret)
 854                         goto err;
 855         }
 856
 857         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
 858         drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
 859
 860         ret = drm_connector_set_path_property(connector, pathprop);
 861         if (ret)
 862                 goto err;
 863
 864         intel_attach_force_audio_property(connector);
 865         intel_attach_broadcast_rgb_property(connector);
 866
 867         ret = intel_dp_hdcp_init(dig_port, intel_connector);
 868         if (ret)
 869                 drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP MST init failed, skipping.\n",
 870                             connector->name, connector->base.id);
 871         /*
 872          * Reuse the prop from the SST connector because we're
 873          * not allowed to create new props after device registration.
 874          */
 875         connector->max_bpc_property =
 876                 intel_dp->attached_connector->base.max_bpc_property;
 877         if (connector->max_bpc_property)
 878                 drm_connector_attach_max_bpc_property(connector, 6, 12);
 879
 880         return connector;
 881
 882 err:
 883         drm_connector_cleanup(connector);
 884         return NULL;
 885 }
 886
 887 static void
 888 intel_dp_mst_poll_hpd_irq(struct drm_dp_mst_topology_mgr *mgr)
 889 {
 890         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
 891
 892         intel_hpd_trigger_irq(dp_to_dig_port(intel_dp));
 893 }
 894
 895 static const struct drm_dp_mst_topology_cbs mst_cbs = {
 896         .add_connector = intel_dp_add_mst_connector,
 897         .poll_hpd_irq = intel_dp_mst_poll_hpd_irq,
 898 };
 899
 900 static struct intel_dp_mst_encoder *
 901 intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe pipe)
 902 {
 903         struct intel_dp_mst_encoder *intel_mst;
 904         struct intel_encoder *intel_encoder;
 905         struct drm_device *dev = dig_port->base.base.dev;
 906
 907         intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
 908
 909         if (!intel_mst)
 910                 return NULL;
 911
 912         intel_mst->pipe = pipe;
 913         intel_encoder = &intel_mst->base;
 914         intel_mst->primary = dig_port;
 915
 916         drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
 917                          DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
 918
 919         intel_encoder->type = INTEL_OUTPUT_DP_MST;
 920         intel_encoder->power_domain = dig_port->base.power_domain;
 921         intel_encoder->port = dig_port->base.port;
 922         intel_encoder->cloneable = 0;
 923         /*
 924          * This is wrong, but broken userspace uses the intersection
 925          * of possible_crtcs of all the encoders of a given connector
 926          * to figure out which crtcs can drive said connector. What
 927          * should be used instead is the union of possible_crtcs.
 928          * To keep such userspace functioning we must misconfigure
 929          * this to make sure the intersection is not empty :(
 930          */
 931         intel_encoder->pipe_mask = ~0;
 932
 933         intel_encoder->compute_config = intel_dp_mst_compute_config;
 934         intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
 935         intel_encoder->disable = intel_mst_disable_dp;
 936         intel_encoder->post_disable = intel_mst_post_disable_dp;
 937         intel_encoder->update_pipe = intel_ddi_update_pipe;
 938         intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
 939         intel_encoder->pre_enable = intel_mst_pre_enable_dp;
 940         intel_encoder->enable = intel_mst_enable_dp;
 941         intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
 942         intel_encoder->get_config = intel_dp_mst_enc_get_config;
 943         intel_encoder->initial_fastset_check = intel_dp_mst_initial_fastset_check;
 944
 945         return intel_mst;
 946
 947 }
 948
 949 static bool
 950 intel_dp_create_fake_mst_encoders(struct intel_digital_port *dig_port)
 951 {
 952         struct intel_dp *intel_dp = &dig_port->dp;
 953         struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
 954         enum pipe pipe;
 955
 956         for_each_pipe(dev_priv, pipe)
 957                 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(dig_port, pipe);
 958         return true;
 959 }
 960
 961 int
 962 intel_dp_mst_encoder_active_links(struct intel_digital_port *dig_port)
 963 {
 964         return dig_port->dp.active_mst_links;
 965 }
 966
 967 int
 968 intel_dp_mst_encoder_init(struct intel_digital_port *dig_port, int conn_base_id)
 969 {
 970         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 971         struct intel_dp *intel_dp = &dig_port->dp;
 972         enum port port = dig_port->base.port;
 973         int ret;
 974         int max_source_rate =
 975                 intel_dp->source_rates[intel_dp->num_source_rates - 1];
 976
 977         if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
 978                 return 0;
 979
 980         if (DISPLAY_VER(i915) < 12 && port == PORT_A)
 981                 return 0;
 982
 983         if (DISPLAY_VER(i915) < 11 && port == PORT_E)
 984                 return 0;
 985
 986         intel_dp->mst_mgr.cbs = &mst_cbs;
 987
 988         /* create encoders */
 989         intel_dp_create_fake_mst_encoders(dig_port);
 990         ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
 991                                            &intel_dp->aux, 16, 3,
 992                                            dig_port->max_lanes,
 993                                            max_source_rate,
 994                                            conn_base_id);
 995         if (ret) {
 996                 intel_dp->mst_mgr.cbs = NULL;
 997                 return ret;
 998         }
 999
1000         return 0;
1001 }
1002
1003 bool intel_dp_mst_source_support(struct intel_dp *intel_dp)
1004 {
1005         return intel_dp->mst_mgr.cbs;
1006 }
1007
1008 void
1009 intel_dp_mst_encoder_cleanup(struct intel_digital_port *dig_port)
1010 {
1011         struct intel_dp *intel_dp = &dig_port->dp;
1012
1013         if (!intel_dp_mst_source_support(intel_dp))
1014                 return;
1015
1016         drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
1017         /* encoders will get killed by normal cleanup */
1018
1019         intel_dp->mst_mgr.cbs = NULL;
1020 }
1021
1022 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
1023 {
1024         return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder;
1025 }
1026
1027 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state)
1028 {
1029         return crtc_state->mst_master_transcoder != INVALID_TRANSCODER &&
1030                crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder;
1031 }