Merge tag 'irq_urgent_for_v5.11_rc5' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / display / intel_dp.h
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2019 Intel Corporation
4  */
5
6 #ifndef __INTEL_DP_H__
7 #define __INTEL_DP_H__
8
9 #include <linux/types.h>
10
11 #include "i915_reg.h"
12
13 enum intel_output_format;
14 enum pipe;
15 enum port;
16 struct drm_connector_state;
17 struct drm_encoder;
18 struct drm_i915_private;
19 struct drm_modeset_acquire_ctx;
20 struct drm_dp_vsc_sdp;
21 struct intel_atomic_state;
22 struct intel_connector;
23 struct intel_crtc_state;
24 struct intel_digital_port;
25 struct intel_dp;
26 struct intel_encoder;
27
28 struct link_config_limits {
29         int min_clock, max_clock;
30         int min_lane_count, max_lane_count;
31         int min_bpp, max_bpp;
32 };
33
34 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
35                                        struct intel_crtc_state *pipe_config,
36                                        struct link_config_limits *limits);
37 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
38                                   const struct drm_connector_state *conn_state);
39 int intel_dp_min_bpp(enum intel_output_format output_format);
40 bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
41                            i915_reg_t dp_reg, enum port port,
42                            enum pipe *pipe);
43 bool intel_dp_init(struct drm_i915_private *dev_priv, i915_reg_t output_reg,
44                    enum port port);
45 bool intel_dp_init_connector(struct intel_digital_port *dig_port,
46                              struct intel_connector *intel_connector);
47 void intel_dp_set_link_params(struct intel_dp *intel_dp,
48                               int link_rate, int lane_count);
49 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
50                                             int link_rate, u8 lane_count);
51 int intel_dp_retrain_link(struct intel_encoder *encoder,
52                           struct drm_modeset_acquire_ctx *ctx);
53 void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
54 void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
55                                            const struct intel_crtc_state *crtc_state);
56 void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
57                                            const struct intel_crtc_state *crtc_state,
58                                            bool enable);
59 void intel_dp_encoder_reset(struct drm_encoder *encoder);
60 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
61 void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
62 void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
63 int intel_dp_compute_config(struct intel_encoder *encoder,
64                             struct intel_crtc_state *pipe_config,
65                             struct drm_connector_state *conn_state);
66 bool intel_dp_is_edp(struct intel_dp *intel_dp);
67 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
68 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
69                                   bool long_hpd);
70 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
71                             const struct drm_connector_state *conn_state);
72 void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
73 void intel_edp_panel_vdd_on(struct intel_dp *intel_dp);
74 void intel_edp_panel_on(struct intel_dp *intel_dp);
75 void intel_edp_panel_off(struct intel_dp *intel_dp);
76 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
77 void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
78 int intel_dp_max_link_rate(struct intel_dp *intel_dp);
79 int intel_dp_max_lane_count(struct intel_dp *intel_dp);
80 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
81 void intel_power_sequencer_reset(struct drm_i915_private *dev_priv);
82 u32 intel_dp_pack_aux(const u8 *src, int src_bytes);
83
84 void intel_edp_drrs_enable(struct intel_dp *intel_dp,
85                            const struct intel_crtc_state *crtc_state);
86 void intel_edp_drrs_disable(struct intel_dp *intel_dp,
87                             const struct intel_crtc_state *crtc_state);
88 void intel_edp_drrs_update(struct intel_dp *intel_dp,
89                            const struct intel_crtc_state *crtc_state);
90 void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
91                                unsigned int frontbuffer_bits);
92 void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
93                           unsigned int frontbuffer_bits);
94
95 void
96 intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
97                                        const struct intel_crtc_state *crtc_state,
98                                        u8 dp_train_pat);
99 void
100 intel_dp_set_signal_levels(struct intel_dp *intel_dp,
101                            const struct intel_crtc_state *crtc_state);
102 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
103                            u8 *link_bw, u8 *rate_select);
104 bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
105 bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp);
106
107 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
108 int intel_dp_link_required(int pixel_clock, int bpp);
109 int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
110 bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
111 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
112                             const struct drm_connector_state *conn_state);
113 void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
114                                   const struct intel_crtc_state *crtc_state,
115                                   const struct drm_connector_state *conn_state,
116                                   struct drm_dp_vsc_sdp *vsc);
117 void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
118                             const struct intel_crtc_state *crtc_state,
119                             struct drm_dp_vsc_sdp *vsc);
120 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
121                              const struct intel_crtc_state *crtc_state,
122                              const struct drm_connector_state *conn_state);
123 void intel_read_dp_sdp(struct intel_encoder *encoder,
124                        struct intel_crtc_state *crtc_state,
125                        unsigned int type);
126 bool intel_digital_port_connected(struct intel_encoder *encoder);
127
128 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
129 {
130         return ~((1 << lane_count) - 1) & 0xf;
131 }
132
133 u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
134
135 void intel_ddi_update_pipe(struct intel_atomic_state *state,
136                            struct intel_encoder *encoder,
137                            const struct intel_crtc_state *crtc_state,
138                            const struct drm_connector_state *conn_state);
139
140 int intel_dp_init_hdcp(struct intel_digital_port *dig_port,
141                        struct intel_connector *intel_connector);
142
143 bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
144                                     struct intel_crtc_state *crtc_state);
145 void intel_dp_sync_state(struct intel_encoder *encoder,
146                          const struct intel_crtc_state *crtc_state);
147
148 #endif /* __INTEL_DP_H__ */