1 // SPDX-License-Identifier: MIT
3 * Copyright © 2020 Intel Corporation
6 #include <linux/string_helpers.h>
8 #include <drm/drm_debugfs.h>
9 #include <drm/drm_edid.h>
10 #include <drm/drm_fourcc.h>
13 #include "i915_debugfs.h"
16 #include "intel_alpm.h"
17 #include "intel_crtc.h"
19 #include "intel_crtc_state_dump.h"
20 #include "intel_display_debugfs.h"
21 #include "intel_display_debugfs_params.h"
22 #include "intel_display_power.h"
23 #include "intel_display_power_well.h"
24 #include "intel_display_types.h"
25 #include "intel_dmc.h"
27 #include "intel_dp_link_training.h"
28 #include "intel_dp_mst.h"
29 #include "intel_drrs.h"
30 #include "intel_fbc.h"
31 #include "intel_fbdev.h"
32 #include "intel_hdcp.h"
33 #include "intel_hdmi.h"
34 #include "intel_hotplug.h"
35 #include "intel_panel.h"
36 #include "intel_pps.h"
37 #include "intel_psr.h"
38 #include "intel_psr_regs.h"
41 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
43 return to_i915(node->minor->dev);
46 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
48 struct drm_i915_private *dev_priv = node_to_i915(m->private);
50 spin_lock(&dev_priv->display.fb_tracking.lock);
52 seq_printf(m, "FB tracking busy bits: 0x%08x\n",
53 dev_priv->display.fb_tracking.busy_bits);
55 seq_printf(m, "FB tracking flip bits: 0x%08x\n",
56 dev_priv->display.fb_tracking.flip_bits);
58 spin_unlock(&dev_priv->display.fb_tracking.lock);
63 static int i915_sr_status(struct seq_file *m, void *unused)
65 struct drm_i915_private *dev_priv = node_to_i915(m->private);
66 intel_wakeref_t wakeref;
67 bool sr_enabled = false;
69 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
71 if (DISPLAY_VER(dev_priv) >= 9)
72 /* no global SR status; inspect per-plane WM */;
73 else if (HAS_PCH_SPLIT(dev_priv))
74 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE;
75 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) ||
76 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
77 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN;
78 else if (IS_I915GM(dev_priv))
79 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN;
80 else if (IS_PINEVIEW(dev_priv))
81 sr_enabled = intel_de_read(dev_priv, DSPFW3(dev_priv)) & PINEVIEW_SELF_REFRESH_EN;
82 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
83 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
85 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
87 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
92 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
94 struct drm_i915_private *dev_priv = node_to_i915(m->private);
95 struct intel_framebuffer *fbdev_fb = NULL;
96 struct drm_framebuffer *drm_fb;
98 #ifdef CONFIG_DRM_FBDEV_EMULATION
99 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev);
101 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
102 fbdev_fb->base.width,
103 fbdev_fb->base.height,
104 fbdev_fb->base.format->depth,
105 fbdev_fb->base.format->cpp[0] * 8,
106 fbdev_fb->base.modifier,
107 drm_framebuffer_read_refcount(&fbdev_fb->base));
108 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base));
113 mutex_lock(&dev_priv->drm.mode_config.fb_lock);
114 drm_for_each_fb(drm_fb, &dev_priv->drm) {
115 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
119 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
122 fb->base.format->depth,
123 fb->base.format->cpp[0] * 8,
125 drm_framebuffer_read_refcount(&fb->base));
126 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base));
129 mutex_unlock(&dev_priv->drm.mode_config.fb_lock);
134 static int i915_power_domain_info(struct seq_file *m, void *unused)
136 struct drm_i915_private *i915 = node_to_i915(m->private);
138 intel_display_power_debug(i915, m);
143 static void intel_seq_print_mode(struct seq_file *m, int tabs,
144 const struct drm_display_mode *mode)
148 for (i = 0; i < tabs; i++)
151 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
154 static void intel_encoder_info(struct seq_file *m,
155 struct intel_crtc *crtc,
156 struct intel_encoder *encoder)
158 struct drm_i915_private *dev_priv = node_to_i915(m->private);
159 struct drm_connector_list_iter conn_iter;
160 struct drm_connector *connector;
162 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
163 encoder->base.base.id, encoder->base.name);
165 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
166 drm_for_each_connector_iter(connector, &conn_iter) {
167 const struct drm_connector_state *conn_state =
170 if (conn_state->best_encoder != &encoder->base)
173 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
174 connector->base.id, connector->name);
176 drm_connector_list_iter_end(&conn_iter);
179 static void intel_panel_info(struct seq_file *m,
180 struct intel_connector *connector)
182 const struct drm_display_mode *fixed_mode;
184 if (list_empty(&connector->panel.fixed_modes))
187 seq_puts(m, "\tfixed modes:\n");
189 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head)
190 intel_seq_print_mode(m, 2, fixed_mode);
193 static void intel_hdcp_info(struct seq_file *m,
194 struct intel_connector *intel_connector,
197 bool hdcp_cap = false, hdcp2_cap = false;
199 if (!intel_connector->hdcp.shim) {
200 seq_puts(m, "No Connector Support");
205 intel_hdcp_get_remote_capability(intel_connector,
209 hdcp_cap = intel_hdcp_get_capability(intel_connector);
210 hdcp2_cap = intel_hdcp2_get_capability(intel_connector);
214 seq_puts(m, "HDCP1.4 ");
216 seq_puts(m, "HDCP2.2 ");
218 if (!hdcp_cap && !hdcp2_cap)
225 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector)
227 struct intel_encoder *intel_encoder = intel_attached_encoder(connector);
228 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
230 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
231 seq_printf(m, "\taudio support: %s\n",
232 str_yes_no(connector->base.display_info.has_audio));
234 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
235 connector->detect_edid, &intel_dp->aux);
238 static void intel_dp_mst_info(struct seq_file *m,
239 struct intel_connector *connector)
241 bool has_audio = connector->base.display_info.has_audio;
243 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
246 static void intel_hdmi_info(struct seq_file *m,
247 struct intel_connector *connector)
249 bool has_audio = connector->base.display_info.has_audio;
251 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
254 static void intel_connector_info(struct seq_file *m,
255 struct drm_connector *connector)
257 struct intel_connector *intel_connector = to_intel_connector(connector);
258 const struct drm_display_mode *mode;
260 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
261 connector->base.id, connector->name,
262 drm_get_connector_status_name(connector->status));
264 if (connector->status == connector_status_disconnected)
267 seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
268 connector->display_info.width_mm,
269 connector->display_info.height_mm);
270 seq_printf(m, "\tsubpixel order: %s\n",
271 drm_get_subpixel_order_name(connector->display_info.subpixel_order));
272 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
274 switch (connector->connector_type) {
275 case DRM_MODE_CONNECTOR_DisplayPort:
276 case DRM_MODE_CONNECTOR_eDP:
277 if (intel_connector->mst_port)
278 intel_dp_mst_info(m, intel_connector);
280 intel_dp_info(m, intel_connector);
282 case DRM_MODE_CONNECTOR_HDMIA:
283 intel_hdmi_info(m, intel_connector);
289 seq_puts(m, "\tHDCP version: ");
290 if (intel_connector->mst_port) {
291 intel_hdcp_info(m, intel_connector, true);
292 seq_puts(m, "\tMST Hub HDCP version: ");
294 intel_hdcp_info(m, intel_connector, false);
296 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
298 intel_panel_info(m, intel_connector);
300 seq_printf(m, "\tmodes:\n");
301 list_for_each_entry(mode, &connector->modes, head)
302 intel_seq_print_mode(m, 2, mode);
305 static const char *plane_type(enum drm_plane_type type)
308 case DRM_PLANE_TYPE_OVERLAY:
310 case DRM_PLANE_TYPE_PRIMARY:
312 case DRM_PLANE_TYPE_CURSOR:
315 * Deliberately omitting default: to generate compiler warnings
316 * when a new drm_plane_type gets added.
323 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
326 * According to doc only one DRM_MODE_ROTATE_ is allowed but this
327 * will print them all to visualize if the values are misused
329 snprintf(buf, bufsize,
330 "%s%s%s%s%s%s(0x%08x)",
331 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "",
332 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "",
333 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "",
334 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "",
335 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "",
336 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "",
340 static const char *plane_visibility(const struct intel_plane_state *plane_state)
342 if (plane_state->uapi.visible)
345 if (plane_state->planar_slave)
346 return "planar-slave";
351 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
353 const struct intel_plane_state *plane_state =
354 to_intel_plane_state(plane->base.state);
355 const struct drm_framebuffer *fb = plane_state->uapi.fb;
356 struct drm_rect src, dst;
359 src = drm_plane_state_src(&plane_state->uapi);
360 dst = drm_plane_state_dest(&plane_state->uapi);
362 plane_rotation(rot_str, sizeof(rot_str),
363 plane_state->uapi.rotation);
365 seq_puts(m, "\t\tuapi: [FB:");
367 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
368 &fb->format->format, fb->modifier, fb->width,
371 seq_puts(m, "0] n/a,0x0,0x0,");
372 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
373 ", rotation=%s\n", plane_visibility(plane_state),
374 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str);
376 if (plane_state->planar_linked_plane)
377 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
378 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
379 plane_state->planar_slave ? "slave" : "master");
382 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
384 const struct intel_plane_state *plane_state =
385 to_intel_plane_state(plane->base.state);
386 const struct drm_framebuffer *fb = plane_state->hw.fb;
392 plane_rotation(rot_str, sizeof(rot_str),
393 plane_state->hw.rotation);
395 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
396 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
397 fb->base.id, &fb->format->format,
398 fb->modifier, fb->width, fb->height,
399 str_yes_no(plane_state->uapi.visible),
400 DRM_RECT_FP_ARG(&plane_state->uapi.src),
401 DRM_RECT_ARG(&plane_state->uapi.dst),
405 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)
407 struct drm_i915_private *dev_priv = node_to_i915(m->private);
408 struct intel_plane *plane;
410 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
411 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
412 plane->base.base.id, plane->base.name,
413 plane_type(plane->base.type));
414 intel_plane_uapi_info(m, plane);
415 intel_plane_hw_info(m, plane);
419 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
421 const struct intel_crtc_state *crtc_state =
422 to_intel_crtc_state(crtc->base.state);
423 int num_scalers = crtc->num_scalers;
426 /* Not all platformas have a scaler */
428 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
430 crtc_state->scaler_state.scaler_users,
431 crtc_state->scaler_state.scaler_id,
432 crtc_state->hw.scaling_filter);
434 for (i = 0; i < num_scalers; i++) {
435 const struct intel_scaler *sc =
436 &crtc_state->scaler_state.scalers[i];
438 seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
439 i, str_yes_no(sc->in_use), sc->mode);
443 seq_puts(m, "\tNo scalers available on this platform\n");
447 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
448 static void crtc_updates_info(struct seq_file *m,
449 struct intel_crtc *crtc,
456 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)
457 count += crtc->debug.vbl.times[row];
458 seq_printf(m, "%sUpdates: %llu\n", hdr, count);
462 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {
463 char columns[80] = " |";
477 snprintf(columns, sizeof(columns), "%4ld%s |",
478 DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
481 if (crtc->debug.vbl.times[row]) {
482 x = ilog2(crtc->debug.vbl.times[row]);
483 memset(columns + 8, '*', x);
484 columns[8 + x] = '\0';
487 seq_printf(m, "%s%s\n", hdr, columns);
490 seq_printf(m, "%sMin update: %lluns\n",
491 hdr, crtc->debug.vbl.min);
492 seq_printf(m, "%sMax update: %lluns\n",
493 hdr, crtc->debug.vbl.max);
494 seq_printf(m, "%sAverage update: %lluns\n",
495 hdr, div64_u64(crtc->debug.vbl.sum, count));
496 seq_printf(m, "%sOverruns > %uus: %u\n",
497 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);
500 static int crtc_updates_show(struct seq_file *m, void *data)
502 crtc_updates_info(m, m->private, "");
506 static int crtc_updates_open(struct inode *inode, struct file *file)
508 return single_open(file, crtc_updates_show, inode->i_private);
511 static ssize_t crtc_updates_write(struct file *file,
512 const char __user *ubuf,
513 size_t len, loff_t *offp)
515 struct seq_file *m = file->private_data;
516 struct intel_crtc *crtc = m->private;
518 /* May race with an update. Meh. */
519 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));
524 static const struct file_operations crtc_updates_fops = {
525 .owner = THIS_MODULE,
526 .open = crtc_updates_open,
529 .release = single_release,
530 .write = crtc_updates_write
533 static void crtc_updates_add(struct intel_crtc *crtc)
535 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,
536 crtc, &crtc_updates_fops);
540 static void crtc_updates_info(struct seq_file *m,
541 struct intel_crtc *crtc,
546 static void crtc_updates_add(struct intel_crtc *crtc)
551 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
553 struct drm_i915_private *dev_priv = node_to_i915(m->private);
554 const struct intel_crtc_state *crtc_state =
555 to_intel_crtc_state(crtc->base.state);
556 struct intel_encoder *encoder;
558 seq_printf(m, "[CRTC:%d:%s]:\n",
559 crtc->base.base.id, crtc->base.name);
561 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
562 str_yes_no(crtc_state->uapi.enable),
563 str_yes_no(crtc_state->uapi.active),
564 DRM_MODE_ARG(&crtc_state->uapi.mode));
566 seq_printf(m, "\thw: enable=%s, active=%s\n",
567 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active));
568 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
569 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
570 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
571 DRM_MODE_ARG(&crtc_state->hw.pipe_mode));
573 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
574 DRM_RECT_ARG(&crtc_state->pipe_src),
575 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
577 intel_scaler_info(m, crtc);
579 if (crtc_state->joiner_pipes)
580 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
581 crtc_state->joiner_pipes,
582 intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master");
584 for_each_intel_encoder_mask(&dev_priv->drm, encoder,
585 crtc_state->uapi.encoder_mask)
586 intel_encoder_info(m, crtc, encoder);
588 intel_plane_info(m, crtc);
590 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
591 str_yes_no(!crtc->cpu_fifo_underrun_disabled),
592 str_yes_no(!crtc->pch_fifo_underrun_disabled));
594 crtc_updates_info(m, crtc, "\t");
597 static int i915_display_info(struct seq_file *m, void *unused)
599 struct drm_i915_private *dev_priv = node_to_i915(m->private);
600 struct intel_crtc *crtc;
601 struct drm_connector *connector;
602 struct drm_connector_list_iter conn_iter;
603 intel_wakeref_t wakeref;
605 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
607 drm_modeset_lock_all(&dev_priv->drm);
609 seq_printf(m, "CRTC info\n");
610 seq_printf(m, "---------\n");
611 for_each_intel_crtc(&dev_priv->drm, crtc)
612 intel_crtc_info(m, crtc);
615 seq_printf(m, "Connector info\n");
616 seq_printf(m, "--------------\n");
617 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
618 drm_for_each_connector_iter(connector, &conn_iter)
619 intel_connector_info(m, connector);
620 drm_connector_list_iter_end(&conn_iter);
622 drm_modeset_unlock_all(&dev_priv->drm);
624 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
629 static int i915_display_capabilities(struct seq_file *m, void *unused)
631 struct drm_i915_private *i915 = node_to_i915(m->private);
632 struct drm_printer p = drm_seq_file_printer(m);
634 intel_display_device_info_print(DISPLAY_INFO(i915),
635 DISPLAY_RUNTIME_INFO(i915), &p);
640 static int i915_shared_dplls_info(struct seq_file *m, void *unused)
642 struct drm_i915_private *dev_priv = node_to_i915(m->private);
643 struct drm_printer p = drm_seq_file_printer(m);
644 struct intel_shared_dpll *pll;
647 drm_modeset_lock_all(&dev_priv->drm);
649 drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
650 dev_priv->display.dpll.ref_clks.nssc,
651 dev_priv->display.dpll.ref_clks.ssc);
653 for_each_shared_dpll(dev_priv, pll, i) {
654 drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index,
655 pll->info->name, pll->info->id);
656 drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
657 pll->state.pipe_mask, pll->active_mask,
658 str_yes_no(pll->on));
659 drm_printf(&p, " tracked hardware state:\n");
660 intel_dpll_dump_hw_state(dev_priv, &p, &pll->state.hw_state);
662 drm_modeset_unlock_all(&dev_priv->drm);
667 static int i915_ddb_info(struct seq_file *m, void *unused)
669 struct drm_i915_private *dev_priv = node_to_i915(m->private);
670 struct skl_ddb_entry *entry;
671 struct intel_crtc *crtc;
673 if (DISPLAY_VER(dev_priv) < 9)
676 drm_modeset_lock_all(&dev_priv->drm);
678 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
680 for_each_intel_crtc(&dev_priv->drm, crtc) {
681 struct intel_crtc_state *crtc_state =
682 to_intel_crtc_state(crtc->base.state);
683 enum pipe pipe = crtc->pipe;
684 enum plane_id plane_id;
686 seq_printf(m, "Pipe %c\n", pipe_name(pipe));
688 for_each_plane_id_on_crtc(crtc, plane_id) {
689 entry = &crtc_state->wm.skl.plane_ddb[plane_id];
690 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1,
691 entry->start, entry->end,
692 skl_ddb_entry_size(entry));
695 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
696 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start,
697 entry->end, skl_ddb_entry_size(entry));
700 drm_modeset_unlock_all(&dev_priv->drm);
706 intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
707 enum i915_power_well_id power_well_id)
709 intel_wakeref_t wakeref;
712 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
713 is_enabled = intel_display_power_well_is_enabled(i915,
715 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
720 static int i915_lpsp_status(struct seq_file *m, void *unused)
722 struct drm_i915_private *i915 = node_to_i915(m->private);
723 bool lpsp_enabled = false;
725 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) {
726 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2);
727 } else if (IS_DISPLAY_VER(i915, 11, 12)) {
728 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3);
729 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
730 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL);
732 seq_puts(m, "LPSP: not supported\n");
736 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
741 static int i915_dp_mst_info(struct seq_file *m, void *unused)
743 struct drm_i915_private *dev_priv = node_to_i915(m->private);
744 struct intel_encoder *intel_encoder;
745 struct intel_digital_port *dig_port;
746 struct drm_connector *connector;
747 struct drm_connector_list_iter conn_iter;
749 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
750 drm_for_each_connector_iter(connector, &conn_iter) {
751 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
754 intel_encoder = intel_attached_encoder(to_intel_connector(connector));
755 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
758 dig_port = enc_to_dig_port(intel_encoder);
759 if (!intel_dp_mst_source_support(&dig_port->dp))
762 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
763 dig_port->base.base.base.id,
764 dig_port->base.base.name);
765 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr);
767 drm_connector_list_iter_end(&conn_iter);
772 static ssize_t i915_displayport_test_active_write(struct file *file,
773 const char __user *ubuf,
774 size_t len, loff_t *offp)
778 struct drm_device *dev;
779 struct drm_connector *connector;
780 struct drm_connector_list_iter conn_iter;
781 struct intel_dp *intel_dp;
784 dev = ((struct seq_file *)file->private_data)->private;
789 input_buffer = memdup_user_nul(ubuf, len);
790 if (IS_ERR(input_buffer))
791 return PTR_ERR(input_buffer);
793 drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len);
795 drm_connector_list_iter_begin(dev, &conn_iter);
796 drm_for_each_connector_iter(connector, &conn_iter) {
797 struct intel_encoder *encoder;
799 if (connector->connector_type !=
800 DRM_MODE_CONNECTOR_DisplayPort)
803 encoder = to_intel_encoder(connector->encoder);
804 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
807 if (encoder && connector->status == connector_status_connected) {
808 intel_dp = enc_to_intel_dp(encoder);
809 status = kstrtoint(input_buffer, 10, &val);
812 drm_dbg(dev, "Got %d for test active\n", val);
813 /* To prevent erroneous activation of the compliance
814 * testing code, only accept an actual value of 1 here
817 intel_dp->compliance.test_active = true;
819 intel_dp->compliance.test_active = false;
822 drm_connector_list_iter_end(&conn_iter);
831 static int i915_displayport_test_active_show(struct seq_file *m, void *data)
833 struct drm_i915_private *dev_priv = m->private;
834 struct drm_connector *connector;
835 struct drm_connector_list_iter conn_iter;
836 struct intel_dp *intel_dp;
838 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
839 drm_for_each_connector_iter(connector, &conn_iter) {
840 struct intel_encoder *encoder;
842 if (connector->connector_type !=
843 DRM_MODE_CONNECTOR_DisplayPort)
846 encoder = to_intel_encoder(connector->encoder);
847 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
850 if (encoder && connector->status == connector_status_connected) {
851 intel_dp = enc_to_intel_dp(encoder);
852 if (intel_dp->compliance.test_active)
859 drm_connector_list_iter_end(&conn_iter);
864 static int i915_displayport_test_active_open(struct inode *inode,
867 return single_open(file, i915_displayport_test_active_show,
871 static const struct file_operations i915_displayport_test_active_fops = {
872 .owner = THIS_MODULE,
873 .open = i915_displayport_test_active_open,
876 .release = single_release,
877 .write = i915_displayport_test_active_write
880 static int i915_displayport_test_data_show(struct seq_file *m, void *data)
882 struct drm_i915_private *dev_priv = m->private;
883 struct drm_connector *connector;
884 struct drm_connector_list_iter conn_iter;
885 struct intel_dp *intel_dp;
887 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
888 drm_for_each_connector_iter(connector, &conn_iter) {
889 struct intel_encoder *encoder;
891 if (connector->connector_type !=
892 DRM_MODE_CONNECTOR_DisplayPort)
895 encoder = to_intel_encoder(connector->encoder);
896 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
899 if (encoder && connector->status == connector_status_connected) {
900 intel_dp = enc_to_intel_dp(encoder);
901 if (intel_dp->compliance.test_type ==
902 DP_TEST_LINK_EDID_READ)
904 intel_dp->compliance.test_data.edid);
905 else if (intel_dp->compliance.test_type ==
906 DP_TEST_LINK_VIDEO_PATTERN) {
907 seq_printf(m, "hdisplay: %d\n",
908 intel_dp->compliance.test_data.hdisplay);
909 seq_printf(m, "vdisplay: %d\n",
910 intel_dp->compliance.test_data.vdisplay);
911 seq_printf(m, "bpc: %u\n",
912 intel_dp->compliance.test_data.bpc);
913 } else if (intel_dp->compliance.test_type ==
914 DP_TEST_LINK_PHY_TEST_PATTERN) {
915 seq_printf(m, "pattern: %d\n",
916 intel_dp->compliance.test_data.phytest.phy_pattern);
917 seq_printf(m, "Number of lanes: %d\n",
918 intel_dp->compliance.test_data.phytest.num_lanes);
919 seq_printf(m, "Link Rate: %d\n",
920 intel_dp->compliance.test_data.phytest.link_rate);
921 seq_printf(m, "level: %02x\n",
922 intel_dp->train_set[0]);
927 drm_connector_list_iter_end(&conn_iter);
931 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data);
933 static int i915_displayport_test_type_show(struct seq_file *m, void *data)
935 struct drm_i915_private *dev_priv = m->private;
936 struct drm_connector *connector;
937 struct drm_connector_list_iter conn_iter;
938 struct intel_dp *intel_dp;
940 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
941 drm_for_each_connector_iter(connector, &conn_iter) {
942 struct intel_encoder *encoder;
944 if (connector->connector_type !=
945 DRM_MODE_CONNECTOR_DisplayPort)
948 encoder = to_intel_encoder(connector->encoder);
949 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
952 if (encoder && connector->status == connector_status_connected) {
953 intel_dp = enc_to_intel_dp(encoder);
954 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type);
958 drm_connector_list_iter_end(&conn_iter);
962 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type);
965 i915_fifo_underrun_reset_write(struct file *filp,
966 const char __user *ubuf,
967 size_t cnt, loff_t *ppos)
969 struct drm_i915_private *dev_priv = filp->private_data;
970 struct intel_crtc *crtc;
974 ret = kstrtobool_from_user(ubuf, cnt, &reset);
981 for_each_intel_crtc(&dev_priv->drm, crtc) {
982 struct drm_crtc_commit *commit;
983 struct intel_crtc_state *crtc_state;
985 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
989 crtc_state = to_intel_crtc_state(crtc->base.state);
990 commit = crtc_state->uapi.commit;
992 ret = wait_for_completion_interruptible(&commit->hw_done);
994 ret = wait_for_completion_interruptible(&commit->flip_done);
997 if (!ret && crtc_state->hw.active) {
998 drm_dbg_kms(&dev_priv->drm,
999 "Re-arming FIFO underruns on pipe %c\n",
1000 pipe_name(crtc->pipe));
1002 intel_crtc_arm_fifo_underrun(crtc, crtc_state);
1005 drm_modeset_unlock(&crtc->base.mutex);
1011 intel_fbc_reset_underrun(dev_priv);
1016 static const struct file_operations i915_fifo_underrun_reset_ops = {
1017 .owner = THIS_MODULE,
1018 .open = simple_open,
1019 .write = i915_fifo_underrun_reset_write,
1020 .llseek = default_llseek,
1023 static const struct drm_info_list intel_display_debugfs_list[] = {
1024 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
1025 {"i915_sr_status", i915_sr_status, 0},
1026 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1027 {"i915_power_domain_info", i915_power_domain_info, 0},
1028 {"i915_display_info", i915_display_info, 0},
1029 {"i915_display_capabilities", i915_display_capabilities, 0},
1030 {"i915_shared_dplls_info", i915_shared_dplls_info, 0},
1031 {"i915_dp_mst_info", i915_dp_mst_info, 0},
1032 {"i915_ddb_info", i915_ddb_info, 0},
1033 {"i915_lpsp_status", i915_lpsp_status, 0},
1036 static const struct {
1038 const struct file_operations *fops;
1039 } intel_display_debugfs_files[] = {
1040 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops},
1041 {"i915_dp_test_data", &i915_displayport_test_data_fops},
1042 {"i915_dp_test_type", &i915_displayport_test_type_fops},
1043 {"i915_dp_test_active", &i915_displayport_test_active_fops},
1046 void intel_display_debugfs_register(struct drm_i915_private *i915)
1048 struct drm_minor *minor = i915->drm.primary;
1051 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) {
1052 debugfs_create_file(intel_display_debugfs_files[i].name,
1054 minor->debugfs_root,
1055 to_i915(minor->dev),
1056 intel_display_debugfs_files[i].fops);
1059 drm_debugfs_create_files(intel_display_debugfs_list,
1060 ARRAY_SIZE(intel_display_debugfs_list),
1061 minor->debugfs_root, minor);
1063 intel_bios_debugfs_register(i915);
1064 intel_cdclk_debugfs_register(i915);
1065 intel_dmc_debugfs_register(i915);
1066 intel_fbc_debugfs_register(i915);
1067 intel_hpd_debugfs_register(i915);
1068 intel_opregion_debugfs_register(i915);
1069 intel_psr_debugfs_register(i915);
1070 intel_wm_debugfs_register(i915);
1071 intel_display_debugfs_params(i915);
1074 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
1076 struct intel_connector *connector = m->private;
1077 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1080 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1084 if (!connector->base.encoder ||
1085 connector->base.status != connector_status_connected) {
1090 seq_printf(m, "%s:%d HDCP version: ", connector->base.name,
1091 connector->base.base.id);
1092 intel_hdcp_info(m, connector, false);
1095 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1099 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
1101 static int i915_lpsp_capability_show(struct seq_file *m, void *data)
1103 struct intel_connector *connector = m->private;
1104 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1105 struct intel_encoder *encoder = intel_attached_encoder(connector);
1106 int connector_type = connector->base.connector_type;
1107 bool lpsp_capable = false;
1112 if (connector->base.status != connector_status_connected)
1115 if (DISPLAY_VER(i915) >= 13)
1116 lpsp_capable = encoder->port <= PORT_B;
1117 else if (DISPLAY_VER(i915) >= 12)
1119 * Actually TGL can drive LPSP on port till DDI_C
1120 * but there is no physical connected DDI_C on TGL sku's,
1121 * even driver is not initilizing DDI_C port for gen12.
1123 lpsp_capable = encoder->port <= PORT_B;
1124 else if (DISPLAY_VER(i915) == 11)
1125 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI ||
1126 connector_type == DRM_MODE_CONNECTOR_eDP);
1127 else if (IS_DISPLAY_VER(i915, 9, 10))
1128 lpsp_capable = (encoder->port == PORT_A &&
1129 (connector_type == DRM_MODE_CONNECTOR_DSI ||
1130 connector_type == DRM_MODE_CONNECTOR_eDP ||
1131 connector_type == DRM_MODE_CONNECTOR_DisplayPort));
1132 else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
1133 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP;
1135 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
1139 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
1141 static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
1143 struct intel_connector *connector = m->private;
1144 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1145 struct drm_crtc *crtc;
1146 struct intel_dp *intel_dp;
1147 struct drm_modeset_acquire_ctx ctx;
1148 struct intel_crtc_state *crtc_state = NULL;
1150 bool try_again = false;
1152 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
1156 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex,
1159 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
1165 crtc = connector->base.state->crtc;
1166 if (connector->base.status != connector_status_connected || !crtc) {
1170 ret = drm_modeset_lock(&crtc->mutex, &ctx);
1171 if (ret == -EDEADLK) {
1172 ret = drm_modeset_backoff(&ctx);
1181 intel_dp = intel_attached_dp(connector);
1182 crtc_state = to_intel_crtc_state(crtc->state);
1183 seq_printf(m, "DSC_Enabled: %s\n",
1184 str_yes_no(crtc_state->dsc.compression_enable));
1185 seq_printf(m, "DSC_Sink_Support: %s\n",
1186 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)));
1187 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
1188 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1190 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1191 DP_DSC_YCbCr420_Native)),
1192 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1194 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
1195 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd));
1196 seq_printf(m, "Force_DSC_Enable: %s\n",
1197 str_yes_no(intel_dp->force_dsc_en));
1198 if (!intel_dp_is_edp(intel_dp))
1199 seq_printf(m, "FEC_Sink_Support: %s\n",
1200 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability)));
1201 } while (try_again);
1203 drm_modeset_drop_locks(&ctx);
1204 drm_modeset_acquire_fini(&ctx);
1209 static ssize_t i915_dsc_fec_support_write(struct file *file,
1210 const char __user *ubuf,
1211 size_t len, loff_t *offp)
1213 struct seq_file *m = file->private_data;
1214 struct intel_connector *connector = m->private;
1215 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1216 struct intel_encoder *encoder = intel_attached_encoder(connector);
1217 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1218 bool dsc_enable = false;
1225 "Copied %zu bytes from user to force DSC\n", len);
1227 ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
1231 drm_dbg(&i915->drm, "Got %s for DSC Enable\n",
1232 (dsc_enable) ? "true" : "false");
1233 intel_dp->force_dsc_en = dsc_enable;
1239 static int i915_dsc_fec_support_open(struct inode *inode,
1242 return single_open(file, i915_dsc_fec_support_show,
1246 static const struct file_operations i915_dsc_fec_support_fops = {
1247 .owner = THIS_MODULE,
1248 .open = i915_dsc_fec_support_open,
1250 .llseek = seq_lseek,
1251 .release = single_release,
1252 .write = i915_dsc_fec_support_write
1255 static int i915_dsc_bpc_show(struct seq_file *m, void *data)
1257 struct intel_connector *connector = m->private;
1258 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1259 struct intel_encoder *encoder = intel_attached_encoder(connector);
1260 struct drm_crtc *crtc;
1261 struct intel_crtc_state *crtc_state;
1267 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1271 crtc = connector->base.state->crtc;
1272 if (connector->base.status != connector_status_connected || !crtc) {
1277 crtc_state = to_intel_crtc_state(crtc->state);
1278 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1280 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1285 static ssize_t i915_dsc_bpc_write(struct file *file,
1286 const char __user *ubuf,
1287 size_t len, loff_t *offp)
1289 struct seq_file *m = file->private_data;
1290 struct intel_connector *connector = m->private;
1291 struct intel_encoder *encoder = intel_attached_encoder(connector);
1292 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1296 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc);
1300 intel_dp->force_dsc_bpc = dsc_bpc;
1306 static int i915_dsc_bpc_open(struct inode *inode,
1309 return single_open(file, i915_dsc_bpc_show, inode->i_private);
1312 static const struct file_operations i915_dsc_bpc_fops = {
1313 .owner = THIS_MODULE,
1314 .open = i915_dsc_bpc_open,
1316 .llseek = seq_lseek,
1317 .release = single_release,
1318 .write = i915_dsc_bpc_write
1321 static int i915_dsc_output_format_show(struct seq_file *m, void *data)
1323 struct intel_connector *connector = m->private;
1324 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1325 struct intel_encoder *encoder = intel_attached_encoder(connector);
1326 struct drm_crtc *crtc;
1327 struct intel_crtc_state *crtc_state;
1333 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1337 crtc = connector->base.state->crtc;
1338 if (connector->base.status != connector_status_connected || !crtc) {
1343 crtc_state = to_intel_crtc_state(crtc->state);
1344 seq_printf(m, "DSC_Output_Format: %s\n",
1345 intel_output_format_name(crtc_state->output_format));
1347 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1352 static ssize_t i915_dsc_output_format_write(struct file *file,
1353 const char __user *ubuf,
1354 size_t len, loff_t *offp)
1356 struct seq_file *m = file->private_data;
1357 struct intel_connector *connector = m->private;
1358 struct intel_encoder *encoder = intel_attached_encoder(connector);
1359 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1360 int dsc_output_format = 0;
1363 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format);
1367 intel_dp->force_dsc_output_format = dsc_output_format;
1373 static int i915_dsc_output_format_open(struct inode *inode,
1376 return single_open(file, i915_dsc_output_format_show, inode->i_private);
1379 static const struct file_operations i915_dsc_output_format_fops = {
1380 .owner = THIS_MODULE,
1381 .open = i915_dsc_output_format_open,
1383 .llseek = seq_lseek,
1384 .release = single_release,
1385 .write = i915_dsc_output_format_write
1388 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
1390 struct intel_connector *connector = m->private;
1391 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1392 struct intel_encoder *encoder = intel_attached_encoder(connector);
1393 struct drm_crtc *crtc;
1394 struct intel_dp *intel_dp;
1400 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1404 crtc = connector->base.state->crtc;
1405 if (connector->base.status != connector_status_connected || !crtc) {
1410 intel_dp = intel_attached_dp(connector);
1411 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
1412 str_yes_no(intel_dp->force_dsc_fractional_bpp_en));
1415 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1420 static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
1421 const char __user *ubuf,
1422 size_t len, loff_t *offp)
1424 struct seq_file *m = file->private_data;
1425 struct intel_connector *connector = m->private;
1426 struct intel_encoder *encoder = intel_attached_encoder(connector);
1427 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1428 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1429 bool dsc_fractional_bpp_enable = false;
1436 "Copied %zu bytes from user to force fractional bpp for DSC\n", len);
1438 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable);
1442 drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n",
1443 (dsc_fractional_bpp_enable) ? "true" : "false");
1444 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable;
1451 static int i915_dsc_fractional_bpp_open(struct inode *inode,
1454 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private);
1457 static const struct file_operations i915_dsc_fractional_bpp_fops = {
1458 .owner = THIS_MODULE,
1459 .open = i915_dsc_fractional_bpp_open,
1461 .llseek = seq_lseek,
1462 .release = single_release,
1463 .write = i915_dsc_fractional_bpp_write
1467 * Returns the Current CRTC's bpc.
1468 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
1470 static int i915_current_bpc_show(struct seq_file *m, void *data)
1472 struct intel_crtc *crtc = m->private;
1473 struct intel_crtc_state *crtc_state;
1476 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1480 crtc_state = to_intel_crtc_state(crtc->base.state);
1481 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1483 drm_modeset_unlock(&crtc->base.mutex);
1487 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc);
1489 /* Pipe may differ from crtc index if pipes are fused off */
1490 static int intel_crtc_pipe_show(struct seq_file *m, void *unused)
1492 struct intel_crtc *crtc = m->private;
1494 seq_printf(m, "%c\n", pipe_name(crtc->pipe));
1498 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe);
1501 * intel_connector_debugfs_add - add i915 specific connector debugfs files
1502 * @connector: pointer to a registered intel_connector
1504 * Cleanup will be done by drm_connector_unregister() through a call to
1505 * drm_debugfs_connector_remove().
1507 void intel_connector_debugfs_add(struct intel_connector *connector)
1509 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1510 struct dentry *root = connector->base.debugfs_entry;
1511 int connector_type = connector->base.connector_type;
1513 /* The connector must have been registered beforehands. */
1517 intel_drrs_connector_debugfs_add(connector);
1518 intel_pps_connector_debugfs_add(connector);
1519 intel_psr_connector_debugfs_add(connector);
1520 intel_alpm_lobf_debugfs_add(connector);
1521 intel_dp_link_training_debugfs_add(connector);
1523 if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1524 connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1525 connector_type == DRM_MODE_CONNECTOR_HDMIB) {
1526 debugfs_create_file("i915_hdcp_sink_capability", 0444, root,
1527 connector, &i915_hdcp_sink_capability_fops);
1530 if (DISPLAY_VER(i915) >= 11 &&
1531 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) ||
1532 connector_type == DRM_MODE_CONNECTOR_eDP)) {
1533 debugfs_create_file("i915_dsc_fec_support", 0644, root,
1534 connector, &i915_dsc_fec_support_fops);
1536 debugfs_create_file("i915_dsc_bpc", 0644, root,
1537 connector, &i915_dsc_bpc_fops);
1539 debugfs_create_file("i915_dsc_output_format", 0644, root,
1540 connector, &i915_dsc_output_format_fops);
1542 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root,
1543 connector, &i915_dsc_fractional_bpp_fops);
1546 if (DISPLAY_VER(i915) >= 11 &&
1547 (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1548 connector_type == DRM_MODE_CONNECTOR_eDP)) {
1549 debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root,
1550 &connector->force_bigjoiner_enable);
1553 if (connector_type == DRM_MODE_CONNECTOR_DSI ||
1554 connector_type == DRM_MODE_CONNECTOR_eDP ||
1555 connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1556 connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1557 connector_type == DRM_MODE_CONNECTOR_HDMIB)
1558 debugfs_create_file("i915_lpsp_capability", 0444, root,
1559 connector, &i915_lpsp_capability_fops);
1563 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files
1564 * @crtc: pointer to a drm_crtc
1566 * Failure to add debugfs entries should generally be ignored.
1568 void intel_crtc_debugfs_add(struct intel_crtc *crtc)
1570 struct dentry *root = crtc->base.debugfs_entry;
1575 crtc_updates_add(crtc);
1576 intel_drrs_crtc_debugfs_add(crtc);
1577 intel_fbc_crtc_debugfs_add(crtc);
1578 hsw_ips_crtc_debugfs_add(crtc);
1580 debugfs_create_file("i915_current_bpc", 0444, root, crtc,
1581 &i915_current_bpc_fops);
1582 debugfs_create_file("i915_pipe", 0444, root, crtc,
1583 &intel_crtc_pipe_fops);