2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Eric Anholt <eric@anholt.net>
28 #include <drm/drm_edid.h>
29 #include <drm/display/drm_dp_helper.h>
30 #include <drm/display/drm_dsc_helper.h>
32 #include "display/intel_display.h"
33 #include "display/intel_display_types.h"
34 #include "display/intel_gmbus.h"
39 #define _INTEL_BIOS_PRIVATE
40 #include "intel_vbt_defs.h"
43 * DOC: Video BIOS Table (VBT)
45 * The Video BIOS Table, or VBT, provides platform and board specific
46 * configuration information to the driver that is not discoverable or available
47 * through other means. The configuration is mostly related to display
48 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
51 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
52 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
53 * contain the actual configuration information. The VBT Header, and thus the
54 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
55 * BDB Header. The data blocks are concatenated after the BDB Header. The data
56 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
57 * data. (Block 53, the MIPI Sequence Block is an exception.)
59 * The driver parses the VBT during load. The relevant information is stored in
60 * driver private data for ease of use, and the actual VBT is not read after
64 /* Wrapper for VBT child device config */
65 struct intel_bios_encoder_data {
66 struct drm_i915_private *i915;
68 struct child_device_config child;
69 struct dsc_compression_parameters_entry *dsc;
70 struct list_head node;
73 #define SLAVE_ADDR1 0x70
74 #define SLAVE_ADDR2 0x72
76 /* Get BDB block size given a pointer to Block ID. */
77 static u32 _get_blocksize(const u8 *block_base)
79 /* The MIPI Sequence Block v3+ has a separate size field. */
80 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
81 return *((const u32 *)(block_base + 4));
83 return *((const u16 *)(block_base + 1));
86 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
87 static u32 get_blocksize(const void *block_data)
89 return _get_blocksize(block_data - 3);
93 find_raw_section(const void *_bdb, enum bdb_block_id section_id)
95 const struct bdb_header *bdb = _bdb;
96 const u8 *base = _bdb;
98 u32 total, current_size;
99 enum bdb_block_id current_id;
101 /* skip to first section */
102 index += bdb->header_size;
103 total = bdb->bdb_size;
105 /* walk the sections looking for section_id */
106 while (index + 3 < total) {
107 current_id = *(base + index);
108 current_size = _get_blocksize(base + index);
111 if (index + current_size > total)
114 if (current_id == section_id)
117 index += current_size;
124 * Offset from the start of BDB to the start of the
125 * block data (just past the block header).
127 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
131 block = find_raw_section(bdb, section_id);
138 struct bdb_block_entry {
139 struct list_head node;
140 enum bdb_block_id section_id;
145 find_section(struct drm_i915_private *i915,
146 enum bdb_block_id section_id)
148 struct bdb_block_entry *entry;
150 list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) {
151 if (entry->section_id == section_id)
152 return entry->data + 3;
158 static const struct {
159 enum bdb_block_id section_id;
162 { .section_id = BDB_GENERAL_FEATURES,
163 .min_size = sizeof(struct bdb_general_features), },
164 { .section_id = BDB_GENERAL_DEFINITIONS,
165 .min_size = sizeof(struct bdb_general_definitions), },
166 { .section_id = BDB_PSR,
167 .min_size = sizeof(struct bdb_psr), },
168 { .section_id = BDB_DRIVER_FEATURES,
169 .min_size = sizeof(struct bdb_driver_features), },
170 { .section_id = BDB_SDVO_LVDS_OPTIONS,
171 .min_size = sizeof(struct bdb_sdvo_lvds_options), },
172 { .section_id = BDB_SDVO_PANEL_DTDS,
173 .min_size = sizeof(struct bdb_sdvo_panel_dtds), },
174 { .section_id = BDB_EDP,
175 .min_size = sizeof(struct bdb_edp), },
176 { .section_id = BDB_LVDS_OPTIONS,
177 .min_size = sizeof(struct bdb_lvds_options), },
179 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
180 * so keep the two ordered.
182 { .section_id = BDB_LVDS_LFP_DATA_PTRS,
183 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
184 { .section_id = BDB_LVDS_LFP_DATA,
185 .min_size = 0, /* special case */ },
186 { .section_id = BDB_LVDS_BACKLIGHT,
187 .min_size = sizeof(struct bdb_lfp_backlight_data), },
188 { .section_id = BDB_LFP_POWER,
189 .min_size = sizeof(struct bdb_lfp_power), },
190 { .section_id = BDB_MIPI_CONFIG,
191 .min_size = sizeof(struct bdb_mipi_config), },
192 { .section_id = BDB_MIPI_SEQUENCE,
193 .min_size = sizeof(struct bdb_mipi_sequence) },
194 { .section_id = BDB_COMPRESSION_PARAMETERS,
195 .min_size = sizeof(struct bdb_compression_parameters), },
196 { .section_id = BDB_GENERIC_DTD,
197 .min_size = sizeof(struct bdb_generic_dtd), },
200 static size_t lfp_data_min_size(struct drm_i915_private *i915)
202 const struct bdb_lvds_lfp_data_ptrs *ptrs;
205 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
209 size = sizeof(struct bdb_lvds_lfp_data);
210 if (ptrs->panel_name.table_size)
211 size = max(size, ptrs->panel_name.offset +
212 sizeof(struct bdb_lvds_lfp_data_tail));
217 static bool validate_lfp_data_ptrs(const void *bdb,
218 const struct bdb_lvds_lfp_data_ptrs *ptrs)
220 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
221 int data_block_size, lfp_data_size;
222 const void *data_block;
225 data_block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
229 data_block_size = get_blocksize(data_block);
230 if (data_block_size == 0)
233 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
234 if (ptrs->lvds_entries != 3)
237 fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
238 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
239 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
240 panel_name_size = ptrs->panel_name.table_size;
242 /* fp_timing has variable size */
243 if (fp_timing_size < 32 ||
244 dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
245 panel_pnp_id_size != sizeof(struct lvds_pnp_id))
248 /* panel_name is not present in old VBTs */
249 if (panel_name_size != 0 &&
250 panel_name_size != sizeof(struct lvds_lfp_panel_name))
253 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
254 if (16 * lfp_data_size > data_block_size)
257 /* make sure the table entries have uniform size */
258 for (i = 1; i < 16; i++) {
259 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
260 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
261 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
264 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
265 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
266 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
271 * Except for vlv/chv machines all real VBTs seem to have 6
272 * unaccounted bytes in the fp_timing table. And it doesn't
273 * appear to be a really intentional hole as the fp_timing
274 * 0xffff terminator is always within those 6 missing bytes.
276 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
279 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
282 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
283 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
284 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
287 /* make sure the tables fit inside the data block */
288 for (i = 0; i < 16; i++) {
289 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
290 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
291 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
295 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
298 /* make sure fp_timing terminators are present at expected locations */
299 for (i = 0; i < 16; i++) {
300 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
310 /* make the data table offsets relative to the data block */
311 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
313 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
317 offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA);
319 for (i = 0; i < 16; i++) {
320 if (ptrs->ptr[i].fp_timing.offset < offset ||
321 ptrs->ptr[i].dvo_timing.offset < offset ||
322 ptrs->ptr[i].panel_pnp_id.offset < offset)
325 ptrs->ptr[i].fp_timing.offset -= offset;
326 ptrs->ptr[i].dvo_timing.offset -= offset;
327 ptrs->ptr[i].panel_pnp_id.offset -= offset;
330 if (ptrs->panel_name.table_size) {
331 if (ptrs->panel_name.offset < offset)
334 ptrs->panel_name.offset -= offset;
337 return validate_lfp_data_ptrs(bdb, ptrs);
340 static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
341 int table_size, int total_size)
343 if (total_size < table_size)
346 table->table_size = table_size;
347 table->offset = total_size - table_size;
349 return total_size - table_size;
352 static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
353 const struct lvds_lfp_data_ptr_table *prev,
356 next->table_size = prev->table_size;
357 next->offset = prev->offset + size;
360 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
363 int i, size, table_size, block_size, offset, fp_timing_size;
364 struct bdb_lvds_lfp_data_ptrs *ptrs;
369 * The hardcoded fp_timing_size is only valid for
370 * modernish VBTs. All older VBTs definitely should
371 * include block 41 and thus we don't need to
374 if (i915->display.vbt.version < 155)
379 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
383 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
385 block_size = get_blocksize(block);
387 size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
388 sizeof(struct lvds_pnp_id);
389 if (size * 16 > block_size)
392 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
396 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
397 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
398 ptrs = ptrs_block + 3;
400 table_size = sizeof(struct lvds_pnp_id);
401 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
403 table_size = sizeof(struct lvds_dvo_timing);
404 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
406 table_size = fp_timing_size;
407 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
409 if (ptrs->ptr[0].fp_timing.table_size)
410 ptrs->lvds_entries++;
411 if (ptrs->ptr[0].dvo_timing.table_size)
412 ptrs->lvds_entries++;
413 if (ptrs->ptr[0].panel_pnp_id.table_size)
414 ptrs->lvds_entries++;
416 if (size != 0 || ptrs->lvds_entries != 3) {
421 size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
422 sizeof(struct lvds_pnp_id);
423 for (i = 1; i < 16; i++) {
424 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
425 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
426 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
429 table_size = sizeof(struct lvds_lfp_panel_name);
431 if (16 * (size + table_size) <= block_size) {
432 ptrs->panel_name.table_size = table_size;
433 ptrs->panel_name.offset = size * 16;
436 offset = block - bdb;
438 for (i = 0; i < 16; i++) {
439 ptrs->ptr[i].fp_timing.offset += offset;
440 ptrs->ptr[i].dvo_timing.offset += offset;
441 ptrs->ptr[i].panel_pnp_id.offset += offset;
444 if (ptrs->panel_name.table_size)
445 ptrs->panel_name.offset += offset;
451 init_bdb_block(struct drm_i915_private *i915,
452 const void *bdb, enum bdb_block_id section_id,
455 struct bdb_block_entry *entry;
456 void *temp_block = NULL;
460 block = find_raw_section(bdb, section_id);
462 /* Modern VBTs lack the LFP data table pointers block, make one up */
463 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
464 temp_block = generate_lfp_data_ptrs(i915, bdb);
466 block = temp_block + 3;
471 drm_WARN(&i915->drm, min_size == 0,
472 "Block %d min_size is zero\n", section_id);
474 block_size = get_blocksize(block);
477 * Version number and new block size are considered
478 * part of the header for MIPI sequenece block v3+.
480 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
483 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
490 entry->section_id = section_id;
491 memcpy(entry->data, block - 3, block_size + 3);
495 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
496 section_id, block_size, min_size);
498 if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
499 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
500 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
505 list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks);
508 static void init_bdb_blocks(struct drm_i915_private *i915,
513 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
514 enum bdb_block_id section_id = bdb_blocks[i].section_id;
515 size_t min_size = bdb_blocks[i].min_size;
517 if (section_id == BDB_LVDS_LFP_DATA)
518 min_size = lfp_data_min_size(i915);
520 init_bdb_block(i915, bdb, section_id, min_size);
525 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
526 const struct lvds_dvo_timing *dvo_timing)
528 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
529 dvo_timing->hactive_lo;
530 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
531 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
532 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
533 ((dvo_timing->hsync_pulse_width_hi << 8) |
534 dvo_timing->hsync_pulse_width_lo);
535 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
536 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
538 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
539 dvo_timing->vactive_lo;
540 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
541 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
542 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
543 ((dvo_timing->vsync_pulse_width_hi << 4) |
544 dvo_timing->vsync_pulse_width_lo);
545 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
546 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
547 panel_fixed_mode->clock = dvo_timing->clock * 10;
548 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
550 if (dvo_timing->hsync_positive)
551 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
553 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
555 if (dvo_timing->vsync_positive)
556 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
558 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
560 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
561 dvo_timing->himage_lo;
562 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
563 dvo_timing->vimage_lo;
565 /* Some VBTs have bogus h/vtotal values */
566 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
567 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
568 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
569 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
571 drm_mode_set_name(panel_fixed_mode);
574 static const struct lvds_dvo_timing *
575 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
576 const struct bdb_lvds_lfp_data_ptrs *ptrs,
579 return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
582 static const struct lvds_fp_timing *
583 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
584 const struct bdb_lvds_lfp_data_ptrs *ptrs,
587 return (const void *)data + ptrs->ptr[index].fp_timing.offset;
590 static const struct lvds_pnp_id *
591 get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
592 const struct bdb_lvds_lfp_data_ptrs *ptrs,
595 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
598 static const struct bdb_lvds_lfp_data_tail *
599 get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
600 const struct bdb_lvds_lfp_data_ptrs *ptrs)
602 if (ptrs->panel_name.table_size)
603 return (const void *)data + ptrs->panel_name.offset;
608 static void dump_pnp_id(struct drm_i915_private *i915,
609 const struct lvds_pnp_id *pnp_id,
612 u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name);
615 drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n",
616 name, drm_edid_decode_mfg_id(mfg_name, vend),
617 pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial,
618 pnp_id->mfg_week, pnp_id->mfg_year + 1990);
621 static int opregion_get_panel_type(struct drm_i915_private *i915,
622 const struct intel_bios_encoder_data *devdata,
623 const struct edid *edid)
625 return intel_opregion_get_panel_type(i915);
628 static int vbt_get_panel_type(struct drm_i915_private *i915,
629 const struct intel_bios_encoder_data *devdata,
630 const struct edid *edid)
632 const struct bdb_lvds_options *lvds_options;
634 lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
638 if (lvds_options->panel_type > 0xf &&
639 lvds_options->panel_type != 0xff) {
640 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
641 lvds_options->panel_type);
645 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
646 return lvds_options->panel_type2;
648 drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
650 return lvds_options->panel_type;
653 static int pnpid_get_panel_type(struct drm_i915_private *i915,
654 const struct intel_bios_encoder_data *devdata,
655 const struct edid *edid)
657 const struct bdb_lvds_lfp_data *data;
658 const struct bdb_lvds_lfp_data_ptrs *ptrs;
659 const struct lvds_pnp_id *edid_id;
660 struct lvds_pnp_id edid_id_nodate;
666 edid_id = (const void *)&edid->mfg_id[0];
668 edid_id_nodate = *edid_id;
669 edid_id_nodate.mfg_week = 0;
670 edid_id_nodate.mfg_year = 0;
672 dump_pnp_id(i915, edid_id, "EDID");
674 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
678 data = find_section(i915, BDB_LVDS_LFP_DATA);
682 for (i = 0; i < 16; i++) {
683 const struct lvds_pnp_id *vbt_id =
684 get_lvds_pnp_id(data, ptrs, i);
687 if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))
691 * Accept a match w/o date if no full match is found,
692 * and the VBT entry does not specify a date.
695 !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id)))
702 static int fallback_get_panel_type(struct drm_i915_private *i915,
703 const struct intel_bios_encoder_data *devdata,
704 const struct edid *edid)
716 static int get_panel_type(struct drm_i915_private *i915,
717 const struct intel_bios_encoder_data *devdata,
718 const struct edid *edid)
722 int (*get_panel_type)(struct drm_i915_private *i915,
723 const struct intel_bios_encoder_data *devdata,
724 const struct edid *edid);
727 [PANEL_TYPE_OPREGION] = {
729 .get_panel_type = opregion_get_panel_type,
733 .get_panel_type = vbt_get_panel_type,
735 [PANEL_TYPE_PNPID] = {
737 .get_panel_type = pnpid_get_panel_type,
739 [PANEL_TYPE_FALLBACK] = {
741 .get_panel_type = fallback_get_panel_type,
746 for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
747 panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata, edid);
749 drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
750 panel_types[i].panel_type != 0xff);
752 if (panel_types[i].panel_type >= 0)
753 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
754 panel_types[i].name, panel_types[i].panel_type);
757 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
758 i = PANEL_TYPE_OPREGION;
759 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
760 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
761 i = PANEL_TYPE_PNPID;
762 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
763 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
766 i = PANEL_TYPE_FALLBACK;
768 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
769 panel_types[i].name, panel_types[i].panel_type);
771 return panel_types[i].panel_type;
774 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
776 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
779 static bool panel_bool(unsigned int value, int panel_type)
781 return panel_bits(value, panel_type, 1);
784 /* Parse general panel options */
786 parse_panel_options(struct drm_i915_private *i915,
787 struct intel_panel *panel)
789 const struct bdb_lvds_options *lvds_options;
790 int panel_type = panel->vbt.panel_type;
793 lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
797 panel->vbt.lvds_dither = lvds_options->pixel_dither;
800 * Empirical evidence indicates the block size can be
801 * either 4,14,16,24+ bytes. For older VBTs no clear
802 * relationship between the block size vs. BDB version.
804 if (get_blocksize(lvds_options) < 16)
807 drrs_mode = panel_bits(lvds_options->dps_panel_type_bits,
810 * VBT has static DRRS = 0 and seamless DRRS = 2.
811 * The below piece of code is required to adjust vbt.drrs_type
812 * to match the enum drrs_support_type.
816 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
817 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
820 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
821 drm_dbg_kms(&i915->drm,
822 "DRRS supported mode is seamless\n");
825 panel->vbt.drrs_type = DRRS_TYPE_NONE;
826 drm_dbg_kms(&i915->drm,
827 "DRRS not supported (VBT input)\n");
833 parse_lfp_panel_dtd(struct drm_i915_private *i915,
834 struct intel_panel *panel,
835 const struct bdb_lvds_lfp_data *lvds_lfp_data,
836 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
838 const struct lvds_dvo_timing *panel_dvo_timing;
839 const struct lvds_fp_timing *fp_timing;
840 struct drm_display_mode *panel_fixed_mode;
841 int panel_type = panel->vbt.panel_type;
843 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
847 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
848 if (!panel_fixed_mode)
851 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
853 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
855 drm_dbg_kms(&i915->drm,
856 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
857 DRM_MODE_ARG(panel_fixed_mode));
859 fp_timing = get_lvds_fp_timing(lvds_lfp_data,
863 /* check the resolution, just to be sure */
864 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
865 fp_timing->y_res == panel_fixed_mode->vdisplay) {
866 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
867 drm_dbg_kms(&i915->drm,
868 "VBT initial LVDS value %x\n",
869 panel->vbt.bios_lvds_val);
874 parse_lfp_data(struct drm_i915_private *i915,
875 struct intel_panel *panel)
877 const struct bdb_lvds_lfp_data *data;
878 const struct bdb_lvds_lfp_data_tail *tail;
879 const struct bdb_lvds_lfp_data_ptrs *ptrs;
880 const struct lvds_pnp_id *pnp_id;
881 int panel_type = panel->vbt.panel_type;
883 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
887 data = find_section(i915, BDB_LVDS_LFP_DATA);
891 if (!panel->vbt.lfp_lvds_vbt_mode)
892 parse_lfp_panel_dtd(i915, panel, data, ptrs);
894 pnp_id = get_lvds_pnp_id(data, ptrs, panel_type);
895 dump_pnp_id(i915, pnp_id, "Panel");
897 tail = get_lfp_data_tail(data, ptrs);
901 drm_dbg_kms(&i915->drm, "Panel name: %.*s\n",
902 (int)sizeof(tail->panel_name[0].name),
903 tail->panel_name[panel_type].name);
905 if (i915->display.vbt.version >= 188) {
906 panel->vbt.seamless_drrs_min_refresh_rate =
907 tail->seamless_drrs_min_refresh_rate[panel_type];
908 drm_dbg_kms(&i915->drm,
909 "Seamless DRRS min refresh rate: %d Hz\n",
910 panel->vbt.seamless_drrs_min_refresh_rate);
915 parse_generic_dtd(struct drm_i915_private *i915,
916 struct intel_panel *panel)
918 const struct bdb_generic_dtd *generic_dtd;
919 const struct generic_dtd_entry *dtd;
920 struct drm_display_mode *panel_fixed_mode;
924 * Older VBTs provided DTD information for internal displays through
925 * the "LFP panel tables" block (42). As of VBT revision 229 the
926 * DTD information should be provided via a newer "generic DTD"
927 * block (58). Just to be safe, we'll try the new generic DTD block
928 * first on VBT >= 229, but still fall back to trying the old LFP
929 * block if that fails.
931 if (i915->display.vbt.version < 229)
934 generic_dtd = find_section(i915, BDB_GENERIC_DTD);
938 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
939 drm_err(&i915->drm, "GDTD size %u is too small.\n",
940 generic_dtd->gdtd_size);
942 } else if (generic_dtd->gdtd_size !=
943 sizeof(struct generic_dtd_entry)) {
944 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
945 generic_dtd->gdtd_size);
946 /* DTD has unknown fields, but keep going */
949 num_dtd = (get_blocksize(generic_dtd) -
950 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
951 if (panel->vbt.panel_type >= num_dtd) {
953 "Panel type %d not found in table of %d DTD's\n",
954 panel->vbt.panel_type, num_dtd);
958 dtd = &generic_dtd->dtd[panel->vbt.panel_type];
960 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
961 if (!panel_fixed_mode)
964 panel_fixed_mode->hdisplay = dtd->hactive;
965 panel_fixed_mode->hsync_start =
966 panel_fixed_mode->hdisplay + dtd->hfront_porch;
967 panel_fixed_mode->hsync_end =
968 panel_fixed_mode->hsync_start + dtd->hsync;
969 panel_fixed_mode->htotal =
970 panel_fixed_mode->hdisplay + dtd->hblank;
972 panel_fixed_mode->vdisplay = dtd->vactive;
973 panel_fixed_mode->vsync_start =
974 panel_fixed_mode->vdisplay + dtd->vfront_porch;
975 panel_fixed_mode->vsync_end =
976 panel_fixed_mode->vsync_start + dtd->vsync;
977 panel_fixed_mode->vtotal =
978 panel_fixed_mode->vdisplay + dtd->vblank;
980 panel_fixed_mode->clock = dtd->pixel_clock;
981 panel_fixed_mode->width_mm = dtd->width_mm;
982 panel_fixed_mode->height_mm = dtd->height_mm;
984 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
985 drm_mode_set_name(panel_fixed_mode);
987 if (dtd->hsync_positive_polarity)
988 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
990 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
992 if (dtd->vsync_positive_polarity)
993 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
995 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
997 drm_dbg_kms(&i915->drm,
998 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
999 DRM_MODE_ARG(panel_fixed_mode));
1001 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
1005 parse_lfp_backlight(struct drm_i915_private *i915,
1006 struct intel_panel *panel)
1008 const struct bdb_lfp_backlight_data *backlight_data;
1009 const struct lfp_backlight_data_entry *entry;
1010 int panel_type = panel->vbt.panel_type;
1013 backlight_data = find_section(i915, BDB_LVDS_BACKLIGHT);
1014 if (!backlight_data)
1017 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1018 drm_dbg_kms(&i915->drm,
1019 "Unsupported backlight data entry size %u\n",
1020 backlight_data->entry_size);
1024 entry = &backlight_data->data[panel_type];
1026 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1027 if (!panel->vbt.backlight.present) {
1028 drm_dbg_kms(&i915->drm,
1029 "PWM backlight not present in VBT (type %u)\n",
1034 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1035 if (i915->display.vbt.version >= 191) {
1038 if (i915->display.vbt.version >= 236)
1039 exp_size = sizeof(struct bdb_lfp_backlight_data);
1040 else if (i915->display.vbt.version >= 234)
1041 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
1043 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
1045 if (get_blocksize(backlight_data) >= exp_size) {
1046 const struct lfp_backlight_control_method *method;
1048 method = &backlight_data->backlight_control[panel_type];
1049 panel->vbt.backlight.type = method->type;
1050 panel->vbt.backlight.controller = method->controller;
1054 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1055 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1057 if (i915->display.vbt.version >= 234) {
1061 level = backlight_data->brightness_level[panel_type].level;
1062 min_level = backlight_data->brightness_min_level[panel_type].level;
1064 if (i915->display.vbt.version >= 236)
1065 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1067 scale = level > 255;
1070 min_level = min_level / 255;
1072 if (min_level > 255) {
1073 drm_warn(&i915->drm, "Brightness min level > 255\n");
1076 panel->vbt.backlight.min_brightness = min_level;
1078 panel->vbt.backlight.brightness_precision_bits =
1079 backlight_data->brightness_precision_bits[panel_type];
1081 level = backlight_data->level[panel_type];
1082 panel->vbt.backlight.min_brightness = entry->min_brightness;
1085 drm_dbg_kms(&i915->drm,
1086 "VBT backlight PWM modulation frequency %u Hz, "
1087 "active %s, min brightness %u, level %u, controller %u\n",
1088 panel->vbt.backlight.pwm_freq_hz,
1089 panel->vbt.backlight.active_low_pwm ? "low" : "high",
1090 panel->vbt.backlight.min_brightness,
1092 panel->vbt.backlight.controller);
1095 /* Try to find sdvo panel data */
1097 parse_sdvo_panel_data(struct drm_i915_private *i915,
1098 struct intel_panel *panel)
1100 const struct bdb_sdvo_panel_dtds *dtds;
1101 struct drm_display_mode *panel_fixed_mode;
1104 index = i915->params.vbt_sdvo_panel_type;
1106 drm_dbg_kms(&i915->drm,
1107 "Ignore SDVO panel mode from BIOS VBT tables.\n");
1112 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1114 sdvo_lvds_options = find_section(i915, BDB_SDVO_LVDS_OPTIONS);
1115 if (!sdvo_lvds_options)
1118 index = sdvo_lvds_options->panel_type;
1121 dtds = find_section(i915, BDB_SDVO_PANEL_DTDS);
1125 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1126 if (!panel_fixed_mode)
1129 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
1131 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1133 drm_dbg_kms(&i915->drm,
1134 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1135 DRM_MODE_ARG(panel_fixed_mode));
1138 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1141 switch (DISPLAY_VER(i915)) {
1143 return alternate ? 66667 : 48000;
1146 return alternate ? 100000 : 96000;
1148 return alternate ? 100000 : 120000;
1153 parse_general_features(struct drm_i915_private *i915)
1155 const struct bdb_general_features *general;
1157 general = find_section(i915, BDB_GENERAL_FEATURES);
1161 i915->display.vbt.int_tv_support = general->int_tv_support;
1162 /* int_crt_support can't be trusted on earlier platforms */
1163 if (i915->display.vbt.version >= 155 &&
1164 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1165 i915->display.vbt.int_crt_support = general->int_crt_support;
1166 i915->display.vbt.lvds_use_ssc = general->enable_ssc;
1167 i915->display.vbt.lvds_ssc_freq =
1168 intel_bios_ssc_frequency(i915, general->ssc_freq);
1169 i915->display.vbt.display_clock_mode = general->display_clock_mode;
1170 i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1171 if (i915->display.vbt.version >= 181) {
1172 i915->display.vbt.orientation = general->rotate_180 ?
1173 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1174 DRM_MODE_PANEL_ORIENTATION_NORMAL;
1176 i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1179 if (i915->display.vbt.version >= 249 && general->afc_startup_config) {
1180 i915->display.vbt.override_afc_startup = true;
1181 i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1184 drm_dbg_kms(&i915->drm,
1185 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1186 i915->display.vbt.int_tv_support,
1187 i915->display.vbt.int_crt_support,
1188 i915->display.vbt.lvds_use_ssc,
1189 i915->display.vbt.lvds_ssc_freq,
1190 i915->display.vbt.display_clock_mode,
1191 i915->display.vbt.fdi_rx_polarity_inverted);
1194 static const struct child_device_config *
1195 child_device_ptr(const struct bdb_general_definitions *defs, int i)
1197 return (const void *) &defs->devices[i * defs->child_dev_size];
1201 parse_sdvo_device_mapping(struct drm_i915_private *i915)
1203 struct sdvo_device_mapping *mapping;
1204 const struct intel_bios_encoder_data *devdata;
1205 const struct child_device_config *child;
1209 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1210 * accurate and doesn't have to be, as long as it's not too strict.
1212 if (!IS_DISPLAY_VER(i915, 3, 7)) {
1213 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1217 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
1218 child = &devdata->child;
1220 if (child->slave_addr != SLAVE_ADDR1 &&
1221 child->slave_addr != SLAVE_ADDR2) {
1223 * If the slave address is neither 0x70 nor 0x72,
1224 * it is not a SDVO device. Skip it.
1228 if (child->dvo_port != DEVICE_PORT_DVOB &&
1229 child->dvo_port != DEVICE_PORT_DVOC) {
1230 /* skip the incorrect SDVO port */
1231 drm_dbg_kms(&i915->drm,
1232 "Incorrect SDVO port. Skip it\n");
1235 drm_dbg_kms(&i915->drm,
1236 "the SDVO device with slave addr %2x is found on"
1239 (child->dvo_port == DEVICE_PORT_DVOB) ?
1241 mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1];
1242 if (!mapping->initialized) {
1243 mapping->dvo_port = child->dvo_port;
1244 mapping->slave_addr = child->slave_addr;
1245 mapping->dvo_wiring = child->dvo_wiring;
1246 mapping->ddc_pin = child->ddc_pin;
1247 mapping->i2c_pin = child->i2c_pin;
1248 mapping->initialized = 1;
1249 drm_dbg_kms(&i915->drm,
1250 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1251 mapping->dvo_port, mapping->slave_addr,
1252 mapping->dvo_wiring, mapping->ddc_pin,
1255 drm_dbg_kms(&i915->drm,
1256 "Maybe one SDVO port is shared by "
1257 "two SDVO device.\n");
1259 if (child->slave2_addr) {
1260 /* Maybe this is a SDVO device with multiple inputs */
1261 /* And the mapping info is not added */
1262 drm_dbg_kms(&i915->drm,
1263 "there exists the slave2_addr. Maybe this"
1264 " is a SDVO device with multiple inputs.\n");
1270 /* No SDVO device info is found */
1271 drm_dbg_kms(&i915->drm,
1272 "No SDVO device info is found in VBT\n");
1277 parse_driver_features(struct drm_i915_private *i915)
1279 const struct bdb_driver_features *driver;
1281 driver = find_section(i915, BDB_DRIVER_FEATURES);
1285 if (DISPLAY_VER(i915) >= 5) {
1287 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1288 * to mean "eDP". The VBT spec doesn't agree with that
1289 * interpretation, but real world VBTs seem to.
1291 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1292 i915->display.vbt.int_lvds_support = 0;
1295 * FIXME it's not clear which BDB version has the LVDS config
1296 * bits defined. Revision history in the VBT spec says:
1297 * "0.92 | Add two definitions for VBT value of LVDS Active
1298 * Config (00b and 11b values defined) | 06/13/2005"
1299 * but does not the specify the BDB version.
1301 * So far version 134 (on i945gm) is the oldest VBT observed
1302 * in the wild with the bits correctly populated. Version
1303 * 108 (on i85x) does not have the bits correctly populated.
1305 if (i915->display.vbt.version >= 134 &&
1306 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1307 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1308 i915->display.vbt.int_lvds_support = 0;
1313 parse_panel_driver_features(struct drm_i915_private *i915,
1314 struct intel_panel *panel)
1316 const struct bdb_driver_features *driver;
1318 driver = find_section(i915, BDB_DRIVER_FEATURES);
1322 if (i915->display.vbt.version < 228) {
1323 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1324 driver->drrs_enabled);
1326 * If DRRS is not supported, drrs_type has to be set to 0.
1327 * This is because, VBT is configured in such a way that
1328 * static DRRS is 0 and DRRS not supported is represented by
1329 * driver->drrs_enabled=false
1331 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1333 * FIXME Should DMRRS perhaps be treated as seamless
1334 * but without the automatic downclocking?
1336 if (driver->dmrrs_enabled)
1337 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1339 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1342 panel->vbt.psr.enable = driver->psr_enabled;
1347 parse_power_conservation_features(struct drm_i915_private *i915,
1348 struct intel_panel *panel)
1350 const struct bdb_lfp_power *power;
1351 u8 panel_type = panel->vbt.panel_type;
1353 panel->vbt.vrr = true; /* matches Windows behaviour */
1355 if (i915->display.vbt.version < 228)
1358 power = find_section(i915, BDB_LFP_POWER);
1362 panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1365 * If DRRS is not supported, drrs_type has to be set to 0.
1366 * This is because, VBT is configured in such a way that
1367 * static DRRS is 0 and DRRS not supported is represented by
1368 * power->drrs & BIT(panel_type)=false
1370 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1372 * FIXME Should DMRRS perhaps be treated as seamless
1373 * but without the automatic downclocking?
1375 if (panel_bool(power->dmrrs, panel_type))
1376 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1378 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1381 if (i915->display.vbt.version >= 232)
1382 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1384 if (i915->display.vbt.version >= 233)
1385 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1390 parse_edp(struct drm_i915_private *i915,
1391 struct intel_panel *panel)
1393 const struct bdb_edp *edp;
1394 const struct edp_power_seq *edp_pps;
1395 const struct edp_fast_link_params *edp_link_params;
1396 int panel_type = panel->vbt.panel_type;
1398 edp = find_section(i915, BDB_EDP);
1402 switch (panel_bits(edp->color_depth, panel_type, 2)) {
1404 panel->vbt.edp.bpp = 18;
1407 panel->vbt.edp.bpp = 24;
1410 panel->vbt.edp.bpp = 30;
1414 /* Get the eDP sequencing and link info */
1415 edp_pps = &edp->power_seqs[panel_type];
1416 edp_link_params = &edp->fast_link_params[panel_type];
1418 panel->vbt.edp.pps = *edp_pps;
1420 if (i915->display.vbt.version >= 224) {
1421 panel->vbt.edp.rate =
1422 edp->edp_fast_link_training_rate[panel_type] * 20;
1424 switch (edp_link_params->rate) {
1426 panel->vbt.edp.rate = 162000;
1429 panel->vbt.edp.rate = 270000;
1432 panel->vbt.edp.rate = 540000;
1435 drm_dbg_kms(&i915->drm,
1436 "VBT has unknown eDP link rate value %u\n",
1437 edp_link_params->rate);
1442 switch (edp_link_params->lanes) {
1444 panel->vbt.edp.lanes = 1;
1447 panel->vbt.edp.lanes = 2;
1450 panel->vbt.edp.lanes = 4;
1453 drm_dbg_kms(&i915->drm,
1454 "VBT has unknown eDP lane count value %u\n",
1455 edp_link_params->lanes);
1459 switch (edp_link_params->preemphasis) {
1460 case EDP_PREEMPHASIS_NONE:
1461 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1463 case EDP_PREEMPHASIS_3_5dB:
1464 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1466 case EDP_PREEMPHASIS_6dB:
1467 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1469 case EDP_PREEMPHASIS_9_5dB:
1470 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1473 drm_dbg_kms(&i915->drm,
1474 "VBT has unknown eDP pre-emphasis value %u\n",
1475 edp_link_params->preemphasis);
1479 switch (edp_link_params->vswing) {
1480 case EDP_VSWING_0_4V:
1481 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1483 case EDP_VSWING_0_6V:
1484 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1486 case EDP_VSWING_0_8V:
1487 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1489 case EDP_VSWING_1_2V:
1490 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1493 drm_dbg_kms(&i915->drm,
1494 "VBT has unknown eDP voltage swing value %u\n",
1495 edp_link_params->vswing);
1499 if (i915->display.vbt.version >= 173) {
1502 /* Don't read from VBT if module parameter has valid value*/
1503 if (i915->params.edp_vswing) {
1504 panel->vbt.edp.low_vswing =
1505 i915->params.edp_vswing == 1;
1507 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1508 panel->vbt.edp.low_vswing = vswing == 0;
1512 panel->vbt.edp.drrs_msa_timing_delay =
1513 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1515 if (i915->display.vbt.version >= 244)
1516 panel->vbt.edp.max_link_rate =
1517 edp->edp_max_port_link_rate[panel_type] * 20;
1521 parse_psr(struct drm_i915_private *i915,
1522 struct intel_panel *panel)
1524 const struct bdb_psr *psr;
1525 const struct psr_table *psr_table;
1526 int panel_type = panel->vbt.panel_type;
1528 psr = find_section(i915, BDB_PSR);
1530 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1534 psr_table = &psr->psr_table[panel_type];
1536 panel->vbt.psr.full_link = psr_table->full_link;
1537 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1539 /* Allowed VBT values goes from 0 to 15 */
1540 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1541 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1544 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1545 * Old decimal value is wake up time in multiples of 100 us.
1547 if (i915->display.vbt.version >= 205 &&
1548 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1549 switch (psr_table->tp1_wakeup_time) {
1551 panel->vbt.psr.tp1_wakeup_time_us = 500;
1554 panel->vbt.psr.tp1_wakeup_time_us = 100;
1557 panel->vbt.psr.tp1_wakeup_time_us = 0;
1560 drm_dbg_kms(&i915->drm,
1561 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1562 psr_table->tp1_wakeup_time);
1565 panel->vbt.psr.tp1_wakeup_time_us = 2500;
1569 switch (psr_table->tp2_tp3_wakeup_time) {
1571 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1574 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1577 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1580 drm_dbg_kms(&i915->drm,
1581 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1582 psr_table->tp2_tp3_wakeup_time);
1585 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1589 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1590 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1593 if (i915->display.vbt.version >= 226) {
1594 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1596 wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1597 switch (wakeup_time) {
1612 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1614 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1615 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1619 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1620 struct intel_panel *panel,
1623 enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C;
1625 if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) {
1626 panel->vbt.dsi.bl_ports = BIT(port);
1627 if (panel->vbt.dsi.config->cabc_supported)
1628 panel->vbt.dsi.cabc_ports = BIT(port);
1633 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1635 panel->vbt.dsi.bl_ports = BIT(PORT_A);
1638 panel->vbt.dsi.bl_ports = BIT(port_bc);
1641 case DL_DCS_PORT_A_AND_C:
1642 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1646 if (!panel->vbt.dsi.config->cabc_supported)
1649 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1651 panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1654 panel->vbt.dsi.cabc_ports = BIT(port_bc);
1657 case DL_DCS_PORT_A_AND_C:
1658 panel->vbt.dsi.cabc_ports =
1659 BIT(PORT_A) | BIT(port_bc);
1665 parse_mipi_config(struct drm_i915_private *i915,
1666 struct intel_panel *panel)
1668 const struct bdb_mipi_config *start;
1669 const struct mipi_config *config;
1670 const struct mipi_pps_data *pps;
1671 int panel_type = panel->vbt.panel_type;
1674 /* parse MIPI blocks only if LFP type is MIPI */
1675 if (!intel_bios_is_dsi_present(i915, &port))
1678 /* Initialize this to undefined indicating no generic MIPI support */
1679 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1681 /* Block #40 is already parsed and panel_fixed_mode is
1682 * stored in i915->lfp_lvds_vbt_mode
1683 * resuse this when needed
1686 /* Parse #52 for panel index used from panel_type already
1689 start = find_section(i915, BDB_MIPI_CONFIG);
1691 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1695 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1699 * get hold of the correct configuration block and pps data as per
1700 * the panel_type as index
1702 config = &start->config[panel_type];
1703 pps = &start->pps[panel_type];
1705 /* store as of now full data. Trim when we realise all is not needed */
1706 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1707 if (!panel->vbt.dsi.config)
1710 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1711 if (!panel->vbt.dsi.pps) {
1712 kfree(panel->vbt.dsi.config);
1716 parse_dsi_backlight_ports(i915, panel, port);
1718 /* FIXME is the 90 vs. 270 correct? */
1719 switch (config->rotation) {
1720 case ENABLE_ROTATION_0:
1722 * Most (all?) VBTs claim 0 degrees despite having
1723 * an upside down panel, thus we do not trust this.
1725 panel->vbt.dsi.orientation =
1726 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1728 case ENABLE_ROTATION_90:
1729 panel->vbt.dsi.orientation =
1730 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1732 case ENABLE_ROTATION_180:
1733 panel->vbt.dsi.orientation =
1734 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1736 case ENABLE_ROTATION_270:
1737 panel->vbt.dsi.orientation =
1738 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1742 /* We have mandatory mipi config blocks. Initialize as generic panel */
1743 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1746 /* Find the sequence block and size for the given panel. */
1748 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1749 u16 panel_id, u32 *seq_size)
1751 u32 total = get_blocksize(sequence);
1752 const u8 *data = &sequence->data[0];
1755 int header_size = sequence->version >= 3 ? 5 : 3;
1759 /* skip new block size */
1760 if (sequence->version >= 3)
1763 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1764 if (index + header_size > total) {
1765 DRM_ERROR("Invalid sequence block (header)\n");
1769 current_id = *(data + index);
1770 if (sequence->version >= 3)
1771 current_size = *((const u32 *)(data + index + 1));
1773 current_size = *((const u16 *)(data + index + 1));
1775 index += header_size;
1777 if (index + current_size > total) {
1778 DRM_ERROR("Invalid sequence block\n");
1782 if (current_id == panel_id) {
1783 *seq_size = current_size;
1784 return data + index;
1787 index += current_size;
1790 DRM_ERROR("Sequence block detected but no valid configuration\n");
1795 static int goto_next_sequence(const u8 *data, int index, int total)
1799 /* Skip Sequence Byte. */
1800 for (index = index + 1; index < total; index += len) {
1801 u8 operation_byte = *(data + index);
1804 switch (operation_byte) {
1805 case MIPI_SEQ_ELEM_END:
1807 case MIPI_SEQ_ELEM_SEND_PKT:
1808 if (index + 4 > total)
1811 len = *((const u16 *)(data + index + 2)) + 4;
1813 case MIPI_SEQ_ELEM_DELAY:
1816 case MIPI_SEQ_ELEM_GPIO:
1819 case MIPI_SEQ_ELEM_I2C:
1820 if (index + 7 > total)
1822 len = *(data + index + 6) + 7;
1825 DRM_ERROR("Unknown operation byte\n");
1833 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1837 u32 size_of_sequence;
1840 * Could skip sequence based on Size of Sequence alone, but also do some
1841 * checking on the structure.
1844 DRM_ERROR("Too small sequence size\n");
1848 /* Skip Sequence Byte. */
1852 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1853 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1856 size_of_sequence = *((const u32 *)(data + index));
1859 seq_end = index + size_of_sequence;
1860 if (seq_end > total) {
1861 DRM_ERROR("Invalid sequence size\n");
1865 for (; index < total; index += len) {
1866 u8 operation_byte = *(data + index);
1869 if (operation_byte == MIPI_SEQ_ELEM_END) {
1870 if (index != seq_end) {
1871 DRM_ERROR("Invalid element structure\n");
1877 len = *(data + index);
1881 * FIXME: Would be nice to check elements like for v1/v2 in
1882 * goto_next_sequence() above.
1884 switch (operation_byte) {
1885 case MIPI_SEQ_ELEM_SEND_PKT:
1886 case MIPI_SEQ_ELEM_DELAY:
1887 case MIPI_SEQ_ELEM_GPIO:
1888 case MIPI_SEQ_ELEM_I2C:
1889 case MIPI_SEQ_ELEM_SPI:
1890 case MIPI_SEQ_ELEM_PMIC:
1893 DRM_ERROR("Unknown operation byte %u\n",
1903 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1904 * skip all delay + gpio operands and stop at the first DSI packet op.
1906 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
1907 struct intel_panel *panel)
1909 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1912 if (drm_WARN_ON(&i915->drm,
1913 !data || panel->vbt.dsi.seq_version != 1))
1916 /* index = 1 to skip sequence byte */
1917 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1918 switch (data[index]) {
1919 case MIPI_SEQ_ELEM_SEND_PKT:
1920 return index == 1 ? 0 : index;
1921 case MIPI_SEQ_ELEM_DELAY:
1922 len = 5; /* 1 byte for operand + uint32 */
1924 case MIPI_SEQ_ELEM_GPIO:
1925 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1936 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1937 * The deassert must be done before calling intel_dsi_device_ready, so for
1938 * these devices we split the init OTP sequence into a deassert sequence and
1939 * the actual init OTP part.
1941 static void fixup_mipi_sequences(struct drm_i915_private *i915,
1942 struct intel_panel *panel)
1947 /* Limit this to VLV for now. */
1948 if (!IS_VALLEYVIEW(i915))
1951 /* Limit this to v1 vid-mode sequences */
1952 if (panel->vbt.dsi.config->is_cmd_mode ||
1953 panel->vbt.dsi.seq_version != 1)
1956 /* Only do this if there are otp and assert seqs and no deassert seq */
1957 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1958 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1959 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1962 /* The deassert-sequence ends at the first DSI packet */
1963 len = get_init_otp_deassert_fragment_len(i915, panel);
1967 drm_dbg_kms(&i915->drm,
1968 "Using init OTP fragment to deassert reset\n");
1970 /* Copy the fragment, update seq byte and terminate it */
1971 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1972 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1973 if (!panel->vbt.dsi.deassert_seq)
1975 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1976 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1977 /* Use the copy for deassert */
1978 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1979 panel->vbt.dsi.deassert_seq;
1980 /* Replace the last byte of the fragment with init OTP seq byte */
1981 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1982 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1983 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1987 parse_mipi_sequence(struct drm_i915_private *i915,
1988 struct intel_panel *panel)
1990 int panel_type = panel->vbt.panel_type;
1991 const struct bdb_mipi_sequence *sequence;
1997 /* Only our generic panel driver uses the sequence block. */
1998 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
2001 sequence = find_section(i915, BDB_MIPI_SEQUENCE);
2003 drm_dbg_kms(&i915->drm,
2004 "No MIPI Sequence found, parsing complete\n");
2008 /* Fail gracefully for forward incompatible sequence block. */
2009 if (sequence->version >= 4) {
2011 "Unable to parse MIPI Sequence Block v%u\n",
2016 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
2019 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
2023 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
2027 /* Parse the sequences, store pointers to each sequence. */
2029 u8 seq_id = *(data + index);
2030 if (seq_id == MIPI_SEQ_END)
2033 if (seq_id >= MIPI_SEQ_MAX) {
2034 drm_err(&i915->drm, "Unknown sequence %u\n",
2039 /* Log about presence of sequences we won't run. */
2040 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2041 drm_dbg_kms(&i915->drm,
2042 "Unsupported sequence %u\n", seq_id);
2044 panel->vbt.dsi.sequence[seq_id] = data + index;
2046 if (sequence->version >= 3)
2047 index = goto_next_sequence_v3(data, index, seq_size);
2049 index = goto_next_sequence(data, index, seq_size);
2051 drm_err(&i915->drm, "Invalid sequence %u\n",
2057 panel->vbt.dsi.data = data;
2058 panel->vbt.dsi.size = seq_size;
2059 panel->vbt.dsi.seq_version = sequence->version;
2061 fixup_mipi_sequences(i915, panel);
2063 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
2068 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2072 parse_compression_parameters(struct drm_i915_private *i915)
2074 const struct bdb_compression_parameters *params;
2075 struct intel_bios_encoder_data *devdata;
2076 const struct child_device_config *child;
2080 if (i915->display.vbt.version < 198)
2083 params = find_section(i915, BDB_COMPRESSION_PARAMETERS);
2086 if (params->entry_size != sizeof(params->data[0])) {
2087 drm_dbg_kms(&i915->drm,
2088 "VBT: unsupported compression param entry size\n");
2092 block_size = get_blocksize(params);
2093 if (block_size < sizeof(*params)) {
2094 drm_dbg_kms(&i915->drm,
2095 "VBT: expected 16 compression param entries\n");
2100 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
2101 child = &devdata->child;
2103 if (!child->compression_enable)
2107 drm_dbg_kms(&i915->drm,
2108 "VBT: compression params not available\n");
2112 if (child->compression_method_cps) {
2113 drm_dbg_kms(&i915->drm,
2114 "VBT: CPS compression not supported\n");
2118 index = child->compression_structure_index;
2120 devdata->dsc = kmemdup(¶ms->data[index],
2121 sizeof(*devdata->dsc), GFP_KERNEL);
2125 static u8 translate_iboost(u8 val)
2127 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2129 if (val >= ARRAY_SIZE(mapping)) {
2130 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2133 return mapping[val];
2136 static const u8 cnp_ddc_pin_map[] = {
2138 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
2139 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
2140 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
2141 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
2144 static const u8 icp_ddc_pin_map[] = {
2145 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2146 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2147 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
2148 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
2149 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
2150 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
2151 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
2152 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
2153 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
2156 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2157 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2158 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2159 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
2160 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
2163 static const u8 adls_ddc_pin_map[] = {
2164 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2165 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
2166 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
2167 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
2168 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
2171 static const u8 gen9bc_tgp_ddc_pin_map[] = {
2172 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2173 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
2174 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
2177 static const u8 adlp_ddc_pin_map[] = {
2178 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2179 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2180 [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
2181 [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
2182 [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
2183 [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
2186 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2188 const u8 *ddc_pin_map;
2191 if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) {
2192 ddc_pin_map = adlp_ddc_pin_map;
2193 n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2194 } else if (IS_ALDERLAKE_S(i915)) {
2195 ddc_pin_map = adls_ddc_pin_map;
2196 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2197 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
2199 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2200 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2201 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2202 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2203 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2204 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2205 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2206 ddc_pin_map = icp_ddc_pin_map;
2207 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2208 } else if (HAS_PCH_CNP(i915)) {
2209 ddc_pin_map = cnp_ddc_pin_map;
2210 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2212 /* Assuming direct map */
2216 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
2217 return ddc_pin_map[vbt_pin];
2219 drm_dbg_kms(&i915->drm,
2220 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2225 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
2227 const struct intel_bios_encoder_data *devdata;
2233 for_each_port(port) {
2234 devdata = i915->display.vbt.ports[port];
2236 if (devdata && ddc_pin == devdata->child.ddc_pin)
2243 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
2246 struct drm_i915_private *i915 = devdata->i915;
2247 struct child_device_config *child;
2251 if (!devdata->child.ddc_pin)
2254 mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin);
2255 if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) {
2256 drm_dbg_kms(&i915->drm,
2257 "Port %c has invalid DDC pin %d, "
2258 "sticking to defaults\n",
2259 port_name(port), mapped_ddc_pin);
2260 devdata->child.ddc_pin = 0;
2264 p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin);
2268 drm_dbg_kms(&i915->drm,
2269 "port %c trying to use the same DDC pin (0x%x) as port %c, "
2270 "disabling port %c DVI/HDMI support\n",
2271 port_name(port), mapped_ddc_pin,
2272 port_name(p), port_name(p));
2275 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
2276 * couldn't exist on the shared port. Otherwise they share the same ddc
2277 * pin and system couldn't communicate with them separately.
2279 * Give inverse child device order the priority, last one wins. Yes,
2280 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2281 * port A and port E with the same AUX ch and we must pick port E :(
2283 child = &i915->display.vbt.ports[p]->child;
2285 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2286 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2291 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
2293 const struct intel_bios_encoder_data *devdata;
2299 for_each_port(port) {
2300 devdata = i915->display.vbt.ports[port];
2302 if (devdata && aux_ch == devdata->child.aux_channel)
2309 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
2312 struct drm_i915_private *i915 = devdata->i915;
2313 struct child_device_config *child;
2316 p = get_port_by_aux_ch(i915, devdata->child.aux_channel);
2320 drm_dbg_kms(&i915->drm,
2321 "port %c trying to use the same AUX CH (0x%x) as port %c, "
2322 "disabling port %c DP support\n",
2323 port_name(port), devdata->child.aux_channel,
2324 port_name(p), port_name(p));
2327 * If we have multiple ports supposedly sharing the aux channel, then DP
2328 * couldn't exist on the shared port. Otherwise they share the same aux
2329 * channel and system couldn't communicate with them separately.
2331 * Give inverse child device order the priority, last one wins. Yes,
2332 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2333 * port A and port E with the same AUX ch and we must pick port E :(
2335 child = &i915->display.vbt.ports[p]->child;
2337 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2338 child->aux_channel = 0;
2341 static u8 dvo_port_type(u8 dvo_port)
2344 case DVO_PORT_HDMIA:
2345 case DVO_PORT_HDMIB:
2346 case DVO_PORT_HDMIC:
2347 case DVO_PORT_HDMID:
2348 case DVO_PORT_HDMIE:
2349 case DVO_PORT_HDMIF:
2350 case DVO_PORT_HDMIG:
2351 case DVO_PORT_HDMIH:
2352 case DVO_PORT_HDMII:
2353 return DVO_PORT_HDMIA;
2363 return DVO_PORT_DPA;
2364 case DVO_PORT_MIPIA:
2365 case DVO_PORT_MIPIB:
2366 case DVO_PORT_MIPIC:
2367 case DVO_PORT_MIPID:
2368 return DVO_PORT_MIPIA;
2374 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2375 const int port_mapping[][3], u8 dvo_port)
2380 for (port = PORT_A; port < n_ports; port++) {
2381 for (i = 0; i < n_dvo; i++) {
2382 if (port_mapping[port][i] == -1)
2385 if (dvo_port == port_mapping[port][i])
2393 static enum port dvo_port_to_port(struct drm_i915_private *i915,
2397 * Each DDI port can have more than one value on the "DVO Port" field,
2398 * so look for all the possible values for each port.
2400 static const int port_mapping[][3] = {
2401 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2402 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2403 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2404 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2405 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2406 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2407 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2408 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2409 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2412 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2413 * map to DDI A,B,TC1,TC2 respectively.
2415 static const int rkl_port_mapping[][3] = {
2416 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2417 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2419 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2420 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2423 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2424 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2426 static const int adls_port_mapping[][3] = {
2427 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2430 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2431 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2432 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2433 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2435 static const int xelpd_port_mapping[][3] = {
2436 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2437 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2438 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2439 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2440 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2441 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2442 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2443 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2444 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2447 if (DISPLAY_VER(i915) >= 13)
2448 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2449 ARRAY_SIZE(xelpd_port_mapping[0]),
2452 else if (IS_ALDERLAKE_S(i915))
2453 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2454 ARRAY_SIZE(adls_port_mapping[0]),
2457 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2458 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2459 ARRAY_SIZE(rkl_port_mapping[0]),
2463 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2464 ARRAY_SIZE(port_mapping[0]),
2469 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2471 switch (vbt_max_link_rate) {
2473 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2475 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2477 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2479 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2481 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2483 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2485 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2487 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2492 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2494 switch (vbt_max_link_rate) {
2496 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2498 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2500 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2502 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2507 static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2509 if (!devdata || devdata->i915->display.vbt.version < 216)
2512 if (devdata->i915->display.vbt.version >= 230)
2513 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2515 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2518 static int _intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2520 if (!devdata || devdata->i915->display.vbt.version < 244)
2523 return devdata->child.dp_max_lane_count + 1;
2526 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2529 struct drm_i915_private *i915 = devdata->i915;
2532 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2535 if (!intel_bios_encoder_supports_dvi(devdata))
2538 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2540 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2541 is_hdmi ? "/HDMI" : "");
2543 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2544 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2548 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2550 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2554 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2556 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2560 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2562 return intel_bios_encoder_supports_dvi(devdata) &&
2563 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2567 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2569 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2573 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2575 return intel_bios_encoder_supports_dp(devdata) &&
2576 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2579 static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2581 if (!devdata || devdata->i915->display.vbt.version < 158)
2584 return devdata->child.hdmi_level_shifter_value;
2587 static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2589 if (!devdata || devdata->i915->display.vbt.version < 204)
2592 switch (devdata->child.hdmi_max_data_rate) {
2594 MISSING_CASE(devdata->child.hdmi_max_data_rate);
2596 case HDMI_MAX_DATA_RATE_PLATFORM:
2598 case HDMI_MAX_DATA_RATE_594:
2600 case HDMI_MAX_DATA_RATE_340:
2602 case HDMI_MAX_DATA_RATE_300:
2604 case HDMI_MAX_DATA_RATE_297:
2606 case HDMI_MAX_DATA_RATE_165:
2611 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2614 * On some ICL SKUs port F is not present, but broken VBTs mark
2615 * the port as present. Only try to initialize port F for the
2616 * SKUs that may actually have it.
2618 if (port == PORT_F && IS_ICELAKE(i915))
2619 return IS_ICL_WITH_PORT_F(i915);
2624 static void print_ddi_port(const struct intel_bios_encoder_data *devdata,
2627 struct drm_i915_private *i915 = devdata->i915;
2628 const struct child_device_config *child = &devdata->child;
2629 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
2630 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2632 is_dvi = intel_bios_encoder_supports_dvi(devdata);
2633 is_dp = intel_bios_encoder_supports_dp(devdata);
2634 is_crt = intel_bios_encoder_supports_crt(devdata);
2635 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2636 is_edp = intel_bios_encoder_supports_edp(devdata);
2638 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2639 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2641 drm_dbg_kms(&i915->drm,
2642 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2643 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
2644 HAS_LSPCON(i915) && child->lspcon,
2645 supports_typec_usb, supports_tbt,
2646 devdata->dsc != NULL);
2648 hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata);
2649 if (hdmi_level_shift >= 0) {
2650 drm_dbg_kms(&i915->drm,
2651 "Port %c VBT HDMI level shift: %d\n",
2652 port_name(port), hdmi_level_shift);
2655 max_tmds_clock = _intel_bios_max_tmds_clock(devdata);
2657 drm_dbg_kms(&i915->drm,
2658 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2659 port_name(port), max_tmds_clock);
2661 /* I_boost config for SKL and above */
2662 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
2664 drm_dbg_kms(&i915->drm,
2665 "Port %c VBT (e)DP boost level: %d\n",
2666 port_name(port), dp_boost_level);
2668 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
2669 if (hdmi_boost_level)
2670 drm_dbg_kms(&i915->drm,
2671 "Port %c VBT HDMI boost level: %d\n",
2672 port_name(port), hdmi_boost_level);
2674 dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata);
2675 if (dp_max_link_rate)
2676 drm_dbg_kms(&i915->drm,
2677 "Port %c VBT DP max link rate: %d\n",
2678 port_name(port), dp_max_link_rate);
2681 * FIXME need to implement support for VBT
2682 * vswing/preemph tables should this ever trigger.
2684 drm_WARN(&i915->drm, child->use_vbt_vswing,
2685 "Port %c asks to use VBT vswing/preemph tables\n",
2689 static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2691 struct drm_i915_private *i915 = devdata->i915;
2692 const struct child_device_config *child = &devdata->child;
2695 port = dvo_port_to_port(i915, child->dvo_port);
2696 if (port == PORT_NONE)
2699 if (!is_port_valid(i915, port)) {
2700 drm_dbg_kms(&i915->drm,
2701 "VBT reports port %c as supported, but that can't be true: skipping\n",
2706 if (i915->display.vbt.ports[port]) {
2707 drm_dbg_kms(&i915->drm,
2708 "More than one child device for port %c in VBT, using the first.\n",
2713 sanitize_device_type(devdata, port);
2715 if (intel_bios_encoder_supports_dvi(devdata))
2716 sanitize_ddc_pin(devdata, port);
2718 if (intel_bios_encoder_supports_dp(devdata))
2719 sanitize_aux_ch(devdata, port);
2721 i915->display.vbt.ports[port] = devdata;
2724 static bool has_ddi_port_info(struct drm_i915_private *i915)
2726 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2729 static void parse_ddi_ports(struct drm_i915_private *i915)
2731 struct intel_bios_encoder_data *devdata;
2734 if (!has_ddi_port_info(i915))
2737 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2738 parse_ddi_port(devdata);
2740 for_each_port(port) {
2741 if (i915->display.vbt.ports[port])
2742 print_ddi_port(i915->display.vbt.ports[port], port);
2747 parse_general_definitions(struct drm_i915_private *i915)
2749 const struct bdb_general_definitions *defs;
2750 struct intel_bios_encoder_data *devdata;
2751 const struct child_device_config *child;
2752 int i, child_device_num;
2757 defs = find_section(i915, BDB_GENERAL_DEFINITIONS);
2759 drm_dbg_kms(&i915->drm,
2760 "No general definition block is found, no devices defined.\n");
2764 block_size = get_blocksize(defs);
2765 if (block_size < sizeof(*defs)) {
2766 drm_dbg_kms(&i915->drm,
2767 "General definitions block too small (%u)\n",
2772 bus_pin = defs->crt_ddc_gmbus_pin;
2773 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2774 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2775 i915->display.vbt.crt_ddc_pin = bus_pin;
2777 if (i915->display.vbt.version < 106) {
2779 } else if (i915->display.vbt.version < 111) {
2781 } else if (i915->display.vbt.version < 195) {
2782 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2783 } else if (i915->display.vbt.version == 195) {
2785 } else if (i915->display.vbt.version <= 215) {
2787 } else if (i915->display.vbt.version <= 237) {
2790 expected_size = sizeof(*child);
2791 BUILD_BUG_ON(sizeof(*child) < 39);
2793 "Expected child device config size for VBT version %u not known; assuming %u\n",
2794 i915->display.vbt.version, expected_size);
2797 /* Flag an error for unexpected size, but continue anyway. */
2798 if (defs->child_dev_size != expected_size)
2800 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2801 defs->child_dev_size, expected_size, i915->display.vbt.version);
2803 /* The legacy sized child device config is the minimum we need. */
2804 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2805 drm_dbg_kms(&i915->drm,
2806 "Child device config size %u is too small.\n",
2807 defs->child_dev_size);
2811 /* get the number of child device */
2812 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2814 for (i = 0; i < child_device_num; i++) {
2815 child = child_device_ptr(defs, i);
2816 if (!child->device_type)
2819 drm_dbg_kms(&i915->drm,
2820 "Found VBT child device with type 0x%x\n",
2821 child->device_type);
2823 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2827 devdata->i915 = i915;
2830 * Copy as much as we know (sizeof) and is available
2831 * (child_dev_size) of the child device config. Accessing the
2832 * data must depend on VBT version.
2834 memcpy(&devdata->child, child,
2835 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2837 list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2840 if (list_empty(&i915->display.vbt.display_devices))
2841 drm_dbg_kms(&i915->drm,
2842 "no child dev is parsed from VBT\n");
2845 /* Common defaults which may be overridden by VBT. */
2847 init_vbt_defaults(struct drm_i915_private *i915)
2849 i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2851 /* general features */
2852 i915->display.vbt.int_tv_support = 1;
2853 i915->display.vbt.int_crt_support = 1;
2855 /* driver features */
2856 i915->display.vbt.int_lvds_support = 1;
2858 /* Default to using SSC */
2859 i915->display.vbt.lvds_use_ssc = 1;
2861 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2864 i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2865 !HAS_PCH_SPLIT(i915));
2866 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2867 i915->display.vbt.lvds_ssc_freq);
2870 /* Common defaults which may be overridden by VBT. */
2872 init_vbt_panel_defaults(struct intel_panel *panel)
2874 /* Default to having backlight */
2875 panel->vbt.backlight.present = true;
2877 /* LFP panel data */
2878 panel->vbt.lvds_dither = true;
2881 /* Defaults to initialize only if there is no VBT. */
2883 init_vbt_missing_defaults(struct drm_i915_private *i915)
2886 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2887 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2889 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2892 for_each_port_masked(port, ports) {
2893 struct intel_bios_encoder_data *devdata;
2894 struct child_device_config *child;
2895 enum phy phy = intel_port_to_phy(i915, port);
2898 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2901 if (intel_phy_is_tc(i915, phy))
2904 /* Create fake child device config */
2905 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2909 devdata->i915 = i915;
2910 child = &devdata->child;
2913 child->dvo_port = DVO_PORT_HDMIF;
2914 else if (port == PORT_E)
2915 child->dvo_port = DVO_PORT_HDMIE;
2917 child->dvo_port = DVO_PORT_HDMIA + port;
2919 if (port != PORT_A && port != PORT_E)
2920 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2923 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2926 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2928 list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2930 drm_dbg_kms(&i915->drm,
2931 "Generating default VBT child device with type 0x04%x on port %c\n",
2932 child->device_type, port_name(port));
2935 /* Bypass some minimum baseline VBT version checks */
2936 i915->display.vbt.version = 155;
2939 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2941 const void *_vbt = vbt;
2943 return _vbt + vbt->bdb_offset;
2947 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2948 * @buf: pointer to a buffer to validate
2949 * @size: size of the buffer
2951 * Returns true on valid VBT.
2953 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2955 const struct vbt_header *vbt = buf;
2956 const struct bdb_header *bdb;
2961 if (sizeof(struct vbt_header) > size) {
2962 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2966 if (memcmp(vbt->signature, "$VBT", 4)) {
2967 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2971 if (vbt->vbt_size > size) {
2972 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2976 size = vbt->vbt_size;
2978 if (range_overflows_t(size_t,
2980 sizeof(struct bdb_header),
2982 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2986 bdb = get_bdb_header(vbt);
2987 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2988 DRM_DEBUG_DRIVER("BDB incomplete\n");
2995 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
2997 u32 count, data, found, store = 0;
2998 u32 static_region, oprom_offset;
2999 u32 oprom_size = 0x200000;
3003 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
3004 static_region &= OPTIONROM_SPI_REGIONID_MASK;
3005 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
3007 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
3008 oprom_offset &= OROM_OFFSET_MASK;
3010 for (count = 0; count < oprom_size; count += 4) {
3011 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count);
3012 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
3014 if (data == *((const u32 *)"$VBT")) {
3015 found = oprom_offset + count;
3020 if (count >= oprom_size)
3023 /* Get VBT size and allocate space for the VBT */
3024 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found +
3025 offsetof(struct vbt_header, vbt_size));
3026 vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
3029 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
3033 for (count = 0; count < vbt_size; count += 4) {
3034 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count);
3035 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
3036 *(vbt + store++) = data;
3039 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3042 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
3044 return (struct vbt_header *)vbt;
3052 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
3054 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
3055 void __iomem *p = NULL, *oprom;
3056 struct vbt_header *vbt;
3060 oprom = pci_map_rom(pdev, &size);
3064 /* Scour memory looking for the VBT signature. */
3065 for (i = 0; i + 4 < size; i += 4) {
3066 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
3075 goto err_unmap_oprom;
3077 if (sizeof(struct vbt_header) > size) {
3078 drm_dbg(&i915->drm, "VBT header incomplete\n");
3079 goto err_unmap_oprom;
3082 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
3083 if (vbt_size > size) {
3085 "VBT incomplete (vbt_size overflows)\n");
3086 goto err_unmap_oprom;
3089 /* The rest will be validated by intel_bios_is_valid_vbt() */
3090 vbt = kmalloc(vbt_size, GFP_KERNEL);
3092 goto err_unmap_oprom;
3094 memcpy_fromio(vbt, p, vbt_size);
3096 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3099 pci_unmap_rom(pdev, oprom);
3101 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
3108 pci_unmap_rom(pdev, oprom);
3114 * intel_bios_init - find VBT and initialize settings from the BIOS
3115 * @i915: i915 device instance
3117 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3118 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3119 * initialize some defaults if the VBT is not present at all.
3121 void intel_bios_init(struct drm_i915_private *i915)
3123 const struct vbt_header *vbt = i915->display.opregion.vbt;
3124 struct vbt_header *oprom_vbt = NULL;
3125 const struct bdb_header *bdb;
3127 INIT_LIST_HEAD(&i915->display.vbt.display_devices);
3128 INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks);
3130 if (!HAS_DISPLAY(i915)) {
3131 drm_dbg_kms(&i915->drm,
3132 "Skipping VBT init due to disabled display.\n");
3136 init_vbt_defaults(i915);
3139 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
3142 if (!vbt && IS_DGFX(i915)) {
3143 oprom_vbt = spi_oprom_get_vbt(i915);
3148 oprom_vbt = oprom_get_vbt(i915);
3155 bdb = get_bdb_header(vbt);
3156 i915->display.vbt.version = bdb->version;
3158 drm_dbg_kms(&i915->drm,
3159 "VBT signature \"%.*s\", BDB version %d\n",
3160 (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version);
3162 init_bdb_blocks(i915, bdb);
3164 /* Grab useful general definitions */
3165 parse_general_features(i915);
3166 parse_general_definitions(i915);
3167 parse_driver_features(i915);
3169 /* Depends on child device list */
3170 parse_compression_parameters(i915);
3174 drm_info(&i915->drm,
3175 "Failed to find VBIOS tables (VBT)\n");
3176 init_vbt_missing_defaults(i915);
3179 /* Further processing on pre-parsed or generated child device data */
3180 parse_sdvo_device_mapping(i915);
3181 parse_ddi_ports(i915);
3186 void intel_bios_init_panel(struct drm_i915_private *i915,
3187 struct intel_panel *panel,
3188 const struct intel_bios_encoder_data *devdata,
3189 const struct edid *edid)
3191 init_vbt_panel_defaults(panel);
3193 panel->vbt.panel_type = get_panel_type(i915, devdata, edid);
3195 parse_panel_options(i915, panel);
3196 parse_generic_dtd(i915, panel);
3197 parse_lfp_data(i915, panel);
3198 parse_lfp_backlight(i915, panel);
3199 parse_sdvo_panel_data(i915, panel);
3200 parse_panel_driver_features(i915, panel);
3201 parse_power_conservation_features(i915, panel);
3202 parse_edp(i915, panel);
3203 parse_psr(i915, panel);
3204 parse_mipi_config(i915, panel);
3205 parse_mipi_sequence(i915, panel);
3209 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3210 * @i915: i915 device instance
3212 void intel_bios_driver_remove(struct drm_i915_private *i915)
3214 struct intel_bios_encoder_data *devdata, *nd;
3215 struct bdb_block_entry *entry, *ne;
3217 list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) {
3218 list_del(&devdata->node);
3219 kfree(devdata->dsc);
3223 list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) {
3224 list_del(&entry->node);
3229 void intel_bios_fini_panel(struct intel_panel *panel)
3231 kfree(panel->vbt.sdvo_lvds_vbt_mode);
3232 panel->vbt.sdvo_lvds_vbt_mode = NULL;
3233 kfree(panel->vbt.lfp_lvds_vbt_mode);
3234 panel->vbt.lfp_lvds_vbt_mode = NULL;
3235 kfree(panel->vbt.dsi.data);
3236 panel->vbt.dsi.data = NULL;
3237 kfree(panel->vbt.dsi.pps);
3238 panel->vbt.dsi.pps = NULL;
3239 kfree(panel->vbt.dsi.config);
3240 panel->vbt.dsi.config = NULL;
3241 kfree(panel->vbt.dsi.deassert_seq);
3242 panel->vbt.dsi.deassert_seq = NULL;
3246 * intel_bios_is_tv_present - is integrated TV present in VBT
3247 * @i915: i915 device instance
3249 * Return true if TV is present. If no child devices were parsed from VBT,
3250 * assume TV is present.
3252 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3254 const struct intel_bios_encoder_data *devdata;
3255 const struct child_device_config *child;
3257 if (!i915->display.vbt.int_tv_support)
3260 if (list_empty(&i915->display.vbt.display_devices))
3263 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3264 child = &devdata->child;
3267 * If the device type is not TV, continue.
3269 switch (child->device_type) {
3270 case DEVICE_TYPE_INT_TV:
3271 case DEVICE_TYPE_TV:
3272 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3277 /* Only when the addin_offset is non-zero, it is regarded
3280 if (child->addin_offset)
3288 * intel_bios_is_lvds_present - is LVDS present in VBT
3289 * @i915: i915 device instance
3290 * @i2c_pin: i2c pin for LVDS if present
3292 * Return true if LVDS is present. If no child devices were parsed from VBT,
3293 * assume LVDS is present.
3295 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3297 const struct intel_bios_encoder_data *devdata;
3298 const struct child_device_config *child;
3300 if (list_empty(&i915->display.vbt.display_devices))
3303 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3304 child = &devdata->child;
3306 /* If the device type is not LFP, continue.
3307 * We have to check both the new identifiers as well as the
3308 * old for compatibility with some BIOSes.
3310 if (child->device_type != DEVICE_TYPE_INT_LFP &&
3311 child->device_type != DEVICE_TYPE_LFP)
3314 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3315 *i2c_pin = child->i2c_pin;
3317 /* However, we cannot trust the BIOS writers to populate
3318 * the VBT correctly. Since LVDS requires additional
3319 * information from AIM blocks, a non-zero addin offset is
3320 * a good indicator that the LVDS is actually present.
3322 if (child->addin_offset)
3325 /* But even then some BIOS writers perform some black magic
3326 * and instantiate the device without reference to any
3327 * additional data. Trust that if the VBT was written into
3328 * the OpRegion then they have validated the LVDS's existence.
3330 if (i915->display.opregion.vbt)
3338 * intel_bios_is_port_present - is the specified digital port present
3339 * @i915: i915 device instance
3340 * @port: port to check
3342 * Return true if the device in %port is present.
3344 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3346 if (WARN_ON(!has_ddi_port_info(i915)))
3349 return i915->display.vbt.ports[port];
3353 * intel_bios_is_port_edp - is the device in given port eDP
3354 * @i915: i915 device instance
3355 * @port: port to check
3357 * Return true if the device in %port is eDP.
3359 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
3361 const struct intel_bios_encoder_data *devdata =
3362 intel_bios_encoder_data_lookup(i915, port);
3364 return devdata && intel_bios_encoder_supports_edp(devdata);
3367 static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3369 const struct child_device_config *child = &devdata->child;
3371 if (!intel_bios_encoder_supports_dp(devdata) ||
3372 !intel_bios_encoder_supports_hdmi(devdata))
3375 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3378 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3379 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3380 child->aux_channel != 0)
3386 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
3389 const struct intel_bios_encoder_data *devdata =
3390 intel_bios_encoder_data_lookup(i915, port);
3392 return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata);
3396 * intel_bios_is_dsi_present - is DSI present in VBT
3397 * @i915: i915 device instance
3398 * @port: port for DSI if present
3400 * Return true if DSI is present, and return the port in %port.
3402 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3405 const struct intel_bios_encoder_data *devdata;
3406 const struct child_device_config *child;
3409 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3410 child = &devdata->child;
3412 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3415 dvo_port = child->dvo_port;
3417 if (dvo_port == DVO_PORT_MIPIA ||
3418 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) ||
3419 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) {
3421 *port = dvo_port - DVO_PORT_MIPIA;
3423 } else if (dvo_port == DVO_PORT_MIPIB ||
3424 dvo_port == DVO_PORT_MIPIC ||
3425 dvo_port == DVO_PORT_MIPID) {
3426 drm_dbg_kms(&i915->drm,
3427 "VBT has unsupported DSI port %c\n",
3428 port_name(dvo_port - DVO_PORT_MIPIA));
3435 static void fill_dsc(struct intel_crtc_state *crtc_state,
3436 struct dsc_compression_parameters_entry *dsc,
3439 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3442 vdsc_cfg->dsc_version_major = dsc->version_major;
3443 vdsc_cfg->dsc_version_minor = dsc->version_minor;
3445 if (dsc->support_12bpc && dsc_max_bpc >= 12)
3447 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3449 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3452 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
3455 crtc_state->pipe_bpp = bpc * 3;
3457 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
3458 VBT_DSC_MAX_BPP(dsc->max_bpp));
3461 * FIXME: This is ugly, and slice count should take DSC engine
3462 * throughput etc. into account.
3464 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3466 if (dsc->slices_per_line & BIT(2)) {
3467 crtc_state->dsc.slice_count = 4;
3468 } else if (dsc->slices_per_line & BIT(1)) {
3469 crtc_state->dsc.slice_count = 2;
3472 if (!(dsc->slices_per_line & BIT(0)))
3473 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
3475 crtc_state->dsc.slice_count = 1;
3478 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3479 crtc_state->dsc.slice_count != 0)
3480 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
3481 crtc_state->hw.adjusted_mode.crtc_hdisplay,
3482 crtc_state->dsc.slice_count);
3485 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3486 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3488 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3489 dsc->rc_buffer_size);
3491 /* FIXME: DSI spec says bpc + 1 for this one */
3492 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3494 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3496 vdsc_cfg->slice_height = dsc->slice_height;
3499 /* FIXME: initially DSI specific */
3500 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3501 struct intel_crtc_state *crtc_state,
3504 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3505 const struct intel_bios_encoder_data *devdata;
3506 const struct child_device_config *child;
3508 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3509 child = &devdata->child;
3511 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3514 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
3519 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3529 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
3530 * @i915: i915 device instance
3531 * @port: port to check
3533 * Return true if HPD should be inverted for %port.
3536 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
3539 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3541 if (drm_WARN_ON_ONCE(&i915->drm,
3542 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
3545 return devdata && devdata->child.hpd_invert;
3549 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
3550 * @i915: i915 device instance
3551 * @port: port to check
3553 * Return true if LSPCON is present on this port
3556 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
3559 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3561 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
3565 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
3566 * @i915: i915 device instance
3567 * @port: port to check
3569 * Return true if port requires lane reversal
3572 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
3575 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3577 return devdata && devdata->child.lane_reversal;
3580 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
3583 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3586 if (!devdata || !devdata->child.aux_channel) {
3587 aux_ch = (enum aux_ch)port;
3589 drm_dbg_kms(&i915->drm,
3590 "using AUX %c for port %c (platform default)\n",
3591 aux_ch_name(aux_ch), port_name(port));
3596 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3597 * map to DDI A,B,TC1,TC2 respectively.
3599 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3600 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3602 switch (devdata->child.aux_channel) {
3607 if (IS_ALDERLAKE_S(i915))
3608 aux_ch = AUX_CH_USBC1;
3613 if (IS_ALDERLAKE_S(i915))
3614 aux_ch = AUX_CH_USBC2;
3615 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3616 aux_ch = AUX_CH_USBC1;
3621 if (DISPLAY_VER(i915) >= 13)
3622 aux_ch = AUX_CH_D_XELPD;
3623 else if (IS_ALDERLAKE_S(i915))
3624 aux_ch = AUX_CH_USBC3;
3625 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3626 aux_ch = AUX_CH_USBC2;
3631 if (DISPLAY_VER(i915) >= 13)
3632 aux_ch = AUX_CH_E_XELPD;
3633 else if (IS_ALDERLAKE_S(i915))
3634 aux_ch = AUX_CH_USBC4;
3639 if (DISPLAY_VER(i915) >= 13)
3640 aux_ch = AUX_CH_USBC1;
3645 if (DISPLAY_VER(i915) >= 13)
3646 aux_ch = AUX_CH_USBC2;
3651 if (DISPLAY_VER(i915) >= 13)
3652 aux_ch = AUX_CH_USBC3;
3657 if (DISPLAY_VER(i915) >= 13)
3658 aux_ch = AUX_CH_USBC4;
3663 MISSING_CASE(devdata->child.aux_channel);
3668 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
3669 aux_ch_name(aux_ch), port_name(port));
3674 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
3676 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3677 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3679 return _intel_bios_max_tmds_clock(devdata);
3682 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
3683 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
3685 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3686 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3688 return _intel_bios_hdmi_level_shift(devdata);
3691 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3693 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3696 return translate_iboost(devdata->child.dp_iboost_level);
3699 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3701 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3704 return translate_iboost(devdata->child.hdmi_iboost_level);
3707 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
3709 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3710 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3712 return _intel_bios_dp_max_link_rate(devdata);
3715 int intel_bios_dp_max_lane_count(struct intel_encoder *encoder)
3717 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3718 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3720 return _intel_bios_dp_max_lane_count(devdata);
3723 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
3725 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3726 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3728 if (!devdata || !devdata->child.ddc_pin)
3731 return map_ddc_pin(i915, devdata->child.ddc_pin);
3734 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3736 return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c;
3739 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3741 return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt;
3744 const struct intel_bios_encoder_data *
3745 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3747 return i915->display.vbt.ports[port];