1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/smp_lock.h>
41 #include <linux/pagemap.h>
43 #define I810_BUF_FREE 2
44 #define I810_BUF_CLIENT 1
45 #define I810_BUF_HARDWARE 0
47 #define I810_BUF_UNMAPPED 0
48 #define I810_BUF_MAPPED 1
50 static struct drm_buf *i810_freelist_get(struct drm_device * dev)
52 struct drm_device_dma *dma = dev->dma;
56 /* Linear search might not be the best solution */
58 for (i = 0; i < dma->buf_count; i++) {
59 struct drm_buf *buf = dma->buflist[i];
60 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
61 /* In use is already a pointer */
62 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
64 if (used == I810_BUF_FREE)
70 /* This should only be called if the buffer is not sent to the hardware
71 * yet, the hardware updates in use for us once its on the ring buffer.
74 static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
76 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
79 /* In use is already a pointer */
80 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
81 if (used != I810_BUF_CLIENT) {
82 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
89 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
91 struct drm_file *priv = filp->private_data;
92 struct drm_device *dev;
93 drm_i810_private_t *dev_priv;
95 drm_i810_buf_priv_t *buf_priv;
98 dev = priv->minor->dev;
99 dev_priv = dev->dev_private;
100 buf = dev_priv->mmap_buffer;
101 buf_priv = buf->dev_private;
103 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
106 buf_priv->currently_mapped = I810_BUF_MAPPED;
109 if (io_remap_pfn_range(vma, vma->vm_start,
111 vma->vm_end - vma->vm_start, vma->vm_page_prot))
116 static const struct file_operations i810_buffer_fops = {
118 .release = drm_release,
119 .unlocked_ioctl = drm_ioctl,
120 .mmap = i810_mmap_buffers,
121 .fasync = drm_fasync,
122 .llseek = noop_llseek,
125 static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
127 struct drm_device *dev = file_priv->minor->dev;
128 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
129 drm_i810_private_t *dev_priv = dev->dev_private;
130 const struct file_operations *old_fops;
133 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
136 down_write(¤t->mm->mmap_sem);
137 old_fops = file_priv->filp->f_op;
138 file_priv->filp->f_op = &i810_buffer_fops;
139 dev_priv->mmap_buffer = buf;
140 buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total,
141 PROT_READ | PROT_WRITE,
142 MAP_SHARED, buf->bus_address);
143 dev_priv->mmap_buffer = NULL;
144 file_priv->filp->f_op = old_fops;
145 if (IS_ERR(buf_priv->virtual)) {
147 DRM_ERROR("mmap error\n");
148 retcode = PTR_ERR(buf_priv->virtual);
149 buf_priv->virtual = NULL;
151 up_write(¤t->mm->mmap_sem);
156 static int i810_unmap_buffer(struct drm_buf *buf)
158 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
161 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
164 down_write(¤t->mm->mmap_sem);
165 retcode = do_munmap(current->mm,
166 (unsigned long)buf_priv->virtual,
167 (size_t) buf->total);
168 up_write(¤t->mm->mmap_sem);
170 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
171 buf_priv->virtual = NULL;
176 static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
177 struct drm_file *file_priv)
180 drm_i810_buf_priv_t *buf_priv;
183 buf = i810_freelist_get(dev);
186 DRM_DEBUG("retcode=%d\n", retcode);
190 retcode = i810_map_buffer(buf, file_priv);
192 i810_freelist_put(dev, buf);
193 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
196 buf->file_priv = file_priv;
197 buf_priv = buf->dev_private;
199 d->request_idx = buf->idx;
200 d->request_size = buf->total;
201 d->virtual = buf_priv->virtual;
206 static int i810_dma_cleanup(struct drm_device *dev)
208 struct drm_device_dma *dma = dev->dma;
210 /* Make sure interrupts are disabled here because the uninstall ioctl
211 * may not have been called from userspace and after dev_private
212 * is freed, it's too late.
214 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
215 drm_irq_uninstall(dev);
217 if (dev->dev_private) {
219 drm_i810_private_t *dev_priv =
220 (drm_i810_private_t *) dev->dev_private;
222 if (dev_priv->ring.virtual_start)
223 drm_core_ioremapfree(&dev_priv->ring.map, dev);
224 if (dev_priv->hw_status_page) {
225 pci_free_consistent(dev->pdev, PAGE_SIZE,
226 dev_priv->hw_status_page,
227 dev_priv->dma_status_page);
228 /* Need to rewrite hardware status page */
229 I810_WRITE(0x02080, 0x1ffff000);
231 kfree(dev->dev_private);
232 dev->dev_private = NULL;
234 for (i = 0; i < dma->buf_count; i++) {
235 struct drm_buf *buf = dma->buflist[i];
236 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
238 if (buf_priv->kernel_virtual && buf->total)
239 drm_core_ioremapfree(&buf_priv->map, dev);
245 static int i810_wait_ring(struct drm_device *dev, int n)
247 drm_i810_private_t *dev_priv = dev->dev_private;
248 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
251 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
253 end = jiffies + (HZ * 3);
254 while (ring->space < n) {
255 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
256 ring->space = ring->head - (ring->tail + 8);
258 ring->space += ring->Size;
260 if (ring->head != last_head) {
261 end = jiffies + (HZ * 3);
262 last_head = ring->head;
266 if (time_before(end, jiffies)) {
267 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
268 DRM_ERROR("lockup\n");
278 static void i810_kernel_lost_context(struct drm_device *dev)
280 drm_i810_private_t *dev_priv = dev->dev_private;
281 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
283 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
284 ring->tail = I810_READ(LP_RING + RING_TAIL);
285 ring->space = ring->head - (ring->tail + 8);
287 ring->space += ring->Size;
290 static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
292 struct drm_device_dma *dma = dev->dma;
294 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
297 if (dma->buf_count > 1019) {
298 /* Not enough space in the status page for the freelist */
302 for (i = 0; i < dma->buf_count; i++) {
303 struct drm_buf *buf = dma->buflist[i];
304 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
306 buf_priv->in_use = hw_status++;
307 buf_priv->my_use_idx = my_idx;
310 *buf_priv->in_use = I810_BUF_FREE;
312 buf_priv->map.offset = buf->bus_address;
313 buf_priv->map.size = buf->total;
314 buf_priv->map.type = _DRM_AGP;
315 buf_priv->map.flags = 0;
316 buf_priv->map.mtrr = 0;
318 drm_core_ioremap(&buf_priv->map, dev);
319 buf_priv->kernel_virtual = buf_priv->map.handle;
325 static int i810_dma_initialize(struct drm_device *dev,
326 drm_i810_private_t *dev_priv,
327 drm_i810_init_t *init)
329 struct drm_map_list *r_list;
330 memset(dev_priv, 0, sizeof(drm_i810_private_t));
332 list_for_each_entry(r_list, &dev->maplist, head) {
334 r_list->map->type == _DRM_SHM &&
335 r_list->map->flags & _DRM_CONTAINS_LOCK) {
336 dev_priv->sarea_map = r_list->map;
340 if (!dev_priv->sarea_map) {
341 dev->dev_private = (void *)dev_priv;
342 i810_dma_cleanup(dev);
343 DRM_ERROR("can not find sarea!\n");
346 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
347 if (!dev_priv->mmio_map) {
348 dev->dev_private = (void *)dev_priv;
349 i810_dma_cleanup(dev);
350 DRM_ERROR("can not find mmio map!\n");
353 dev->agp_buffer_token = init->buffers_offset;
354 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
355 if (!dev->agp_buffer_map) {
356 dev->dev_private = (void *)dev_priv;
357 i810_dma_cleanup(dev);
358 DRM_ERROR("can not find dma buffer map!\n");
362 dev_priv->sarea_priv = (drm_i810_sarea_t *)
363 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
365 dev_priv->ring.Start = init->ring_start;
366 dev_priv->ring.End = init->ring_end;
367 dev_priv->ring.Size = init->ring_size;
369 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
370 dev_priv->ring.map.size = init->ring_size;
371 dev_priv->ring.map.type = _DRM_AGP;
372 dev_priv->ring.map.flags = 0;
373 dev_priv->ring.map.mtrr = 0;
375 drm_core_ioremap(&dev_priv->ring.map, dev);
377 if (dev_priv->ring.map.handle == NULL) {
378 dev->dev_private = (void *)dev_priv;
379 i810_dma_cleanup(dev);
380 DRM_ERROR("can not ioremap virtual address for"
385 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
387 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
389 dev_priv->w = init->w;
390 dev_priv->h = init->h;
391 dev_priv->pitch = init->pitch;
392 dev_priv->back_offset = init->back_offset;
393 dev_priv->depth_offset = init->depth_offset;
394 dev_priv->front_offset = init->front_offset;
396 dev_priv->overlay_offset = init->overlay_offset;
397 dev_priv->overlay_physical = init->overlay_physical;
399 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
400 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
401 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
403 /* Program Hardware Status Page */
404 dev_priv->hw_status_page =
405 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
406 &dev_priv->dma_status_page);
407 if (!dev_priv->hw_status_page) {
408 dev->dev_private = (void *)dev_priv;
409 i810_dma_cleanup(dev);
410 DRM_ERROR("Can not allocate hardware status page\n");
413 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
414 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
416 I810_WRITE(0x02080, dev_priv->dma_status_page);
417 DRM_DEBUG("Enabled hardware status page\n");
419 /* Now we need to init our freelist */
420 if (i810_freelist_init(dev, dev_priv) != 0) {
421 dev->dev_private = (void *)dev_priv;
422 i810_dma_cleanup(dev);
423 DRM_ERROR("Not enough space in the status page for"
427 dev->dev_private = (void *)dev_priv;
432 static int i810_dma_init(struct drm_device *dev, void *data,
433 struct drm_file *file_priv)
435 drm_i810_private_t *dev_priv;
436 drm_i810_init_t *init = data;
439 switch (init->func) {
440 case I810_INIT_DMA_1_4:
441 DRM_INFO("Using v1.4 init.\n");
442 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
443 if (dev_priv == NULL)
445 retcode = i810_dma_initialize(dev, dev_priv, init);
448 case I810_CLEANUP_DMA:
449 DRM_INFO("DMA Cleanup\n");
450 retcode = i810_dma_cleanup(dev);
459 /* Most efficient way to verify state for the i810 is as it is
460 * emitted. Non-conformant state is silently dropped.
462 * Use 'volatile' & local var tmp to force the emitted values to be
463 * identical to the verified ones.
465 static void i810EmitContextVerified(struct drm_device *dev,
466 volatile unsigned int *code)
468 drm_i810_private_t *dev_priv = dev->dev_private;
473 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
475 OUT_RING(GFX_OP_COLOR_FACTOR);
476 OUT_RING(code[I810_CTXREG_CF1]);
478 OUT_RING(GFX_OP_STIPPLE);
479 OUT_RING(code[I810_CTXREG_ST1]);
481 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
484 if ((tmp & (7 << 29)) == (3 << 29) &&
485 (tmp & (0x1f << 24)) < (0x1d << 24)) {
489 printk("constext state dropped!!!\n");
498 static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
500 drm_i810_private_t *dev_priv = dev->dev_private;
505 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
507 OUT_RING(GFX_OP_MAP_INFO);
508 OUT_RING(code[I810_TEXREG_MI1]);
509 OUT_RING(code[I810_TEXREG_MI2]);
510 OUT_RING(code[I810_TEXREG_MI3]);
512 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
515 if ((tmp & (7 << 29)) == (3 << 29) &&
516 (tmp & (0x1f << 24)) < (0x1d << 24)) {
520 printk("texture state dropped!!!\n");
529 /* Need to do some additional checking when setting the dest buffer.
531 static void i810EmitDestVerified(struct drm_device *dev,
532 volatile unsigned int *code)
534 drm_i810_private_t *dev_priv = dev->dev_private;
538 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
540 tmp = code[I810_DESTREG_DI1];
541 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
542 OUT_RING(CMD_OP_DESTBUFFER_INFO);
545 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
546 tmp, dev_priv->front_di1, dev_priv->back_di1);
550 OUT_RING(CMD_OP_Z_BUFFER_INFO);
551 OUT_RING(dev_priv->zi1);
553 OUT_RING(GFX_OP_DESTBUFFER_VARS);
554 OUT_RING(code[I810_DESTREG_DV1]);
556 OUT_RING(GFX_OP_DRAWRECT_INFO);
557 OUT_RING(code[I810_DESTREG_DR1]);
558 OUT_RING(code[I810_DESTREG_DR2]);
559 OUT_RING(code[I810_DESTREG_DR3]);
560 OUT_RING(code[I810_DESTREG_DR4]);
566 static void i810EmitState(struct drm_device *dev)
568 drm_i810_private_t *dev_priv = dev->dev_private;
569 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
570 unsigned int dirty = sarea_priv->dirty;
572 DRM_DEBUG("%x\n", dirty);
574 if (dirty & I810_UPLOAD_BUFFERS) {
575 i810EmitDestVerified(dev, sarea_priv->BufferState);
576 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
579 if (dirty & I810_UPLOAD_CTX) {
580 i810EmitContextVerified(dev, sarea_priv->ContextState);
581 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
584 if (dirty & I810_UPLOAD_TEX0) {
585 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
586 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
589 if (dirty & I810_UPLOAD_TEX1) {
590 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
591 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
597 static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
598 unsigned int clear_color,
599 unsigned int clear_zval)
601 drm_i810_private_t *dev_priv = dev->dev_private;
602 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
603 int nbox = sarea_priv->nbox;
604 struct drm_clip_rect *pbox = sarea_priv->boxes;
605 int pitch = dev_priv->pitch;
610 if (dev_priv->current_page == 1) {
611 unsigned int tmp = flags;
613 flags &= ~(I810_FRONT | I810_BACK);
614 if (tmp & I810_FRONT)
620 i810_kernel_lost_context(dev);
622 if (nbox > I810_NR_SAREA_CLIPRECTS)
623 nbox = I810_NR_SAREA_CLIPRECTS;
625 for (i = 0; i < nbox; i++, pbox++) {
626 unsigned int x = pbox->x1;
627 unsigned int y = pbox->y1;
628 unsigned int width = (pbox->x2 - x) * cpp;
629 unsigned int height = pbox->y2 - y;
630 unsigned int start = y * pitch + x * cpp;
632 if (pbox->x1 > pbox->x2 ||
633 pbox->y1 > pbox->y2 ||
634 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
637 if (flags & I810_FRONT) {
639 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
640 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
641 OUT_RING((height << 16) | width);
643 OUT_RING(clear_color);
648 if (flags & I810_BACK) {
650 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
651 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
652 OUT_RING((height << 16) | width);
653 OUT_RING(dev_priv->back_offset + start);
654 OUT_RING(clear_color);
659 if (flags & I810_DEPTH) {
661 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
662 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
663 OUT_RING((height << 16) | width);
664 OUT_RING(dev_priv->depth_offset + start);
665 OUT_RING(clear_zval);
672 static void i810_dma_dispatch_swap(struct drm_device *dev)
674 drm_i810_private_t *dev_priv = dev->dev_private;
675 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
676 int nbox = sarea_priv->nbox;
677 struct drm_clip_rect *pbox = sarea_priv->boxes;
678 int pitch = dev_priv->pitch;
683 DRM_DEBUG("swapbuffers\n");
685 i810_kernel_lost_context(dev);
687 if (nbox > I810_NR_SAREA_CLIPRECTS)
688 nbox = I810_NR_SAREA_CLIPRECTS;
690 for (i = 0; i < nbox; i++, pbox++) {
691 unsigned int w = pbox->x2 - pbox->x1;
692 unsigned int h = pbox->y2 - pbox->y1;
693 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
694 unsigned int start = dst;
696 if (pbox->x1 > pbox->x2 ||
697 pbox->y1 > pbox->y2 ||
698 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
702 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
703 OUT_RING(pitch | (0xCC << 16));
704 OUT_RING((h << 16) | (w * cpp));
705 if (dev_priv->current_page == 0)
706 OUT_RING(dev_priv->front_offset + start);
708 OUT_RING(dev_priv->back_offset + start);
710 if (dev_priv->current_page == 0)
711 OUT_RING(dev_priv->back_offset + start);
713 OUT_RING(dev_priv->front_offset + start);
718 static void i810_dma_dispatch_vertex(struct drm_device *dev,
719 struct drm_buf *buf, int discard, int used)
721 drm_i810_private_t *dev_priv = dev->dev_private;
722 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
723 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
724 struct drm_clip_rect *box = sarea_priv->boxes;
725 int nbox = sarea_priv->nbox;
726 unsigned long address = (unsigned long)buf->bus_address;
727 unsigned long start = address - dev->agp->base;
731 i810_kernel_lost_context(dev);
733 if (nbox > I810_NR_SAREA_CLIPRECTS)
734 nbox = I810_NR_SAREA_CLIPRECTS;
739 if (sarea_priv->dirty)
742 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
743 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
745 *(u32 *) buf_priv->kernel_virtual =
746 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
749 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
753 i810_unmap_buffer(buf);
760 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
762 OUT_RING(GFX_OP_SCISSOR_INFO);
763 OUT_RING(box[i].x1 | (box[i].y1 << 16));
764 OUT_RING((box[i].x2 -
765 1) | ((box[i].y2 - 1) << 16));
770 OUT_RING(CMD_OP_BATCH_BUFFER);
771 OUT_RING(start | BB1_PROTECTED);
772 OUT_RING(start + used - 4);
776 } while (++i < nbox);
782 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
786 OUT_RING(CMD_STORE_DWORD_IDX);
788 OUT_RING(dev_priv->counter);
789 OUT_RING(CMD_STORE_DWORD_IDX);
790 OUT_RING(buf_priv->my_use_idx);
791 OUT_RING(I810_BUF_FREE);
792 OUT_RING(CMD_REPORT_HEAD);
798 static void i810_dma_dispatch_flip(struct drm_device *dev)
800 drm_i810_private_t *dev_priv = dev->dev_private;
801 int pitch = dev_priv->pitch;
804 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
805 dev_priv->current_page,
806 dev_priv->sarea_priv->pf_current_page);
808 i810_kernel_lost_context(dev);
811 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
815 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
816 /* On i815 at least ASYNC is buggy */
817 /* pitch<<5 is from 11.2.8 p158,
818 its the pitch / 8 then left shifted 8,
819 so (pitch >> 3) << 8 */
820 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
821 if (dev_priv->current_page == 0) {
822 OUT_RING(dev_priv->back_offset);
823 dev_priv->current_page = 1;
825 OUT_RING(dev_priv->front_offset);
826 dev_priv->current_page = 0;
832 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
836 /* Increment the frame counter. The client-side 3D driver must
837 * throttle the framerate by waiting for this value before
838 * performing the swapbuffer ioctl.
840 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
844 static void i810_dma_quiescent(struct drm_device *dev)
846 drm_i810_private_t *dev_priv = dev->dev_private;
849 i810_kernel_lost_context(dev);
852 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
853 OUT_RING(CMD_REPORT_HEAD);
858 i810_wait_ring(dev, dev_priv->ring.Size - 8);
861 static int i810_flush_queue(struct drm_device *dev)
863 drm_i810_private_t *dev_priv = dev->dev_private;
864 struct drm_device_dma *dma = dev->dma;
868 i810_kernel_lost_context(dev);
871 OUT_RING(CMD_REPORT_HEAD);
875 i810_wait_ring(dev, dev_priv->ring.Size - 8);
877 for (i = 0; i < dma->buf_count; i++) {
878 struct drm_buf *buf = dma->buflist[i];
879 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
881 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
884 if (used == I810_BUF_HARDWARE)
885 DRM_DEBUG("reclaimed from HARDWARE\n");
886 if (used == I810_BUF_CLIENT)
887 DRM_DEBUG("still on client\n");
893 /* Must be called with the lock held */
894 static void i810_reclaim_buffers(struct drm_device *dev,
895 struct drm_file *file_priv)
897 struct drm_device_dma *dma = dev->dma;
902 if (!dev->dev_private)
907 i810_flush_queue(dev);
909 for (i = 0; i < dma->buf_count; i++) {
910 struct drm_buf *buf = dma->buflist[i];
911 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
913 if (buf->file_priv == file_priv && buf_priv) {
914 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
917 if (used == I810_BUF_CLIENT)
918 DRM_DEBUG("reclaimed from client\n");
919 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
920 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
925 static int i810_flush_ioctl(struct drm_device *dev, void *data,
926 struct drm_file *file_priv)
928 LOCK_TEST_WITH_RETURN(dev, file_priv);
930 i810_flush_queue(dev);
934 static int i810_dma_vertex(struct drm_device *dev, void *data,
935 struct drm_file *file_priv)
937 struct drm_device_dma *dma = dev->dma;
938 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
939 u32 *hw_status = dev_priv->hw_status_page;
940 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
941 dev_priv->sarea_priv;
942 drm_i810_vertex_t *vertex = data;
944 LOCK_TEST_WITH_RETURN(dev, file_priv);
946 DRM_DEBUG("idx %d used %d discard %d\n",
947 vertex->idx, vertex->used, vertex->discard);
949 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
952 i810_dma_dispatch_vertex(dev,
953 dma->buflist[vertex->idx],
954 vertex->discard, vertex->used);
956 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
957 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
958 sarea_priv->last_enqueue = dev_priv->counter - 1;
959 sarea_priv->last_dispatch = (int)hw_status[5];
964 static int i810_clear_bufs(struct drm_device *dev, void *data,
965 struct drm_file *file_priv)
967 drm_i810_clear_t *clear = data;
969 LOCK_TEST_WITH_RETURN(dev, file_priv);
971 /* GH: Someone's doing nasty things... */
972 if (!dev->dev_private)
975 i810_dma_dispatch_clear(dev, clear->flags,
976 clear->clear_color, clear->clear_depth);
980 static int i810_swap_bufs(struct drm_device *dev, void *data,
981 struct drm_file *file_priv)
985 LOCK_TEST_WITH_RETURN(dev, file_priv);
987 i810_dma_dispatch_swap(dev);
991 static int i810_getage(struct drm_device *dev, void *data,
992 struct drm_file *file_priv)
994 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
995 u32 *hw_status = dev_priv->hw_status_page;
996 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
997 dev_priv->sarea_priv;
999 sarea_priv->last_dispatch = (int)hw_status[5];
1003 static int i810_getbuf(struct drm_device *dev, void *data,
1004 struct drm_file *file_priv)
1007 drm_i810_dma_t *d = data;
1008 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1009 u32 *hw_status = dev_priv->hw_status_page;
1010 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1011 dev_priv->sarea_priv;
1013 LOCK_TEST_WITH_RETURN(dev, file_priv);
1017 retcode = i810_dma_get_buffer(dev, d, file_priv);
1019 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1020 task_pid_nr(current), retcode, d->granted);
1022 sarea_priv->last_dispatch = (int)hw_status[5];
1027 static int i810_copybuf(struct drm_device *dev, void *data,
1028 struct drm_file *file_priv)
1030 /* Never copy - 2.4.x doesn't need it */
1034 static int i810_docopy(struct drm_device *dev, void *data,
1035 struct drm_file *file_priv)
1037 /* Never copy - 2.4.x doesn't need it */
1041 static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
1042 unsigned int last_render)
1044 drm_i810_private_t *dev_priv = dev->dev_private;
1045 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1046 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1047 unsigned long address = (unsigned long)buf->bus_address;
1048 unsigned long start = address - dev->agp->base;
1052 i810_kernel_lost_context(dev);
1054 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1055 if (u != I810_BUF_CLIENT)
1056 DRM_DEBUG("MC found buffer that isn't mine!\n");
1058 if (used > 4 * 1024)
1061 sarea_priv->dirty = 0x7f;
1063 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1065 dev_priv->counter++;
1066 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1067 DRM_DEBUG("start : %lx\n", start);
1068 DRM_DEBUG("used : %d\n", used);
1069 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1071 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1073 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1077 i810_unmap_buffer(buf);
1080 OUT_RING(CMD_OP_BATCH_BUFFER);
1081 OUT_RING(start | BB1_PROTECTED);
1082 OUT_RING(start + used - 4);
1087 OUT_RING(CMD_STORE_DWORD_IDX);
1088 OUT_RING(buf_priv->my_use_idx);
1089 OUT_RING(I810_BUF_FREE);
1092 OUT_RING(CMD_STORE_DWORD_IDX);
1094 OUT_RING(last_render);
1099 static int i810_dma_mc(struct drm_device *dev, void *data,
1100 struct drm_file *file_priv)
1102 struct drm_device_dma *dma = dev->dma;
1103 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1104 u32 *hw_status = dev_priv->hw_status_page;
1105 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1106 dev_priv->sarea_priv;
1107 drm_i810_mc_t *mc = data;
1109 LOCK_TEST_WITH_RETURN(dev, file_priv);
1111 if (mc->idx >= dma->buf_count || mc->idx < 0)
1114 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1117 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1118 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1119 sarea_priv->last_enqueue = dev_priv->counter - 1;
1120 sarea_priv->last_dispatch = (int)hw_status[5];
1125 static int i810_rstatus(struct drm_device *dev, void *data,
1126 struct drm_file *file_priv)
1128 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1130 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1133 static int i810_ov0_info(struct drm_device *dev, void *data,
1134 struct drm_file *file_priv)
1136 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1137 drm_i810_overlay_t *ov = data;
1139 ov->offset = dev_priv->overlay_offset;
1140 ov->physical = dev_priv->overlay_physical;
1145 static int i810_fstatus(struct drm_device *dev, void *data,
1146 struct drm_file *file_priv)
1148 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1150 LOCK_TEST_WITH_RETURN(dev, file_priv);
1151 return I810_READ(0x30008);
1154 static int i810_ov0_flip(struct drm_device *dev, void *data,
1155 struct drm_file *file_priv)
1157 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1159 LOCK_TEST_WITH_RETURN(dev, file_priv);
1161 /* Tell the overlay to update */
1162 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1167 /* Not sure why this isn't set all the time:
1169 static void i810_do_init_pageflip(struct drm_device *dev)
1171 drm_i810_private_t *dev_priv = dev->dev_private;
1174 dev_priv->page_flipping = 1;
1175 dev_priv->current_page = 0;
1176 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1179 static int i810_do_cleanup_pageflip(struct drm_device *dev)
1181 drm_i810_private_t *dev_priv = dev->dev_private;
1184 if (dev_priv->current_page != 0)
1185 i810_dma_dispatch_flip(dev);
1187 dev_priv->page_flipping = 0;
1191 static int i810_flip_bufs(struct drm_device *dev, void *data,
1192 struct drm_file *file_priv)
1194 drm_i810_private_t *dev_priv = dev->dev_private;
1198 LOCK_TEST_WITH_RETURN(dev, file_priv);
1200 if (!dev_priv->page_flipping)
1201 i810_do_init_pageflip(dev);
1203 i810_dma_dispatch_flip(dev);
1207 int i810_driver_load(struct drm_device *dev, unsigned long flags)
1209 /* i810 has 4 more counters */
1211 dev->types[6] = _DRM_STAT_IRQ;
1212 dev->types[7] = _DRM_STAT_PRIMARY;
1213 dev->types[8] = _DRM_STAT_SECONDARY;
1214 dev->types[9] = _DRM_STAT_DMA;
1219 void i810_driver_lastclose(struct drm_device *dev)
1221 i810_dma_cleanup(dev);
1224 void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1226 if (dev->dev_private) {
1227 drm_i810_private_t *dev_priv = dev->dev_private;
1228 if (dev_priv->page_flipping)
1229 i810_do_cleanup_pageflip(dev);
1233 void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
1234 struct drm_file *file_priv)
1236 i810_reclaim_buffers(dev, file_priv);
1239 int i810_driver_dma_quiescent(struct drm_device *dev)
1241 i810_dma_quiescent(dev);
1246 * call the drm_ioctl under the big kernel lock because
1247 * to lock against the i810_mmap_buffers function.
1249 long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1253 ret = drm_ioctl(file, cmd, arg);
1258 struct drm_ioctl_desc i810_ioctls[] = {
1259 DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1260 DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1261 DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1262 DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1263 DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED),
1264 DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED),
1265 DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1266 DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED),
1267 DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED),
1268 DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED),
1269 DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED),
1270 DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED),
1271 DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1272 DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED),
1273 DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1276 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1279 * Determine if the device really is AGP or not.
1281 * All Intel graphics chipsets are treated as AGP, even if they are really
1284 * \param dev The device to be tested.
1287 * A value of 1 is always retured to indictate every i810 is AGP.
1289 int i810_driver_device_is_agp(struct drm_device *dev)