1 /* Hisilicon Hibmc SoC drm driver
3 * Based on the bochs drm driver.
5 * Copyright (c) 2016 Huawei Limited.
8 * Rongrong Zou <zourongrong@huawei.com>
9 * Rongrong Zou <zourongrong@gmail.com>
10 * Jianhua Li <lijianhua@huawei.com>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
19 #include <linux/console.h>
20 #include <linux/module.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
25 #include "hibmc_drm_drv.h"
26 #include "hibmc_drm_regs.h"
28 static const struct file_operations hibmc_fops = {
31 .release = drm_release,
32 .unlocked_ioctl = drm_ioctl,
33 .compat_ioctl = drm_compat_ioctl,
40 static int hibmc_enable_vblank(struct drm_device *dev, unsigned int pipe)
45 static void hibmc_disable_vblank(struct drm_device *dev, unsigned int pipe)
49 static struct drm_driver hibmc_driver = {
50 .driver_features = DRIVER_GEM | DRIVER_MODESET |
55 .desc = "hibmc drm driver",
58 .get_vblank_counter = drm_vblank_no_hw_counter,
59 .enable_vblank = hibmc_enable_vblank,
60 .disable_vblank = hibmc_disable_vblank,
61 .gem_free_object_unlocked = hibmc_gem_free_object,
62 .dumb_create = hibmc_dumb_create,
63 .dumb_map_offset = hibmc_dumb_mmap_offset,
64 .dumb_destroy = drm_gem_dumb_destroy,
67 static int hibmc_pm_suspend(struct device *dev)
69 struct pci_dev *pdev = to_pci_dev(dev);
70 struct drm_device *drm_dev = pci_get_drvdata(pdev);
71 struct hibmc_drm_private *priv = drm_dev->dev_private;
73 drm_kms_helper_poll_disable(drm_dev);
74 priv->suspend_state = drm_atomic_helper_suspend(drm_dev);
75 if (IS_ERR(priv->suspend_state)) {
76 DRM_ERROR("drm_atomic_helper_suspend failed: %ld\n",
77 PTR_ERR(priv->suspend_state));
78 drm_kms_helper_poll_enable(drm_dev);
79 return PTR_ERR(priv->suspend_state);
85 static int hibmc_pm_resume(struct device *dev)
87 struct pci_dev *pdev = to_pci_dev(dev);
88 struct drm_device *drm_dev = pci_get_drvdata(pdev);
89 struct hibmc_drm_private *priv = drm_dev->dev_private;
91 drm_atomic_helper_resume(drm_dev, priv->suspend_state);
92 drm_kms_helper_poll_enable(drm_dev);
97 static const struct dev_pm_ops hibmc_pm_ops = {
98 SET_SYSTEM_SLEEP_PM_OPS(hibmc_pm_suspend,
102 static int hibmc_kms_init(struct hibmc_drm_private *priv)
106 drm_mode_config_init(priv->dev);
107 priv->mode_config_initialized = true;
109 priv->dev->mode_config.min_width = 0;
110 priv->dev->mode_config.min_height = 0;
111 priv->dev->mode_config.max_width = 1920;
112 priv->dev->mode_config.max_height = 1440;
114 priv->dev->mode_config.fb_base = priv->fb_base;
115 priv->dev->mode_config.preferred_depth = 24;
116 priv->dev->mode_config.prefer_shadow = 0;
118 priv->dev->mode_config.funcs = (void *)&hibmc_mode_funcs;
120 ret = hibmc_de_init(priv);
122 DRM_ERROR("failed to init de: %d\n", ret);
129 static void hibmc_kms_fini(struct hibmc_drm_private *priv)
131 if (priv->mode_config_initialized) {
132 drm_mode_config_cleanup(priv->dev);
133 priv->mode_config_initialized = false;
138 * It can operate in one of three modes: 0, 1 or Sleep.
140 void hibmc_set_power_mode(struct hibmc_drm_private *priv,
141 unsigned int power_mode)
143 unsigned int control_value = 0;
144 void __iomem *mmio = priv->mmio;
145 unsigned int input = 1;
147 if (power_mode > HIBMC_PW_MODE_CTL_MODE_SLEEP)
150 if (power_mode == HIBMC_PW_MODE_CTL_MODE_SLEEP)
153 control_value = readl(mmio + HIBMC_POWER_MODE_CTRL);
154 control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK |
155 HIBMC_PW_MODE_CTL_OSC_INPUT_MASK);
156 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode);
157 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input);
158 writel(control_value, mmio + HIBMC_POWER_MODE_CTRL);
161 void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate)
163 unsigned int gate_reg;
165 void __iomem *mmio = priv->mmio;
167 /* Get current power mode. */
168 mode = (readl(mmio + HIBMC_POWER_MODE_CTRL) &
169 HIBMC_PW_MODE_CTL_MODE_MASK) >> HIBMC_PW_MODE_CTL_MODE_SHIFT;
172 case HIBMC_PW_MODE_CTL_MODE_MODE0:
173 gate_reg = HIBMC_MODE0_GATE;
176 case HIBMC_PW_MODE_CTL_MODE_MODE1:
177 gate_reg = HIBMC_MODE1_GATE;
181 gate_reg = HIBMC_MODE0_GATE;
184 writel(gate, mmio + gate_reg);
187 static void hibmc_hw_config(struct hibmc_drm_private *priv)
191 /* On hardware reset, power mode 0 is default. */
192 hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0);
194 /* Enable display power gate & LOCALMEM power gate*/
195 reg = readl(priv->mmio + HIBMC_CURRENT_GATE);
196 reg &= ~HIBMC_CURR_GATE_DISPLAY_MASK;
197 reg &= ~HIBMC_CURR_GATE_LOCALMEM_MASK;
198 reg |= HIBMC_CURR_GATE_DISPLAY(1);
199 reg |= HIBMC_CURR_GATE_LOCALMEM(1);
201 hibmc_set_current_gate(priv, reg);
204 * Reset the memory controller. If the memory controller
205 * is not reset in chip,the system might hang when sw accesses
206 * the memory.The memory should be resetted after
207 * changing the MXCLK.
209 reg = readl(priv->mmio + HIBMC_MISC_CTRL);
210 reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
211 reg |= HIBMC_MSCCTL_LOCALMEM_RESET(0);
212 writel(reg, priv->mmio + HIBMC_MISC_CTRL);
214 reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
215 reg |= HIBMC_MSCCTL_LOCALMEM_RESET(1);
217 writel(reg, priv->mmio + HIBMC_MISC_CTRL);
220 static int hibmc_hw_map(struct hibmc_drm_private *priv)
222 struct drm_device *dev = priv->dev;
223 struct pci_dev *pdev = dev->pdev;
224 resource_size_t addr, size, ioaddr, iosize;
226 ioaddr = pci_resource_start(pdev, 1);
227 iosize = pci_resource_len(pdev, 1);
228 priv->mmio = devm_ioremap_nocache(dev->dev, ioaddr, iosize);
230 DRM_ERROR("Cannot map mmio region\n");
234 addr = pci_resource_start(pdev, 0);
235 size = pci_resource_len(pdev, 0);
236 priv->fb_map = devm_ioremap(dev->dev, addr, size);
238 DRM_ERROR("Cannot map framebuffer\n");
241 priv->fb_base = addr;
242 priv->fb_size = size;
247 static int hibmc_hw_init(struct hibmc_drm_private *priv)
251 ret = hibmc_hw_map(priv);
255 hibmc_hw_config(priv);
260 static int hibmc_unload(struct drm_device *dev)
262 struct hibmc_drm_private *priv = dev->dev_private;
264 hibmc_fbdev_fini(priv);
265 hibmc_kms_fini(priv);
267 dev->dev_private = NULL;
271 static int hibmc_load(struct drm_device *dev)
273 struct hibmc_drm_private *priv;
276 priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
278 DRM_ERROR("no memory to allocate for hibmc_drm_private\n");
281 dev->dev_private = priv;
284 ret = hibmc_hw_init(priv);
288 ret = hibmc_mm_init(priv);
292 ret = hibmc_kms_init(priv);
296 /* reset all the states of crtc/plane/encoder/connector */
297 drm_mode_config_reset(dev);
299 ret = hibmc_fbdev_init(priv);
301 DRM_ERROR("failed to initialize fbdev: %d\n", ret);
309 DRM_ERROR("failed to initialize drm driver: %d\n", ret);
313 static int hibmc_pci_probe(struct pci_dev *pdev,
314 const struct pci_device_id *ent)
316 struct drm_device *dev;
319 dev = drm_dev_alloc(&hibmc_driver, &pdev->dev);
321 DRM_ERROR("failed to allocate drm_device\n");
326 pci_set_drvdata(pdev, dev);
328 ret = pci_enable_device(pdev);
330 DRM_ERROR("failed to enable pci device: %d\n", ret);
334 ret = hibmc_load(dev);
336 DRM_ERROR("failed to load hibmc: %d\n", ret);
340 ret = drm_dev_register(dev, 0);
342 DRM_ERROR("failed to register drv for userspace access: %d\n",
351 pci_disable_device(pdev);
358 static void hibmc_pci_remove(struct pci_dev *pdev)
360 struct drm_device *dev = pci_get_drvdata(pdev);
362 drm_dev_unregister(dev);
367 static struct pci_device_id hibmc_pci_table[] = {
368 {0x19e5, 0x1711, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
372 static struct pci_driver hibmc_pci_driver = {
374 .id_table = hibmc_pci_table,
375 .probe = hibmc_pci_probe,
376 .remove = hibmc_pci_remove,
377 .driver.pm = &hibmc_pm_ops,
380 static int __init hibmc_init(void)
382 return pci_register_driver(&hibmc_pci_driver);
385 static void __exit hibmc_exit(void)
387 return pci_unregister_driver(&hibmc_pci_driver);
390 module_init(hibmc_init);
391 module_exit(hibmc_exit);
393 MODULE_DEVICE_TABLE(pci, hibmc_pci_table);
394 MODULE_AUTHOR("RongrongZou <zourongrong@huawei.com>");
395 MODULE_DESCRIPTION("DRM Driver for Hisilicon Hibmc");
396 MODULE_LICENSE("GPL v2");