1 // SPDX-License-Identifier: GPL-2.0-only
2 /**************************************************************************
3 * Copyright (c) 2007-2011, Intel Corporation.
5 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
8 **************************************************************************/
10 #include <linux/cpu.h>
11 #include <linux/module.h>
12 #include <linux/notifier.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/spinlock.h>
15 #include <linux/delay.h>
17 #include <asm/set_memory.h>
19 #include <acpi/video.h>
22 #include <drm/drm_aperture.h>
23 #include <drm/drm_drv.h>
24 #include <drm/drm_fb_helper.h>
25 #include <drm/drm_file.h>
26 #include <drm/drm_ioctl.h>
27 #include <drm/drm_pciids.h>
28 #include <drm/drm_vblank.h>
30 #include "framebuffer.h"
31 #include "intel_bios.h"
35 #include "psb_intel_reg.h"
39 static const struct drm_driver driver;
40 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
43 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
44 * to the different groups of PowerVR 5-series chip designs
46 * 0x8086 = Intel Corporation
48 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx
49 * PowerVR SGX535 - Moorestown - Intel GMA 600
50 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx
51 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
52 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
55 static const struct pci_device_id pciidlist[] = {
57 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
58 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
60 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
61 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
62 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
63 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
64 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
65 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
66 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
67 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
68 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
70 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
71 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
72 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
73 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
74 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
75 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
76 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
77 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
78 { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
79 { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
80 { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
81 { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
82 { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
83 { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
84 { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
85 { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
88 MODULE_DEVICE_TABLE(pci, pciidlist);
93 static const struct drm_ioctl_desc psb_ioctls[] = {
97 * psb_spank - reset the 2D engine
98 * @dev_priv: our PSB DRM device
100 * Soft reset the graphics engine and then reload the necessary registers.
102 void psb_spank(struct drm_psb_private *dev_priv)
104 PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
105 _PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
106 _PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
107 _PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
108 PSB_RSGX32(PSB_CR_SOFT_RESET);
112 PSB_WSGX32(0, PSB_CR_SOFT_RESET);
114 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
117 (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
120 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
122 (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
123 PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
126 static int psb_do_init(struct drm_device *dev)
128 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
129 struct psb_gtt *pg = &dev_priv->gtt;
133 if (pg->mmu_gatt_start & 0x0FFFFFFF) {
134 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
138 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
139 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
140 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
142 dev_priv->gatt_free_offset = pg->mmu_gatt_start +
143 (stolen_gtt << PAGE_SHIFT) * 1024;
145 spin_lock_init(&dev_priv->irqmask_lock);
147 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
148 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
149 PSB_RSGX32(PSB_CR_BIF_BANK1);
151 /* Do not bypass any MMU access, let them pagefault instead */
152 PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
154 PSB_RSGX32(PSB_CR_BIF_CTRL);
159 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
160 PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
165 static void psb_driver_unload(struct drm_device *dev)
167 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
169 /* TODO: Kill vblank etc here */
171 if (dev_priv->backlight_device)
172 gma_backlight_exit(dev);
173 psb_modeset_cleanup(dev);
175 if (dev_priv->ops->chip_teardown)
176 dev_priv->ops->chip_teardown(dev);
178 psb_intel_opregion_fini(dev);
180 if (dev_priv->pf_pd) {
181 psb_mmu_free_pagedir(dev_priv->pf_pd);
182 dev_priv->pf_pd = NULL;
185 struct psb_gtt *pg = &dev_priv->gtt;
187 psb_mmu_remove_pfn_sequence(
188 psb_mmu_get_default_pd
191 dev_priv->vram_stolen_size >> PAGE_SHIFT);
192 psb_mmu_driver_takedown(dev_priv->mmu);
193 dev_priv->mmu = NULL;
195 psb_gtt_takedown(dev);
196 if (dev_priv->scratch_page) {
197 set_pages_wb(dev_priv->scratch_page, 1);
198 __free_page(dev_priv->scratch_page);
199 dev_priv->scratch_page = NULL;
201 if (dev_priv->vdc_reg) {
202 iounmap(dev_priv->vdc_reg);
203 dev_priv->vdc_reg = NULL;
205 if (dev_priv->sgx_reg) {
206 iounmap(dev_priv->sgx_reg);
207 dev_priv->sgx_reg = NULL;
209 if (dev_priv->aux_reg) {
210 iounmap(dev_priv->aux_reg);
211 dev_priv->aux_reg = NULL;
213 pci_dev_put(dev_priv->aux_pdev);
214 pci_dev_put(dev_priv->lpc_pdev);
216 /* Destroy VBT data */
217 psb_intel_destroy_bios(dev);
219 gma_power_uninit(dev);
222 static void psb_device_release(void *data)
224 struct drm_device *dev = data;
226 psb_driver_unload(dev);
229 static int psb_driver_load(struct drm_device *dev, unsigned long flags)
231 struct pci_dev *pdev = to_pci_dev(dev->dev);
232 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
233 unsigned long resource_start, resource_len;
234 unsigned long irqflags;
236 struct drm_connector *connector;
237 struct gma_encoder *gma_encoder;
240 /* initializing driver private data */
242 dev_priv->ops = (struct psb_ops *)flags;
246 pci_set_master(pdev);
248 dev_priv->num_pipe = dev_priv->ops->pipes;
250 resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE);
253 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
254 if (!dev_priv->vdc_reg)
257 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
259 if (!dev_priv->sgx_reg)
263 int domain = pci_domain_nr(pdev->bus);
266 pci_get_domain_bus_and_slot(domain, 0,
269 if (dev_priv->aux_pdev) {
270 resource_start = pci_resource_start(dev_priv->aux_pdev,
272 resource_len = pci_resource_len(dev_priv->aux_pdev,
274 dev_priv->aux_reg = ioremap(resource_start,
276 if (!dev_priv->aux_reg)
279 DRM_DEBUG_KMS("Found aux vdc");
281 /* Couldn't find the aux vdc so map to primary vdc */
282 dev_priv->aux_reg = dev_priv->vdc_reg;
283 DRM_DEBUG_KMS("Couldn't find aux pci device");
285 dev_priv->gmbus_reg = dev_priv->aux_reg;
288 pci_get_domain_bus_and_slot(domain, 0,
290 if (dev_priv->lpc_pdev) {
291 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
292 &dev_priv->lpc_gpio_base);
293 pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
294 (u32)dev_priv->lpc_gpio_base | (1L<<31));
295 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
296 &dev_priv->lpc_gpio_base);
297 dev_priv->lpc_gpio_base &= 0xffc0;
298 if (dev_priv->lpc_gpio_base)
299 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
300 dev_priv->lpc_gpio_base);
302 pci_dev_put(dev_priv->lpc_pdev);
303 dev_priv->lpc_pdev = NULL;
307 dev_priv->gmbus_reg = dev_priv->vdc_reg;
310 psb_intel_opregion_setup(dev);
312 ret = dev_priv->ops->chip_setup(dev);
316 /* Init OSPM support */
321 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
322 if (!dev_priv->scratch_page)
325 set_pages_uc(dev_priv->scratch_page, 1);
327 ret = psb_gtt_init(dev, 0);
333 dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL);
337 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
338 if (!dev_priv->pf_pd)
341 ret = psb_do_init(dev);
345 /* Add stolen memory to SGX MMU */
346 ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
347 dev_priv->stolen_base >> PAGE_SHIFT,
349 pg->stolen_size >> PAGE_SHIFT, 0);
351 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
352 psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
354 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
355 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
357 acpi_video_register();
359 /* Setup vertical blanking handling */
360 ret = drm_vblank_init(dev, dev_priv->num_pipe);
365 * Install interrupt handlers prior to powering off SGX or else we will
368 dev_priv->vdc_irq_mask = 0;
369 dev_priv->pipestat[0] = 0;
370 dev_priv->pipestat[1] = 0;
371 dev_priv->pipestat[2] = 0;
372 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
373 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
374 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
375 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
376 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
378 psb_irq_install(dev, pdev->irq);
380 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
382 psb_modeset_init(dev);
384 drm_kms_helper_poll_init(dev);
386 /* Only add backlight support if we have LVDS output */
387 list_for_each_entry(connector, &dev->mode_config.connector_list,
389 gma_encoder = gma_attached_encoder(connector);
391 switch (gma_encoder->type) {
392 case INTEL_OUTPUT_LVDS:
393 case INTEL_OUTPUT_MIPI:
394 ret = gma_backlight_init(dev);
401 psb_intel_opregion_enable_asle(dev);
403 /* Enable runtime pm at last */
404 pm_runtime_enable(dev->dev);
405 pm_runtime_set_active(dev->dev);
408 return devm_add_action_or_reset(dev->dev, psb_device_release, dev);
411 psb_driver_unload(dev);
415 static inline void get_brightness(struct backlight_device *bd)
417 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
419 bd->props.brightness = bd->ops->get_brightness(bd);
420 backlight_update_status(bd);
425 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
428 struct drm_file *file_priv = filp->private_data;
429 struct drm_device *dev = file_priv->minor->dev;
430 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
431 static unsigned int runtime_allowed;
433 if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
435 pm_runtime_allow(dev->dev);
436 dev_priv->rpm_enabled = 1;
438 return drm_ioctl(filp, cmd, arg);
439 /* FIXME: do we need to wrap the other side of this */
442 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
444 struct drm_psb_private *dev_priv;
445 struct drm_device *dev;
449 * We cannot yet easily find the framebuffer's location in memory. So
450 * remove all framebuffers here.
452 * TODO: Refactor psb_driver_load() to map vdc_reg earlier. Then we
453 * might be able to read the framebuffer range from the device.
455 ret = drm_aperture_remove_framebuffers(true, &driver);
459 ret = pcim_enable_device(pdev);
463 dev_priv = devm_drm_dev_alloc(&pdev->dev, &driver, struct drm_psb_private, dev);
464 if (IS_ERR(dev_priv))
465 return PTR_ERR(dev_priv);
466 dev = &dev_priv->dev;
468 pci_set_drvdata(pdev, dev);
470 ret = psb_driver_load(dev, ent->driver_data);
474 ret = drm_dev_register(dev, ent->driver_data);
481 static void psb_pci_remove(struct pci_dev *pdev)
483 struct drm_device *dev = pci_get_drvdata(pdev);
485 drm_dev_unregister(dev);
488 static const struct dev_pm_ops psb_pm_ops = {
489 .resume = gma_power_resume,
490 .suspend = gma_power_suspend,
491 .thaw = gma_power_thaw,
492 .freeze = gma_power_freeze,
493 .restore = gma_power_restore,
494 .runtime_suspend = psb_runtime_suspend,
495 .runtime_resume = psb_runtime_resume,
496 .runtime_idle = psb_runtime_idle,
499 static const struct file_operations psb_gem_fops = {
500 .owner = THIS_MODULE,
502 .release = drm_release,
503 .unlocked_ioctl = psb_unlocked_ioctl,
504 .compat_ioctl = drm_compat_ioctl,
505 .mmap = drm_gem_mmap,
510 static const struct drm_driver driver = {
511 .driver_features = DRIVER_MODESET | DRIVER_GEM,
512 .lastclose = drm_fb_helper_lastclose,
514 .num_ioctls = ARRAY_SIZE(psb_ioctls),
516 .dumb_create = psb_gem_dumb_create,
517 .ioctls = psb_ioctls,
518 .fops = &psb_gem_fops,
522 .major = DRIVER_MAJOR,
523 .minor = DRIVER_MINOR,
524 .patchlevel = DRIVER_PATCHLEVEL
527 static struct pci_driver psb_pci_driver = {
529 .id_table = pciidlist,
530 .probe = psb_pci_probe,
531 .remove = psb_pci_remove,
532 .driver.pm = &psb_pm_ops,
535 static int __init psb_init(void)
537 if (drm_firmware_drivers_only())
540 return pci_register_driver(&psb_pci_driver);
543 static void __exit psb_exit(void)
545 pci_unregister_driver(&psb_pci_driver);
548 late_initcall(psb_init);
549 module_exit(psb_exit);
551 MODULE_AUTHOR(DRIVER_AUTHOR);
552 MODULE_DESCRIPTION(DRIVER_DESC);
553 MODULE_LICENSE("GPL");