drivers/gpu/drm/gma500/psb_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /**************************************************************************
   3  * Copyright (c) 2007-2011, Intel Corporation.
   4  * All Rights Reserved.
   5  * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
   6  * All Rights Reserved.
   7  *
   8  **************************************************************************/
   9
  10 #include <linux/cpu.h>
  11 #include <linux/module.h>
  12 #include <linux/notifier.h>
  13 #include <linux/pm_runtime.h>
  14 #include <linux/spinlock.h>
  15 #include <linux/delay.h>
  16
  17 #include <asm/set_memory.h>
  18
  19 #include <acpi/video.h>
  20
  21 #include <drm/drm.h>
  22 #include <drm/drm_drv.h>
  23 #include <drm/drm_fb_helper.h>
  24 #include <drm/drm_file.h>
  25 #include <drm/drm_ioctl.h>
  26 #include <drm/drm_irq.h>
  27 #include <drm/drm_pciids.h>
  28 #include <drm/drm_vblank.h>
  29
  30 #include "framebuffer.h"
  31 #include "intel_bios.h"
  32 #include "mid_bios.h"
  33 #include "power.h"
  34 #include "psb_drv.h"
  35 #include "psb_intel_reg.h"
  36 #include "psb_reg.h"
  37
  38 static const struct drm_driver driver;
  39 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  40
  41 /*
  42  * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
  43  * to the different groups of PowerVR 5-series chip designs
  44  *
  45  * 0x8086 = Intel Corporation
  46  *
  47  * PowerVR SGX535    - Poulsbo    - Intel GMA 500, Intel Atom Z5xx
  48  * PowerVR SGX535    - Moorestown - Intel GMA 600
  49  * PowerVR SGX535    - Oaktrail   - Intel GMA 600, Intel Atom Z6xx, E6xx
  50  * PowerVR SGX545    - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
  51  * PowerVR SGX545    - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
  52  *                                  N2800
  53  */
  54 static const struct pci_device_id pciidlist[] = {
  55         /* Poulsbo */
  56         { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  57         { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  58         /* Oak Trail */
  59         { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  60         { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  61         { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  62         { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  63         { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  64         { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  65         { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  66         { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  67         { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  68         /* Cedar Trail */
  69         { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  70         { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  71         { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  72         { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  73         { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  74         { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  75         { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  76         { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  77         { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  78         { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  79         { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  80         { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  81         { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  82         { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  83         { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  84         { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  85         { 0, }
  86 };
  87 MODULE_DEVICE_TABLE(pci, pciidlist);
  88
  89 /*
  90  * Standard IOCTLs.
  91  */
  92 static const struct drm_ioctl_desc psb_ioctls[] = {
  93 };
  94
  95 /**
  96  *      psb_spank               -       reset the 2D engine
  97  *      @dev_priv: our PSB DRM device
  98  *
  99  *      Soft reset the graphics engine and then reload the necessary registers.
 100  */
 101 void psb_spank(struct drm_psb_private *dev_priv)
 102 {
 103         PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
 104                 _PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
 105                 _PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
 106                 _PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
 107         PSB_RSGX32(PSB_CR_SOFT_RESET);
 108
 109         msleep(1);
 110
 111         PSB_WSGX32(0, PSB_CR_SOFT_RESET);
 112         wmb();
 113         PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
 114                    PSB_CR_BIF_CTRL);
 115         wmb();
 116         (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
 117
 118         msleep(1);
 119         PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
 120                    PSB_CR_BIF_CTRL);
 121         (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
 122         PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
 123 }
 124
 125 static int psb_do_init(struct drm_device *dev)
 126 {
 127         struct drm_psb_private *dev_priv = dev->dev_private;
 128         struct psb_gtt *pg = &dev_priv->gtt;
 129
 130         uint32_t stolen_gtt;
 131
 132         if (pg->mmu_gatt_start & 0x0FFFFFFF) {
 133                 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
 134                 return -EINVAL;
 135         }
 136
 137         stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
 138         stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
 139         stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
 140
 141         dev_priv->gatt_free_offset = pg->mmu_gatt_start +
 142             (stolen_gtt << PAGE_SHIFT) * 1024;
 143
 144         spin_lock_init(&dev_priv->irqmask_lock);
 145
 146         PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
 147         PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
 148         PSB_RSGX32(PSB_CR_BIF_BANK1);
 149
 150         /* Do not bypass any MMU access, let them pagefault instead */
 151         PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
 152                    PSB_CR_BIF_CTRL);
 153         PSB_RSGX32(PSB_CR_BIF_CTRL);
 154
 155         psb_spank(dev_priv);
 156
 157         /* mmu_gatt ?? */
 158         PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
 159         PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
 160
 161         return 0;
 162 }
 163
 164 static void psb_driver_unload(struct drm_device *dev)
 165 {
 166         struct drm_psb_private *dev_priv = dev->dev_private;
 167
 168         /* TODO: Kill vblank etc here */
 169
 170         if (dev_priv) {
 171                 if (dev_priv->backlight_device)
 172                         gma_backlight_exit(dev);
 173                 psb_modeset_cleanup(dev);
 174
 175                 if (dev_priv->ops->chip_teardown)
 176                         dev_priv->ops->chip_teardown(dev);
 177
 178                 psb_intel_opregion_fini(dev);
 179
 180                 if (dev_priv->pf_pd) {
 181                         psb_mmu_free_pagedir(dev_priv->pf_pd);
 182                         dev_priv->pf_pd = NULL;
 183                 }
 184                 if (dev_priv->mmu) {
 185                         struct psb_gtt *pg = &dev_priv->gtt;
 186
 187                         down_read(&pg->sem);
 188                         psb_mmu_remove_pfn_sequence(
 189                                 psb_mmu_get_default_pd
 190                                 (dev_priv->mmu),
 191                                 pg->mmu_gatt_start,
 192                                 dev_priv->vram_stolen_size >> PAGE_SHIFT);
 193                         up_read(&pg->sem);
 194                         psb_mmu_driver_takedown(dev_priv->mmu);
 195                         dev_priv->mmu = NULL;
 196                 }
 197                 psb_gtt_takedown(dev);
 198                 if (dev_priv->scratch_page) {
 199                         set_pages_wb(dev_priv->scratch_page, 1);
 200                         __free_page(dev_priv->scratch_page);
 201                         dev_priv->scratch_page = NULL;
 202                 }
 203                 if (dev_priv->vdc_reg) {
 204                         iounmap(dev_priv->vdc_reg);
 205                         dev_priv->vdc_reg = NULL;
 206                 }
 207                 if (dev_priv->sgx_reg) {
 208                         iounmap(dev_priv->sgx_reg);
 209                         dev_priv->sgx_reg = NULL;
 210                 }
 211                 if (dev_priv->aux_reg) {
 212                         iounmap(dev_priv->aux_reg);
 213                         dev_priv->aux_reg = NULL;
 214                 }
 215                 pci_dev_put(dev_priv->aux_pdev);
 216                 pci_dev_put(dev_priv->lpc_pdev);
 217
 218                 /* Destroy VBT data */
 219                 psb_intel_destroy_bios(dev);
 220
 221                 kfree(dev_priv);
 222                 dev->dev_private = NULL;
 223         }
 224         gma_power_uninit(dev);
 225 }
 226
 227 static int psb_driver_load(struct drm_device *dev, unsigned long flags)
 228 {
 229         struct pci_dev *pdev = to_pci_dev(dev->dev);
 230         struct drm_psb_private *dev_priv;
 231         unsigned long resource_start, resource_len;
 232         unsigned long irqflags;
 233         int ret = -ENOMEM;
 234         struct drm_connector *connector;
 235         struct gma_encoder *gma_encoder;
 236         struct psb_gtt *pg;
 237
 238         /* allocating and initializing driver private data */
 239         dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
 240         if (dev_priv == NULL)
 241                 return -ENOMEM;
 242
 243         dev_priv->ops = (struct psb_ops *)flags;
 244         dev_priv->dev = dev;
 245         dev->dev_private = (void *) dev_priv;
 246
 247         pg = &dev_priv->gtt;
 248
 249         pci_set_master(pdev);
 250
 251         dev_priv->num_pipe = dev_priv->ops->pipes;
 252
 253         resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE);
 254
 255         dev_priv->vdc_reg =
 256             ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
 257         if (!dev_priv->vdc_reg)
 258                 goto out_err;
 259
 260         dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
 261                                                         PSB_SGX_SIZE);
 262         if (!dev_priv->sgx_reg)
 263                 goto out_err;
 264
 265         if (IS_MRST(dev)) {
 266                 int domain = pci_domain_nr(pdev->bus);
 267
 268                 dev_priv->aux_pdev =
 269                         pci_get_domain_bus_and_slot(domain, 0,
 270                                                     PCI_DEVFN(3, 0));
 271
 272                 if (dev_priv->aux_pdev) {
 273                         resource_start = pci_resource_start(dev_priv->aux_pdev,
 274                                                             PSB_AUX_RESOURCE);
 275                         resource_len = pci_resource_len(dev_priv->aux_pdev,
 276                                                         PSB_AUX_RESOURCE);
 277                         dev_priv->aux_reg = ioremap(resource_start,
 278                                                             resource_len);
 279                         if (!dev_priv->aux_reg)
 280                                 goto out_err;
 281
 282                         DRM_DEBUG_KMS("Found aux vdc");
 283                 } else {
 284                         /* Couldn't find the aux vdc so map to primary vdc */
 285                         dev_priv->aux_reg = dev_priv->vdc_reg;
 286                         DRM_DEBUG_KMS("Couldn't find aux pci device");
 287                 }
 288                 dev_priv->gmbus_reg = dev_priv->aux_reg;
 289
 290                 dev_priv->lpc_pdev =
 291                         pci_get_domain_bus_and_slot(domain, 0,
 292                                                     PCI_DEVFN(31, 0));
 293                 if (dev_priv->lpc_pdev) {
 294                         pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
 295                                 &dev_priv->lpc_gpio_base);
 296                         pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
 297                                 (u32)dev_priv->lpc_gpio_base | (1L<<31));
 298                         pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
 299                                 &dev_priv->lpc_gpio_base);
 300                         dev_priv->lpc_gpio_base &= 0xffc0;
 301                         if (dev_priv->lpc_gpio_base)
 302                                 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
 303                                                 dev_priv->lpc_gpio_base);
 304                         else {
 305                                 pci_dev_put(dev_priv->lpc_pdev);
 306                                 dev_priv->lpc_pdev = NULL;
 307                         }
 308                 }
 309         } else {
 310                 dev_priv->gmbus_reg = dev_priv->vdc_reg;
 311         }
 312
 313         psb_intel_opregion_setup(dev);
 314
 315         ret = dev_priv->ops->chip_setup(dev);
 316         if (ret)
 317                 goto out_err;
 318
 319         /* Init OSPM support */
 320         gma_power_init(dev);
 321
 322         ret = -ENOMEM;
 323
 324         dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
 325         if (!dev_priv->scratch_page)
 326                 goto out_err;
 327
 328         set_pages_uc(dev_priv->scratch_page, 1);
 329
 330         ret = psb_gtt_init(dev, 0);
 331         if (ret)
 332                 goto out_err;
 333
 334         ret = -ENOMEM;
 335
 336         dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL);
 337         if (!dev_priv->mmu)
 338                 goto out_err;
 339
 340         dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
 341         if (!dev_priv->pf_pd)
 342                 goto out_err;
 343
 344         ret = psb_do_init(dev);
 345         if (ret)
 346                 return ret;
 347
 348         /* Add stolen memory to SGX MMU */
 349         down_read(&pg->sem);
 350         ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
 351                                           dev_priv->stolen_base >> PAGE_SHIFT,
 352                                           pg->gatt_start,
 353                                           pg->stolen_size >> PAGE_SHIFT, 0);
 354         up_read(&pg->sem);
 355
 356         psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
 357         psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
 358
 359         PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
 360         PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
 361
 362         acpi_video_register();
 363
 364         /* Setup vertical blanking handling */
 365         ret = drm_vblank_init(dev, dev_priv->num_pipe);
 366         if (ret)
 367                 goto out_err;
 368
 369         /*
 370          * Install interrupt handlers prior to powering off SGX or else we will
 371          * crash.
 372          */
 373         dev_priv->vdc_irq_mask = 0;
 374         dev_priv->pipestat[0] = 0;
 375         dev_priv->pipestat[1] = 0;
 376         dev_priv->pipestat[2] = 0;
 377         spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
 378         PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
 379         PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
 380         PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
 381         spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
 382
 383         drm_irq_install(dev, pdev->irq);
 384
 385         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
 386
 387         psb_modeset_init(dev);
 388         psb_fbdev_init(dev);
 389         drm_kms_helper_poll_init(dev);
 390
 391         /* Only add backlight support if we have LVDS output */
 392         list_for_each_entry(connector, &dev->mode_config.connector_list,
 393                             head) {
 394                 gma_encoder = gma_attached_encoder(connector);
 395
 396                 switch (gma_encoder->type) {
 397                 case INTEL_OUTPUT_LVDS:
 398                 case INTEL_OUTPUT_MIPI:
 399                         ret = gma_backlight_init(dev);
 400                         break;
 401                 }
 402         }
 403
 404         if (ret)
 405                 return ret;
 406         psb_intel_opregion_enable_asle(dev);
 407 #if 0
 408         /* Enable runtime pm at last */
 409         pm_runtime_enable(dev->dev);
 410         pm_runtime_set_active(dev->dev);
 411 #endif
 412         /* Intel drm driver load is done, continue doing pvr load */
 413         return 0;
 414 out_err:
 415         psb_driver_unload(dev);
 416         return ret;
 417 }
 418
 419 static inline void get_brightness(struct backlight_device *bd)
 420 {
 421 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
 422         if (bd) {
 423                 bd->props.brightness = bd->ops->get_brightness(bd);
 424                 backlight_update_status(bd);
 425         }
 426 #endif
 427 }
 428
 429 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
 430                                unsigned long arg)
 431 {
 432         struct drm_file *file_priv = filp->private_data;
 433         struct drm_device *dev = file_priv->minor->dev;
 434         struct drm_psb_private *dev_priv = dev->dev_private;
 435         static unsigned int runtime_allowed;
 436
 437         if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
 438                 runtime_allowed++;
 439                 pm_runtime_allow(dev->dev);
 440                 dev_priv->rpm_enabled = 1;
 441         }
 442         return drm_ioctl(filp, cmd, arg);
 443         /* FIXME: do we need to wrap the other side of this */
 444 }
 445
 446 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 447 {
 448         struct drm_device *dev;
 449         int ret;
 450
 451         ret = pci_enable_device(pdev);
 452         if (ret)
 453                 return ret;
 454
 455         dev = drm_dev_alloc(&driver, &pdev->dev);
 456         if (IS_ERR(dev)) {
 457                 ret = PTR_ERR(dev);
 458                 goto err_pci_disable_device;
 459         }
 460
 461         pci_set_drvdata(pdev, dev);
 462
 463         ret = psb_driver_load(dev, ent->driver_data);
 464         if (ret)
 465                 goto err_drm_dev_put;
 466
 467         ret = drm_dev_register(dev, ent->driver_data);
 468         if (ret)
 469                 goto err_psb_driver_unload;
 470
 471         return 0;
 472
 473 err_psb_driver_unload:
 474         psb_driver_unload(dev);
 475 err_drm_dev_put:
 476         drm_dev_put(dev);
 477 err_pci_disable_device:
 478         pci_disable_device(pdev);
 479         return ret;
 480 }
 481
 482 static void psb_pci_remove(struct pci_dev *pdev)
 483 {
 484         struct drm_device *dev = pci_get_drvdata(pdev);
 485
 486         drm_dev_unregister(dev);
 487         psb_driver_unload(dev);
 488         drm_dev_put(dev);
 489 }
 490
 491 static const struct dev_pm_ops psb_pm_ops = {
 492         .resume = gma_power_resume,
 493         .suspend = gma_power_suspend,
 494         .thaw = gma_power_thaw,
 495         .freeze = gma_power_freeze,
 496         .restore = gma_power_restore,
 497         .runtime_suspend = psb_runtime_suspend,
 498         .runtime_resume = psb_runtime_resume,
 499         .runtime_idle = psb_runtime_idle,
 500 };
 501
 502 static const struct file_operations psb_gem_fops = {
 503         .owner = THIS_MODULE,
 504         .open = drm_open,
 505         .release = drm_release,
 506         .unlocked_ioctl = psb_unlocked_ioctl,
 507         .compat_ioctl = drm_compat_ioctl,
 508         .mmap = drm_gem_mmap,
 509         .poll = drm_poll,
 510         .read = drm_read,
 511 };
 512
 513 static const struct drm_driver driver = {
 514         .driver_features = DRIVER_MODESET | DRIVER_GEM,
 515         .lastclose = drm_fb_helper_lastclose,
 516
 517         .num_ioctls = ARRAY_SIZE(psb_ioctls),
 518         .irq_preinstall = psb_irq_preinstall,
 519         .irq_postinstall = psb_irq_postinstall,
 520         .irq_uninstall = psb_irq_uninstall,
 521         .irq_handler = psb_irq_handler,
 522
 523         .dumb_create = psb_gem_dumb_create,
 524         .ioctls = psb_ioctls,
 525         .fops = &psb_gem_fops,
 526         .name = DRIVER_NAME,
 527         .desc = DRIVER_DESC,
 528         .date = DRIVER_DATE,
 529         .major = DRIVER_MAJOR,
 530         .minor = DRIVER_MINOR,
 531         .patchlevel = DRIVER_PATCHLEVEL
 532 };
 533
 534 static struct pci_driver psb_pci_driver = {
 535         .name = DRIVER_NAME,
 536         .id_table = pciidlist,
 537         .probe = psb_pci_probe,
 538         .remove = psb_pci_remove,
 539         .driver.pm = &psb_pm_ops,
 540 };
 541
 542 static int __init psb_init(void)
 543 {
 544         return pci_register_driver(&psb_pci_driver);
 545 }
 546
 547 static void __exit psb_exit(void)
 548 {
 549         pci_unregister_driver(&psb_pci_driver);
 550 }
 551
 552 late_initcall(psb_init);
 553 module_exit(psb_exit);
 554
 555 MODULE_AUTHOR(DRIVER_AUTHOR);
 556 MODULE_DESCRIPTION(DRIVER_DESC);
 557 MODULE_LICENSE("GPL");