1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2015 Freescale Semiconductor, Inc.
5 * Freescale DCU drm device driver
9 #include <linux/clk-provider.h>
10 #include <linux/console.h>
12 #include <linux/mfd/syscon.h>
14 #include <linux/module.h>
15 #include <linux/of_platform.h>
16 #include <linux/platform_device.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regmap.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_fb_cma_helper.h>
24 #include <drm/drm_fb_helper.h>
25 #include <drm/drm_gem_cma_helper.h>
26 #include <drm/drm_modeset_helper.h>
27 #include <drm/drm_probe_helper.h>
29 #include "fsl_dcu_drm_crtc.h"
30 #include "fsl_dcu_drm_drv.h"
33 static int legacyfb_depth = 24;
34 module_param(legacyfb_depth, int, 0444);
36 static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
38 if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
44 static const struct regmap_config fsl_dcu_regmap_config = {
49 .volatile_reg = fsl_dcu_drm_is_volatile_reg,
52 static void fsl_dcu_irq_uninstall(struct drm_device *dev)
54 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
56 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0);
57 regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
60 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
62 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
65 ret = fsl_dcu_drm_modeset_init(fsl_dev);
67 dev_err(dev->dev, "failed to initialize mode setting\n");
71 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
73 dev_err(dev->dev, "failed to initialize vblank\n");
77 ret = drm_irq_install(dev, fsl_dev->irq);
79 dev_err(dev->dev, "failed to install IRQ handler\n");
83 if (legacyfb_depth != 16 && legacyfb_depth != 24 &&
84 legacyfb_depth != 32) {
86 "Invalid legacyfb_depth. Defaulting to 24bpp\n");
92 drm_kms_helper_poll_fini(dev);
94 drm_mode_config_cleanup(dev);
95 drm_irq_uninstall(dev);
96 dev->dev_private = NULL;
101 static void fsl_dcu_unload(struct drm_device *dev)
103 drm_atomic_helper_shutdown(dev);
104 drm_kms_helper_poll_fini(dev);
106 drm_mode_config_cleanup(dev);
107 drm_irq_uninstall(dev);
109 dev->dev_private = NULL;
112 static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
114 struct drm_device *dev = arg;
115 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
116 unsigned int int_status;
119 ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
121 dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
125 if (int_status & DCU_INT_STATUS_VBLANK)
126 drm_handle_vblank(dev, 0);
128 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
133 DEFINE_DRM_GEM_CMA_FOPS(fsl_dcu_drm_fops);
135 static struct drm_driver fsl_dcu_drm_driver = {
136 .driver_features = DRIVER_GEM | DRIVER_MODESET
137 | DRIVER_PRIME | DRIVER_ATOMIC,
138 .load = fsl_dcu_load,
139 .unload = fsl_dcu_unload,
140 .irq_handler = fsl_dcu_drm_irq,
141 .irq_preinstall = fsl_dcu_irq_uninstall,
142 .irq_uninstall = fsl_dcu_irq_uninstall,
143 .gem_free_object_unlocked = drm_gem_cma_free_object,
144 .gem_vm_ops = &drm_gem_cma_vm_ops,
145 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
146 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
147 .gem_prime_import = drm_gem_prime_import,
148 .gem_prime_export = drm_gem_prime_export,
149 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
150 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
151 .gem_prime_vmap = drm_gem_cma_prime_vmap,
152 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
153 .gem_prime_mmap = drm_gem_cma_prime_mmap,
154 .dumb_create = drm_gem_cma_dumb_create,
155 .fops = &fsl_dcu_drm_fops,
156 .name = "fsl-dcu-drm",
157 .desc = "Freescale DCU DRM",
163 #ifdef CONFIG_PM_SLEEP
164 static int fsl_dcu_drm_pm_suspend(struct device *dev)
166 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
172 disable_irq(fsl_dev->irq);
174 ret = drm_mode_config_helper_suspend(fsl_dev->drm);
176 enable_irq(fsl_dev->irq);
180 clk_disable_unprepare(fsl_dev->clk);
185 static int fsl_dcu_drm_pm_resume(struct device *dev)
187 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
193 ret = clk_prepare_enable(fsl_dev->clk);
195 dev_err(dev, "failed to enable dcu clk\n");
200 fsl_tcon_bypass_enable(fsl_dev->tcon);
201 fsl_dcu_drm_init_planes(fsl_dev->drm);
202 enable_irq(fsl_dev->irq);
204 drm_mode_config_helper_resume(fsl_dev->drm);
210 static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
211 SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
214 static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
218 .layer_regs = LS1021A_LAYER_REG_NUM,
221 static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
225 .layer_regs = VF610_LAYER_REG_NUM,
228 static const struct of_device_id fsl_dcu_of_match[] = {
230 .compatible = "fsl,ls1021a-dcu",
231 .data = &fsl_dcu_ls1021a_data,
233 .compatible = "fsl,vf610-dcu",
234 .data = &fsl_dcu_vf610_data,
238 MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
240 static int fsl_dcu_drm_probe(struct platform_device *pdev)
242 struct fsl_dcu_drm_device *fsl_dev;
243 struct drm_device *drm;
244 struct device *dev = &pdev->dev;
245 struct resource *res;
247 struct drm_driver *driver = &fsl_dcu_drm_driver;
248 struct clk *pix_clk_in;
249 char pix_clk_name[32];
250 const char *pix_clk_in_name;
251 const struct of_device_id *id;
253 u8 div_ratio_shift = 0;
255 fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
259 id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
262 fsl_dev->soc = id->data;
264 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
265 base = devm_ioremap_resource(dev, res);
271 fsl_dev->irq = platform_get_irq(pdev, 0);
272 if (fsl_dev->irq < 0) {
273 dev_err(dev, "failed to get irq\n");
277 fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
278 &fsl_dcu_regmap_config);
279 if (IS_ERR(fsl_dev->regmap)) {
280 dev_err(dev, "regmap init failed\n");
281 return PTR_ERR(fsl_dev->regmap);
284 fsl_dev->clk = devm_clk_get(dev, "dcu");
285 if (IS_ERR(fsl_dev->clk)) {
286 dev_err(dev, "failed to get dcu clock\n");
287 return PTR_ERR(fsl_dev->clk);
289 ret = clk_prepare_enable(fsl_dev->clk);
291 dev_err(dev, "failed to enable dcu clk\n");
295 pix_clk_in = devm_clk_get(dev, "pix");
296 if (IS_ERR(pix_clk_in)) {
297 /* legancy binding, use dcu clock as pixel clock input */
298 pix_clk_in = fsl_dev->clk;
301 if (of_property_read_bool(dev->of_node, "big-endian"))
302 div_ratio_shift = 24;
304 pix_clk_in_name = __clk_get_name(pix_clk_in);
305 snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
306 fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
307 pix_clk_in_name, 0, base + DCU_DIV_RATIO,
308 div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
309 if (IS_ERR(fsl_dev->pix_clk)) {
310 dev_err(dev, "failed to register pix clk\n");
311 ret = PTR_ERR(fsl_dev->pix_clk);
315 fsl_dev->tcon = fsl_tcon_init(dev);
317 drm = drm_dev_alloc(driver, dev);
320 goto unregister_pix_clk;
325 fsl_dev->np = dev->of_node;
326 drm->dev_private = fsl_dev;
327 dev_set_drvdata(dev, fsl_dev);
329 ret = drm_dev_register(drm, 0);
333 drm_fbdev_generic_setup(drm, legacyfb_depth);
340 clk_unregister(fsl_dev->pix_clk);
342 clk_disable_unprepare(fsl_dev->clk);
346 static int fsl_dcu_drm_remove(struct platform_device *pdev)
348 struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
350 drm_dev_unregister(fsl_dev->drm);
351 drm_dev_put(fsl_dev->drm);
352 clk_disable_unprepare(fsl_dev->clk);
353 clk_unregister(fsl_dev->pix_clk);
358 static struct platform_driver fsl_dcu_drm_platform_driver = {
359 .probe = fsl_dcu_drm_probe,
360 .remove = fsl_dcu_drm_remove,
363 .pm = &fsl_dcu_drm_pm_ops,
364 .of_match_table = fsl_dcu_of_match,
368 module_platform_driver(fsl_dcu_drm_platform_driver);
370 MODULE_DESCRIPTION("Freescale DCU DRM Driver");
371 MODULE_LICENSE("GPL");