drivers/gpu/drm/etnaviv/etnaviv_drv.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2015-2018 Etnaviv Project
   4  */
   5
   6 #include <linux/component.h>
   7 #include <linux/dma-mapping.h>
   8 #include <linux/module.h>
   9 #include <linux/of_platform.h>
  10 #include <linux/uaccess.h>
  11
  12 #include <drm/drm_debugfs.h>
  13 #include <drm/drm_drv.h>
  14 #include <drm/drm_file.h>
  15 #include <drm/drm_ioctl.h>
  16 #include <drm/drm_of.h>
  17 #include <drm/drm_prime.h>
  18
  19 #include "etnaviv_cmdbuf.h"
  20 #include "etnaviv_drv.h"
  21 #include "etnaviv_gpu.h"
  22 #include "etnaviv_gem.h"
  23 #include "etnaviv_mmu.h"
  24 #include "etnaviv_perfmon.h"
  25 #include "common.xml.h"
  26
  27 /*
  28  * DRM operations:
  29  */
  30
  31
  32 static void load_gpu(struct drm_device *dev)
  33 {
  34         struct etnaviv_drm_private *priv = dev->dev_private;
  35         unsigned int i;
  36
  37         for (i = 0; i < ETNA_MAX_PIPES; i++) {
  38                 struct etnaviv_gpu *g = priv->gpu[i];
  39
  40                 if (g) {
  41                         int ret;
  42
  43                         ret = etnaviv_gpu_init(g);
  44                         if (ret)
  45                                 priv->gpu[i] = NULL;
  46                 }
  47         }
  48 }
  49
  50 static int etnaviv_open(struct drm_device *dev, struct drm_file *file)
  51 {
  52         struct etnaviv_drm_private *priv = dev->dev_private;
  53         struct etnaviv_file_private *ctx;
  54         int ret, i;
  55
  56         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  57         if (!ctx)
  58                 return -ENOMEM;
  59
  60         ret = xa_alloc_cyclic(&priv->active_contexts, &ctx->id, ctx,
  61                               xa_limit_32b, &priv->next_context_id, GFP_KERNEL);
  62         if (ret < 0)
  63                 goto out_free;
  64
  65         ctx->mmu = etnaviv_iommu_context_init(priv->mmu_global,
  66                                               priv->cmdbuf_suballoc);
  67         if (!ctx->mmu) {
  68                 ret = -ENOMEM;
  69                 goto out_free;
  70         }
  71
  72         for (i = 0; i < ETNA_MAX_PIPES; i++) {
  73                 struct etnaviv_gpu *gpu = priv->gpu[i];
  74                 struct drm_gpu_scheduler *sched;
  75
  76                 if (gpu) {
  77                         sched = &gpu->sched;
  78                         drm_sched_entity_init(&ctx->sched_entity[i],
  79                                               DRM_SCHED_PRIORITY_NORMAL, &sched,
  80                                               1, NULL);
  81                         }
  82         }
  83
  84         file->driver_priv = ctx;
  85
  86         return 0;
  87
  88 out_free:
  89         kfree(ctx);
  90         return ret;
  91 }
  92
  93 static void etnaviv_postclose(struct drm_device *dev, struct drm_file *file)
  94 {
  95         struct etnaviv_drm_private *priv = dev->dev_private;
  96         struct etnaviv_file_private *ctx = file->driver_priv;
  97         unsigned int i;
  98
  99         for (i = 0; i < ETNA_MAX_PIPES; i++) {
 100                 struct etnaviv_gpu *gpu = priv->gpu[i];
 101
 102                 if (gpu)
 103                         drm_sched_entity_destroy(&ctx->sched_entity[i]);
 104         }
 105
 106         etnaviv_iommu_context_put(ctx->mmu);
 107
 108         xa_erase(&priv->active_contexts, ctx->id);
 109
 110         kfree(ctx);
 111 }
 112
 113 /*
 114  * DRM debugfs:
 115  */
 116
 117 #ifdef CONFIG_DEBUG_FS
 118 static int etnaviv_gem_show(struct drm_device *dev, struct seq_file *m)
 119 {
 120         struct etnaviv_drm_private *priv = dev->dev_private;
 121
 122         etnaviv_gem_describe_objects(priv, m);
 123
 124         return 0;
 125 }
 126
 127 static int etnaviv_mm_show(struct drm_device *dev, struct seq_file *m)
 128 {
 129         struct drm_printer p = drm_seq_file_printer(m);
 130
 131         read_lock(&dev->vma_offset_manager->vm_lock);
 132         drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
 133         read_unlock(&dev->vma_offset_manager->vm_lock);
 134
 135         return 0;
 136 }
 137
 138 static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m)
 139 {
 140         struct drm_printer p = drm_seq_file_printer(m);
 141         struct etnaviv_iommu_context *mmu_context;
 142
 143         seq_printf(m, "Active Objects (%s):\n", dev_name(gpu->dev));
 144
 145         /*
 146          * Lock the GPU to avoid a MMU context switch just now and elevate
 147          * the refcount of the current context to avoid it disappearing from
 148          * under our feet.
 149          */
 150         mutex_lock(&gpu->lock);
 151         mmu_context = gpu->mmu_context;
 152         if (mmu_context)
 153                 etnaviv_iommu_context_get(mmu_context);
 154         mutex_unlock(&gpu->lock);
 155
 156         if (!mmu_context)
 157                 return 0;
 158
 159         mutex_lock(&mmu_context->lock);
 160         drm_mm_print(&mmu_context->mm, &p);
 161         mutex_unlock(&mmu_context->lock);
 162
 163         etnaviv_iommu_context_put(mmu_context);
 164
 165         return 0;
 166 }
 167
 168 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m)
 169 {
 170         struct etnaviv_cmdbuf *buf = &gpu->buffer;
 171         u32 size = buf->size;
 172         u32 *ptr = buf->vaddr;
 173         u32 i;
 174
 175         seq_printf(m, "virt %p - phys 0x%llx - free 0x%08x\n",
 176                         buf->vaddr, (u64)etnaviv_cmdbuf_get_pa(buf),
 177                         size - buf->user_size);
 178
 179         for (i = 0; i < size / 4; i++) {
 180                 if (i && !(i % 4))
 181                         seq_puts(m, "\n");
 182                 if (i % 4 == 0)
 183                         seq_printf(m, "\t0x%p: ", ptr + i);
 184                 seq_printf(m, "%08x ", *(ptr + i));
 185         }
 186         seq_puts(m, "\n");
 187 }
 188
 189 static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m)
 190 {
 191         seq_printf(m, "Ring Buffer (%s): ", dev_name(gpu->dev));
 192
 193         mutex_lock(&gpu->lock);
 194         etnaviv_buffer_dump(gpu, m);
 195         mutex_unlock(&gpu->lock);
 196
 197         return 0;
 198 }
 199
 200 static int show_unlocked(struct seq_file *m, void *arg)
 201 {
 202         struct drm_info_node *node = (struct drm_info_node *) m->private;
 203         struct drm_device *dev = node->minor->dev;
 204         int (*show)(struct drm_device *dev, struct seq_file *m) =
 205                         node->info_ent->data;
 206
 207         return show(dev, m);
 208 }
 209
 210 static int show_each_gpu(struct seq_file *m, void *arg)
 211 {
 212         struct drm_info_node *node = (struct drm_info_node *) m->private;
 213         struct drm_device *dev = node->minor->dev;
 214         struct etnaviv_drm_private *priv = dev->dev_private;
 215         struct etnaviv_gpu *gpu;
 216         int (*show)(struct etnaviv_gpu *gpu, struct seq_file *m) =
 217                         node->info_ent->data;
 218         unsigned int i;
 219         int ret = 0;
 220
 221         for (i = 0; i < ETNA_MAX_PIPES; i++) {
 222                 gpu = priv->gpu[i];
 223                 if (!gpu)
 224                         continue;
 225
 226                 ret = show(gpu, m);
 227                 if (ret < 0)
 228                         break;
 229         }
 230
 231         return ret;
 232 }
 233
 234 static struct drm_info_list etnaviv_debugfs_list[] = {
 235                 {"gpu", show_each_gpu, 0, etnaviv_gpu_debugfs},
 236                 {"gem", show_unlocked, 0, etnaviv_gem_show},
 237                 { "mm", show_unlocked, 0, etnaviv_mm_show },
 238                 {"mmu", show_each_gpu, 0, etnaviv_mmu_show},
 239                 {"ring", show_each_gpu, 0, etnaviv_ring_show},
 240 };
 241
 242 static void etnaviv_debugfs_init(struct drm_minor *minor)
 243 {
 244         drm_debugfs_create_files(etnaviv_debugfs_list,
 245                                  ARRAY_SIZE(etnaviv_debugfs_list),
 246                                  minor->debugfs_root, minor);
 247 }
 248 #endif
 249
 250 /*
 251  * DRM ioctls:
 252  */
 253
 254 static int etnaviv_ioctl_get_param(struct drm_device *dev, void *data,
 255                 struct drm_file *file)
 256 {
 257         struct etnaviv_drm_private *priv = dev->dev_private;
 258         struct drm_etnaviv_param *args = data;
 259         struct etnaviv_gpu *gpu;
 260
 261         if (args->pipe >= ETNA_MAX_PIPES)
 262                 return -EINVAL;
 263
 264         gpu = priv->gpu[args->pipe];
 265         if (!gpu)
 266                 return -ENXIO;
 267
 268         return etnaviv_gpu_get_param(gpu, args->param, &args->value);
 269 }
 270
 271 static int etnaviv_ioctl_gem_new(struct drm_device *dev, void *data,
 272                 struct drm_file *file)
 273 {
 274         struct drm_etnaviv_gem_new *args = data;
 275
 276         if (args->flags & ~(ETNA_BO_CACHED | ETNA_BO_WC | ETNA_BO_UNCACHED |
 277                             ETNA_BO_FORCE_MMU))
 278                 return -EINVAL;
 279
 280         return etnaviv_gem_new_handle(dev, file, args->size,
 281                         args->flags, &args->handle);
 282 }
 283
 284 static int etnaviv_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 285                 struct drm_file *file)
 286 {
 287         struct drm_etnaviv_gem_cpu_prep *args = data;
 288         struct drm_gem_object *obj;
 289         int ret;
 290
 291         if (args->op & ~(ETNA_PREP_READ | ETNA_PREP_WRITE | ETNA_PREP_NOSYNC))
 292                 return -EINVAL;
 293
 294         obj = drm_gem_object_lookup(file, args->handle);
 295         if (!obj)
 296                 return -ENOENT;
 297
 298         ret = etnaviv_gem_cpu_prep(obj, args->op, &args->timeout);
 299
 300         drm_gem_object_put(obj);
 301
 302         return ret;
 303 }
 304
 305 static int etnaviv_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 306                 struct drm_file *file)
 307 {
 308         struct drm_etnaviv_gem_cpu_fini *args = data;
 309         struct drm_gem_object *obj;
 310         int ret;
 311
 312         if (args->flags)
 313                 return -EINVAL;
 314
 315         obj = drm_gem_object_lookup(file, args->handle);
 316         if (!obj)
 317                 return -ENOENT;
 318
 319         ret = etnaviv_gem_cpu_fini(obj);
 320
 321         drm_gem_object_put(obj);
 322
 323         return ret;
 324 }
 325
 326 static int etnaviv_ioctl_gem_info(struct drm_device *dev, void *data,
 327                 struct drm_file *file)
 328 {
 329         struct drm_etnaviv_gem_info *args = data;
 330         struct drm_gem_object *obj;
 331         int ret;
 332
 333         if (args->pad)
 334                 return -EINVAL;
 335
 336         obj = drm_gem_object_lookup(file, args->handle);
 337         if (!obj)
 338                 return -ENOENT;
 339
 340         ret = etnaviv_gem_mmap_offset(obj, &args->offset);
 341         drm_gem_object_put(obj);
 342
 343         return ret;
 344 }
 345
 346 static int etnaviv_ioctl_wait_fence(struct drm_device *dev, void *data,
 347                 struct drm_file *file)
 348 {
 349         struct drm_etnaviv_wait_fence *args = data;
 350         struct etnaviv_drm_private *priv = dev->dev_private;
 351         struct drm_etnaviv_timespec *timeout = &args->timeout;
 352         struct etnaviv_gpu *gpu;
 353
 354         if (args->flags & ~(ETNA_WAIT_NONBLOCK))
 355                 return -EINVAL;
 356
 357         if (args->pipe >= ETNA_MAX_PIPES)
 358                 return -EINVAL;
 359
 360         gpu = priv->gpu[args->pipe];
 361         if (!gpu)
 362                 return -ENXIO;
 363
 364         if (args->flags & ETNA_WAIT_NONBLOCK)
 365                 timeout = NULL;
 366
 367         return etnaviv_gpu_wait_fence_interruptible(gpu, args->fence,
 368                                                     timeout);
 369 }
 370
 371 static int etnaviv_ioctl_gem_userptr(struct drm_device *dev, void *data,
 372         struct drm_file *file)
 373 {
 374         struct drm_etnaviv_gem_userptr *args = data;
 375
 376         if (args->flags & ~(ETNA_USERPTR_READ|ETNA_USERPTR_WRITE) ||
 377             args->flags == 0)
 378                 return -EINVAL;
 379
 380         if (offset_in_page(args->user_ptr | args->user_size) ||
 381             (uintptr_t)args->user_ptr != args->user_ptr ||
 382             (u32)args->user_size != args->user_size ||
 383             args->user_ptr & ~PAGE_MASK)
 384                 return -EINVAL;
 385
 386         if (!access_ok((void __user *)(unsigned long)args->user_ptr,
 387                        args->user_size))
 388                 return -EFAULT;
 389
 390         return etnaviv_gem_new_userptr(dev, file, args->user_ptr,
 391                                        args->user_size, args->flags,
 392                                        &args->handle);
 393 }
 394
 395 static int etnaviv_ioctl_gem_wait(struct drm_device *dev, void *data,
 396         struct drm_file *file)
 397 {
 398         struct etnaviv_drm_private *priv = dev->dev_private;
 399         struct drm_etnaviv_gem_wait *args = data;
 400         struct drm_etnaviv_timespec *timeout = &args->timeout;
 401         struct drm_gem_object *obj;
 402         struct etnaviv_gpu *gpu;
 403         int ret;
 404
 405         if (args->flags & ~(ETNA_WAIT_NONBLOCK))
 406                 return -EINVAL;
 407
 408         if (args->pipe >= ETNA_MAX_PIPES)
 409                 return -EINVAL;
 410
 411         gpu = priv->gpu[args->pipe];
 412         if (!gpu)
 413                 return -ENXIO;
 414
 415         obj = drm_gem_object_lookup(file, args->handle);
 416         if (!obj)
 417                 return -ENOENT;
 418
 419         if (args->flags & ETNA_WAIT_NONBLOCK)
 420                 timeout = NULL;
 421
 422         ret = etnaviv_gem_wait_bo(gpu, obj, timeout);
 423
 424         drm_gem_object_put(obj);
 425
 426         return ret;
 427 }
 428
 429 static int etnaviv_ioctl_pm_query_dom(struct drm_device *dev, void *data,
 430         struct drm_file *file)
 431 {
 432         struct etnaviv_drm_private *priv = dev->dev_private;
 433         struct drm_etnaviv_pm_domain *args = data;
 434         struct etnaviv_gpu *gpu;
 435
 436         if (args->pipe >= ETNA_MAX_PIPES)
 437                 return -EINVAL;
 438
 439         gpu = priv->gpu[args->pipe];
 440         if (!gpu)
 441                 return -ENXIO;
 442
 443         return etnaviv_pm_query_dom(gpu, args);
 444 }
 445
 446 static int etnaviv_ioctl_pm_query_sig(struct drm_device *dev, void *data,
 447         struct drm_file *file)
 448 {
 449         struct etnaviv_drm_private *priv = dev->dev_private;
 450         struct drm_etnaviv_pm_signal *args = data;
 451         struct etnaviv_gpu *gpu;
 452
 453         if (args->pipe >= ETNA_MAX_PIPES)
 454                 return -EINVAL;
 455
 456         gpu = priv->gpu[args->pipe];
 457         if (!gpu)
 458                 return -ENXIO;
 459
 460         return etnaviv_pm_query_sig(gpu, args);
 461 }
 462
 463 static const struct drm_ioctl_desc etnaviv_ioctls[] = {
 464 #define ETNA_IOCTL(n, func, flags) \
 465         DRM_IOCTL_DEF_DRV(ETNAVIV_##n, etnaviv_ioctl_##func, flags)
 466         ETNA_IOCTL(GET_PARAM,    get_param,    DRM_RENDER_ALLOW),
 467         ETNA_IOCTL(GEM_NEW,      gem_new,      DRM_RENDER_ALLOW),
 468         ETNA_IOCTL(GEM_INFO,     gem_info,     DRM_RENDER_ALLOW),
 469         ETNA_IOCTL(GEM_CPU_PREP, gem_cpu_prep, DRM_RENDER_ALLOW),
 470         ETNA_IOCTL(GEM_CPU_FINI, gem_cpu_fini, DRM_RENDER_ALLOW),
 471         ETNA_IOCTL(GEM_SUBMIT,   gem_submit,   DRM_RENDER_ALLOW),
 472         ETNA_IOCTL(WAIT_FENCE,   wait_fence,   DRM_RENDER_ALLOW),
 473         ETNA_IOCTL(GEM_USERPTR,  gem_userptr,  DRM_RENDER_ALLOW),
 474         ETNA_IOCTL(GEM_WAIT,     gem_wait,     DRM_RENDER_ALLOW),
 475         ETNA_IOCTL(PM_QUERY_DOM, pm_query_dom, DRM_RENDER_ALLOW),
 476         ETNA_IOCTL(PM_QUERY_SIG, pm_query_sig, DRM_RENDER_ALLOW),
 477 };
 478
 479 static void etnaviv_fop_show_fdinfo(struct seq_file *m, struct file *f)
 480 {
 481         struct drm_file *file = f->private_data;
 482         struct drm_device *dev = file->minor->dev;
 483         struct etnaviv_drm_private *priv = dev->dev_private;
 484         struct etnaviv_file_private *ctx = file->driver_priv;
 485
 486         /*
 487          * For a description of the text output format used here, see
 488          * Documentation/gpu/drm-usage-stats.rst.
 489          */
 490         seq_printf(m, "drm-driver:\t%s\n", dev->driver->name);
 491         seq_printf(m, "drm-client-id:\t%u\n", ctx->id);
 492
 493         for (int i = 0; i < ETNA_MAX_PIPES; i++) {
 494                 struct etnaviv_gpu *gpu = priv->gpu[i];
 495                 char engine[10] = "UNK";
 496                 int cur = 0;
 497
 498                 if (!gpu)
 499                         continue;
 500
 501                 if (gpu->identity.features & chipFeatures_PIPE_2D)
 502                         cur = snprintf(engine, sizeof(engine), "2D");
 503                 if (gpu->identity.features & chipFeatures_PIPE_3D)
 504                         cur = snprintf(engine + cur, sizeof(engine) - cur,
 505                                        "%s3D", cur ? "/" : "");
 506                 if (gpu->identity.nn_core_count > 0)
 507                         cur = snprintf(engine + cur, sizeof(engine) - cur,
 508                                        "%sNN", cur ? "/" : "");
 509
 510                 seq_printf(m, "drm-engine-%s:\t%llu ns\n", engine,
 511                            ctx->sched_entity[i].elapsed_ns);
 512         }
 513 }
 514
 515 static const struct file_operations fops = {
 516         .owner = THIS_MODULE,
 517         DRM_GEM_FOPS,
 518         .show_fdinfo = etnaviv_fop_show_fdinfo,
 519 };
 520
 521 static const struct drm_driver etnaviv_drm_driver = {
 522         .driver_features    = DRIVER_GEM | DRIVER_RENDER,
 523         .open               = etnaviv_open,
 524         .postclose           = etnaviv_postclose,
 525         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 526         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 527         .gem_prime_import_sg_table = etnaviv_gem_prime_import_sg_table,
 528         .gem_prime_mmap     = drm_gem_prime_mmap,
 529 #ifdef CONFIG_DEBUG_FS
 530         .debugfs_init       = etnaviv_debugfs_init,
 531 #endif
 532         .ioctls             = etnaviv_ioctls,
 533         .num_ioctls         = DRM_ETNAVIV_NUM_IOCTLS,
 534         .fops               = &fops,
 535         .name               = "etnaviv",
 536         .desc               = "etnaviv DRM",
 537         .date               = "20151214",
 538         .major              = 1,
 539         .minor              = 3,
 540 };
 541
 542 /*
 543  * Platform driver:
 544  */
 545 static int etnaviv_bind(struct device *dev)
 546 {
 547         struct etnaviv_drm_private *priv;
 548         struct drm_device *drm;
 549         int ret;
 550
 551         drm = drm_dev_alloc(&etnaviv_drm_driver, dev);
 552         if (IS_ERR(drm))
 553                 return PTR_ERR(drm);
 554
 555         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 556         if (!priv) {
 557                 dev_err(dev, "failed to allocate private data\n");
 558                 ret = -ENOMEM;
 559                 goto out_put;
 560         }
 561         drm->dev_private = priv;
 562
 563         dma_set_max_seg_size(dev, SZ_2G);
 564
 565         xa_init_flags(&priv->active_contexts, XA_FLAGS_ALLOC);
 566
 567         mutex_init(&priv->gem_lock);
 568         INIT_LIST_HEAD(&priv->gem_list);
 569         priv->num_gpus = 0;
 570         priv->shm_gfp_mask = GFP_HIGHUSER | __GFP_RETRY_MAYFAIL | __GFP_NOWARN;
 571
 572         priv->cmdbuf_suballoc = etnaviv_cmdbuf_suballoc_new(drm->dev);
 573         if (IS_ERR(priv->cmdbuf_suballoc)) {
 574                 dev_err(drm->dev, "Failed to create cmdbuf suballocator\n");
 575                 ret = PTR_ERR(priv->cmdbuf_suballoc);
 576                 goto out_free_priv;
 577         }
 578
 579         dev_set_drvdata(dev, drm);
 580
 581         ret = component_bind_all(dev, drm);
 582         if (ret < 0)
 583                 goto out_destroy_suballoc;
 584
 585         load_gpu(drm);
 586
 587         ret = drm_dev_register(drm, 0);
 588         if (ret)
 589                 goto out_unbind;
 590
 591         return 0;
 592
 593 out_unbind:
 594         component_unbind_all(dev, drm);
 595 out_destroy_suballoc:
 596         etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc);
 597 out_free_priv:
 598         kfree(priv);
 599 out_put:
 600         drm_dev_put(drm);
 601
 602         return ret;
 603 }
 604
 605 static void etnaviv_unbind(struct device *dev)
 606 {
 607         struct drm_device *drm = dev_get_drvdata(dev);
 608         struct etnaviv_drm_private *priv = drm->dev_private;
 609
 610         drm_dev_unregister(drm);
 611
 612         component_unbind_all(dev, drm);
 613
 614         etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc);
 615
 616         xa_destroy(&priv->active_contexts);
 617
 618         drm->dev_private = NULL;
 619         kfree(priv);
 620
 621         drm_dev_put(drm);
 622 }
 623
 624 static const struct component_master_ops etnaviv_master_ops = {
 625         .bind = etnaviv_bind,
 626         .unbind = etnaviv_unbind,
 627 };
 628
 629 static int etnaviv_pdev_probe(struct platform_device *pdev)
 630 {
 631         struct device *dev = &pdev->dev;
 632         struct device_node *first_node = NULL;
 633         struct component_match *match = NULL;
 634
 635         if (!dev->platform_data) {
 636                 struct device_node *core_node;
 637
 638                 for_each_compatible_node(core_node, NULL, "vivante,gc") {
 639                         if (!of_device_is_available(core_node))
 640                                 continue;
 641
 642                         if (!first_node)
 643                                 first_node = core_node;
 644
 645                         drm_of_component_match_add(&pdev->dev, &match,
 646                                                    component_compare_of, core_node);
 647                 }
 648         } else {
 649                 char **names = dev->platform_data;
 650                 unsigned i;
 651
 652                 for (i = 0; names[i]; i++)
 653                         component_match_add(dev, &match, component_compare_dev_name, names[i]);
 654         }
 655
 656         /*
 657          * PTA and MTLB can have 40 bit base addresses, but
 658          * unfortunately, an entry in the MTLB can only point to a
 659          * 32 bit base address of a STLB. Moreover, to initialize the
 660          * MMU we need a command buffer with a 32 bit address because
 661          * without an MMU there is only an indentity mapping between
 662          * the internal 32 bit addresses and the bus addresses.
 663          *
 664          * To make things easy, we set the dma_coherent_mask to 32
 665          * bit to make sure we are allocating the command buffers and
 666          * TLBs in the lower 4 GiB address space.
 667          */
 668         if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(40)) ||
 669             dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
 670                 dev_dbg(&pdev->dev, "No suitable DMA available\n");
 671                 return -ENODEV;
 672         }
 673
 674         /*
 675          * Apply the same DMA configuration to the virtual etnaviv
 676          * device as the GPU we found. This assumes that all Vivante
 677          * GPUs in the system share the same DMA constraints.
 678          */
 679         if (first_node)
 680                 of_dma_configure(&pdev->dev, first_node, true);
 681
 682         return component_master_add_with_match(dev, &etnaviv_master_ops, match);
 683 }
 684
 685 static int etnaviv_pdev_remove(struct platform_device *pdev)
 686 {
 687         component_master_del(&pdev->dev, &etnaviv_master_ops);
 688
 689         return 0;
 690 }
 691
 692 static struct platform_driver etnaviv_platform_driver = {
 693         .probe      = etnaviv_pdev_probe,
 694         .remove     = etnaviv_pdev_remove,
 695         .driver     = {
 696                 .name   = "etnaviv",
 697         },
 698 };
 699
 700 static struct platform_device *etnaviv_drm;
 701
 702 static int __init etnaviv_init(void)
 703 {
 704         struct platform_device *pdev;
 705         int ret;
 706         struct device_node *np;
 707
 708         etnaviv_validate_init();
 709
 710         ret = platform_driver_register(&etnaviv_gpu_driver);
 711         if (ret != 0)
 712                 return ret;
 713
 714         ret = platform_driver_register(&etnaviv_platform_driver);
 715         if (ret != 0)
 716                 goto unregister_gpu_driver;
 717
 718         /*
 719          * If the DT contains at least one available GPU device, instantiate
 720          * the DRM platform device.
 721          */
 722         for_each_compatible_node(np, NULL, "vivante,gc") {
 723                 if (!of_device_is_available(np))
 724                         continue;
 725
 726                 pdev = platform_device_alloc("etnaviv", PLATFORM_DEVID_NONE);
 727                 if (!pdev) {
 728                         ret = -ENOMEM;
 729                         of_node_put(np);
 730                         goto unregister_platform_driver;
 731                 }
 732
 733                 ret = platform_device_add(pdev);
 734                 if (ret) {
 735                         platform_device_put(pdev);
 736                         of_node_put(np);
 737                         goto unregister_platform_driver;
 738                 }
 739
 740                 etnaviv_drm = pdev;
 741                 of_node_put(np);
 742                 break;
 743         }
 744
 745         return 0;
 746
 747 unregister_platform_driver:
 748         platform_driver_unregister(&etnaviv_platform_driver);
 749 unregister_gpu_driver:
 750         platform_driver_unregister(&etnaviv_gpu_driver);
 751         return ret;
 752 }
 753 module_init(etnaviv_init);
 754
 755 static void __exit etnaviv_exit(void)
 756 {
 757         platform_device_unregister(etnaviv_drm);
 758         platform_driver_unregister(&etnaviv_platform_driver);
 759         platform_driver_unregister(&etnaviv_gpu_driver);
 760 }
 761 module_exit(etnaviv_exit);
 762
 763 MODULE_AUTHOR("Christian Gmeiner <christian.gmeiner@gmail.com>");
 764 MODULE_AUTHOR("Russell King <rmk+kernel@armlinux.org.uk>");
 765 MODULE_AUTHOR("Lucas Stach <l.stach@pengutronix.de>");
 766 MODULE_DESCRIPTION("etnaviv DRM Driver");
 767 MODULE_LICENSE("GPL v2");
 768 MODULE_ALIAS("platform:etnaviv");