1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MIPI Display Bus Interface (DBI) LCD controller support
5 * Copyright 2016 Noralf Trønnes
8 #include <linux/debugfs.h>
9 #include <linux/delay.h>
10 #include <linux/dma-buf.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/module.h>
13 #include <linux/regulator/consumer.h>
14 #include <linux/spi/spi.h>
16 #include <drm/drm_connector.h>
17 #include <drm/drm_damage_helper.h>
18 #include <drm/drm_drv.h>
19 #include <drm/drm_gem_cma_helper.h>
20 #include <drm/drm_format_helper.h>
21 #include <drm/drm_fourcc.h>
22 #include <drm/drm_gem_framebuffer_helper.h>
23 #include <drm/drm_mipi_dbi.h>
24 #include <drm/drm_modes.h>
25 #include <drm/drm_probe_helper.h>
26 #include <drm/drm_rect.h>
27 #include <video/mipi_display.h>
29 #define MIPI_DBI_MAX_SPI_READ_SPEED 2000000 /* 2MHz */
31 #define DCS_POWER_MODE_DISPLAY BIT(2)
32 #define DCS_POWER_MODE_DISPLAY_NORMAL_MODE BIT(3)
33 #define DCS_POWER_MODE_SLEEP_MODE BIT(4)
34 #define DCS_POWER_MODE_PARTIAL_MODE BIT(5)
35 #define DCS_POWER_MODE_IDLE_MODE BIT(6)
36 #define DCS_POWER_MODE_RESERVED_MASK (BIT(0) | BIT(1) | BIT(7))
41 * This library provides helpers for MIPI Display Bus Interface (DBI)
42 * compatible display controllers.
44 * Many controllers for tiny lcd displays are MIPI compliant and can use this
45 * library. If a controller uses registers 0x2A and 0x2B to set the area to
46 * update and uses register 0x2C to write to frame memory, it is most likely
49 * Only MIPI Type 1 displays are supported since a full frame memory is needed.
51 * There are 3 MIPI DBI implementation types:
53 * A. Motorola 6800 type parallel bus
55 * B. Intel 8080 type parallel bus
57 * C. SPI type with 3 options:
59 * 1. 9-bit with the Data/Command signal as the ninth bit
60 * 2. Same as above except it's sent as 16 bits
61 * 3. 8-bit with the Data/Command signal as a separate D/CX pin
63 * Currently mipi_dbi only supports Type C options 1 and 3 with
64 * mipi_dbi_spi_init().
67 #define MIPI_DBI_DEBUG_COMMAND(cmd, data, len) \
70 DRM_DEBUG_DRIVER("cmd=%02x\n", cmd); \
72 DRM_DEBUG_DRIVER("cmd=%02x, par=%*ph\n", cmd, (int)len, data);\
74 DRM_DEBUG_DRIVER("cmd=%02x, len=%zu\n", cmd, len); \
77 static const u8 mipi_dbi_dcs_read_commands[] = {
78 MIPI_DCS_GET_DISPLAY_ID,
79 MIPI_DCS_GET_RED_CHANNEL,
80 MIPI_DCS_GET_GREEN_CHANNEL,
81 MIPI_DCS_GET_BLUE_CHANNEL,
82 MIPI_DCS_GET_DISPLAY_STATUS,
83 MIPI_DCS_GET_POWER_MODE,
84 MIPI_DCS_GET_ADDRESS_MODE,
85 MIPI_DCS_GET_PIXEL_FORMAT,
86 MIPI_DCS_GET_DISPLAY_MODE,
87 MIPI_DCS_GET_SIGNAL_MODE,
88 MIPI_DCS_GET_DIAGNOSTIC_RESULT,
89 MIPI_DCS_READ_MEMORY_START,
90 MIPI_DCS_READ_MEMORY_CONTINUE,
91 MIPI_DCS_GET_SCANLINE,
92 MIPI_DCS_GET_DISPLAY_BRIGHTNESS,
93 MIPI_DCS_GET_CONTROL_DISPLAY,
94 MIPI_DCS_GET_POWER_SAVE,
95 MIPI_DCS_GET_CABC_MIN_BRIGHTNESS,
96 MIPI_DCS_READ_DDB_START,
97 MIPI_DCS_READ_DDB_CONTINUE,
101 static bool mipi_dbi_command_is_read(struct mipi_dbi *dbi, u8 cmd)
105 if (!dbi->read_commands)
108 for (i = 0; i < 0xff; i++) {
109 if (!dbi->read_commands[i])
111 if (cmd == dbi->read_commands[i])
119 * mipi_dbi_command_read - MIPI DCS read command
120 * @dbi: MIPI DBI structure
124 * Send MIPI DCS read command to the controller.
127 * Zero on success, negative error code on failure.
129 int mipi_dbi_command_read(struct mipi_dbi *dbi, u8 cmd, u8 *val)
131 if (!dbi->read_commands)
134 if (!mipi_dbi_command_is_read(dbi, cmd))
137 return mipi_dbi_command_buf(dbi, cmd, val, 1);
139 EXPORT_SYMBOL(mipi_dbi_command_read);
142 * mipi_dbi_command_buf - MIPI DCS command with parameter(s) in an array
143 * @dbi: MIPI DBI structure
145 * @data: Parameter buffer
146 * @len: Buffer length
149 * Zero on success, negative error code on failure.
151 int mipi_dbi_command_buf(struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len)
156 /* SPI requires dma-safe buffers */
157 cmdbuf = kmemdup(&cmd, 1, GFP_KERNEL);
161 mutex_lock(&dbi->cmdlock);
162 ret = dbi->command(dbi, cmdbuf, data, len);
163 mutex_unlock(&dbi->cmdlock);
169 EXPORT_SYMBOL(mipi_dbi_command_buf);
171 /* This should only be used by mipi_dbi_command() */
172 int mipi_dbi_command_stackbuf(struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len)
177 buf = kmemdup(data, len, GFP_KERNEL);
181 ret = mipi_dbi_command_buf(dbi, cmd, buf, len);
187 EXPORT_SYMBOL(mipi_dbi_command_stackbuf);
190 * mipi_dbi_buf_copy - Copy a framebuffer, transforming it if necessary
191 * @dst: The destination buffer
192 * @fb: The source framebuffer
193 * @clip: Clipping rectangle of the area to be copied
194 * @swap: When true, swap MSB/LSB of 16-bit values
197 * Zero on success, negative error code on failure.
199 int mipi_dbi_buf_copy(void *dst, struct drm_framebuffer *fb,
200 struct drm_rect *clip, bool swap)
202 struct drm_gem_object *gem = drm_gem_fb_get_obj(fb, 0);
203 struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(gem);
204 struct dma_buf_attachment *import_attach = gem->import_attach;
205 struct drm_format_name_buf format_name;
206 void *src = cma_obj->vaddr;
210 ret = dma_buf_begin_cpu_access(import_attach->dmabuf,
216 switch (fb->format->format) {
217 case DRM_FORMAT_RGB565:
219 drm_fb_swab16(dst, src, fb, clip);
221 drm_fb_memcpy(dst, src, fb, clip);
223 case DRM_FORMAT_XRGB8888:
224 drm_fb_xrgb8888_to_rgb565(dst, src, fb, clip, swap);
227 dev_err_once(fb->dev->dev, "Format is not supported: %s\n",
228 drm_get_format_name(fb->format->format,
234 ret = dma_buf_end_cpu_access(import_attach->dmabuf,
238 EXPORT_SYMBOL(mipi_dbi_buf_copy);
240 static void mipi_dbi_set_window_address(struct mipi_dbi_dev *dbidev,
241 unsigned int xs, unsigned int xe,
242 unsigned int ys, unsigned int ye)
244 struct mipi_dbi *dbi = &dbidev->dbi;
246 xs += dbidev->left_offset;
247 xe += dbidev->left_offset;
248 ys += dbidev->top_offset;
249 ye += dbidev->top_offset;
251 mipi_dbi_command(dbi, MIPI_DCS_SET_COLUMN_ADDRESS, (xs >> 8) & 0xff,
252 xs & 0xff, (xe >> 8) & 0xff, xe & 0xff);
253 mipi_dbi_command(dbi, MIPI_DCS_SET_PAGE_ADDRESS, (ys >> 8) & 0xff,
254 ys & 0xff, (ye >> 8) & 0xff, ye & 0xff);
257 static void mipi_dbi_fb_dirty(struct drm_framebuffer *fb, struct drm_rect *rect)
259 struct drm_gem_object *gem = drm_gem_fb_get_obj(fb, 0);
260 struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(gem);
261 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev);
262 unsigned int height = rect->y2 - rect->y1;
263 unsigned int width = rect->x2 - rect->x1;
264 struct mipi_dbi *dbi = &dbidev->dbi;
265 bool swap = dbi->swap_bytes;
270 if (!dbidev->enabled)
273 if (!drm_dev_enter(fb->dev, &idx))
276 full = width == fb->width && height == fb->height;
278 DRM_DEBUG_KMS("Flushing [FB:%d] " DRM_RECT_FMT "\n", fb->base.id, DRM_RECT_ARG(rect));
280 if (!dbi->dc || !full || swap ||
281 fb->format->format == DRM_FORMAT_XRGB8888) {
283 ret = mipi_dbi_buf_copy(dbidev->tx_buf, fb, rect, swap);
290 mipi_dbi_set_window_address(dbidev, rect->x1, rect->x2 - 1, rect->y1,
293 ret = mipi_dbi_command_buf(dbi, MIPI_DCS_WRITE_MEMORY_START, tr,
297 dev_err_once(fb->dev->dev, "Failed to update display %d\n", ret);
303 * mipi_dbi_pipe_update - Display pipe update helper
304 * @pipe: Simple display pipe
305 * @old_state: Old plane state
307 * This function handles framebuffer flushing and vblank events. Drivers can use
308 * this as their &drm_simple_display_pipe_funcs->update callback.
310 void mipi_dbi_pipe_update(struct drm_simple_display_pipe *pipe,
311 struct drm_plane_state *old_state)
313 struct drm_plane_state *state = pipe->plane.state;
314 struct drm_rect rect;
316 if (drm_atomic_helper_damage_merged(old_state, state, &rect))
317 mipi_dbi_fb_dirty(state->fb, &rect);
319 EXPORT_SYMBOL(mipi_dbi_pipe_update);
322 * mipi_dbi_enable_flush - MIPI DBI enable helper
323 * @dbidev: MIPI DBI device structure
324 * @crtc_state: CRTC state
325 * @plane_state: Plane state
327 * This function sets &mipi_dbi->enabled, flushes the whole framebuffer and
328 * enables the backlight. Drivers can use this in their
329 * &drm_simple_display_pipe_funcs->enable callback.
331 * Note: Drivers which don't use mipi_dbi_pipe_update() because they have custom
332 * framebuffer flushing, can't use this function since they both use the same
335 void mipi_dbi_enable_flush(struct mipi_dbi_dev *dbidev,
336 struct drm_crtc_state *crtc_state,
337 struct drm_plane_state *plane_state)
339 struct drm_framebuffer *fb = plane_state->fb;
340 struct drm_rect rect = {
348 if (!drm_dev_enter(&dbidev->drm, &idx))
351 dbidev->enabled = true;
352 mipi_dbi_fb_dirty(fb, &rect);
353 backlight_enable(dbidev->backlight);
357 EXPORT_SYMBOL(mipi_dbi_enable_flush);
359 static void mipi_dbi_blank(struct mipi_dbi_dev *dbidev)
361 struct drm_device *drm = &dbidev->drm;
362 u16 height = drm->mode_config.min_height;
363 u16 width = drm->mode_config.min_width;
364 struct mipi_dbi *dbi = &dbidev->dbi;
365 size_t len = width * height * 2;
368 if (!drm_dev_enter(drm, &idx))
371 memset(dbidev->tx_buf, 0, len);
373 mipi_dbi_set_window_address(dbidev, 0, width - 1, 0, height - 1);
374 mipi_dbi_command_buf(dbi, MIPI_DCS_WRITE_MEMORY_START,
375 (u8 *)dbidev->tx_buf, len);
381 * mipi_dbi_pipe_disable - MIPI DBI pipe disable helper
382 * @pipe: Display pipe
384 * This function disables backlight if present, if not the display memory is
385 * blanked. The regulator is disabled if in use. Drivers can use this as their
386 * &drm_simple_display_pipe_funcs->disable callback.
388 void mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe)
390 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
392 if (!dbidev->enabled)
397 dbidev->enabled = false;
399 if (dbidev->backlight)
400 backlight_disable(dbidev->backlight);
402 mipi_dbi_blank(dbidev);
404 if (dbidev->regulator)
405 regulator_disable(dbidev->regulator);
407 EXPORT_SYMBOL(mipi_dbi_pipe_disable);
409 static int mipi_dbi_connector_get_modes(struct drm_connector *connector)
411 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(connector->dev);
412 struct drm_display_mode *mode;
414 mode = drm_mode_duplicate(connector->dev, &dbidev->mode);
416 DRM_ERROR("Failed to duplicate mode\n");
420 if (mode->name[0] == '\0')
421 drm_mode_set_name(mode);
423 mode->type |= DRM_MODE_TYPE_PREFERRED;
424 drm_mode_probed_add(connector, mode);
426 if (mode->width_mm) {
427 connector->display_info.width_mm = mode->width_mm;
428 connector->display_info.height_mm = mode->height_mm;
434 static const struct drm_connector_helper_funcs mipi_dbi_connector_hfuncs = {
435 .get_modes = mipi_dbi_connector_get_modes,
438 static const struct drm_connector_funcs mipi_dbi_connector_funcs = {
439 .reset = drm_atomic_helper_connector_reset,
440 .fill_modes = drm_helper_probe_single_connector_modes,
441 .destroy = drm_connector_cleanup,
442 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
443 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
446 static int mipi_dbi_rotate_mode(struct drm_display_mode *mode,
447 unsigned int rotation)
449 if (rotation == 0 || rotation == 180) {
451 } else if (rotation == 90 || rotation == 270) {
452 swap(mode->hdisplay, mode->vdisplay);
453 swap(mode->hsync_start, mode->vsync_start);
454 swap(mode->hsync_end, mode->vsync_end);
455 swap(mode->htotal, mode->vtotal);
456 swap(mode->width_mm, mode->height_mm);
463 static const struct drm_mode_config_funcs mipi_dbi_mode_config_funcs = {
464 .fb_create = drm_gem_fb_create_with_dirty,
465 .atomic_check = drm_atomic_helper_check,
466 .atomic_commit = drm_atomic_helper_commit,
469 static const uint32_t mipi_dbi_formats[] = {
475 * mipi_dbi_dev_init_with_formats - MIPI DBI device initialization with custom formats
476 * @dbidev: MIPI DBI device structure to initialize
477 * @funcs: Display pipe functions
478 * @formats: Array of supported formats (DRM_FORMAT\_\*).
479 * @format_count: Number of elements in @formats
480 * @mode: Display mode
481 * @rotation: Initial rotation in degrees Counter Clock Wise
482 * @tx_buf_size: Allocate a transmit buffer of this size.
484 * This function sets up a &drm_simple_display_pipe with a &drm_connector that
485 * has one fixed &drm_display_mode which is rotated according to @rotation.
486 * This mode is used to set the mode config min/max width/height properties.
488 * Use mipi_dbi_dev_init() if you don't need custom formats.
491 * Some of the helper functions expects RGB565 to be the default format and the
492 * transmit buffer sized to fit that.
495 * Zero on success, negative error code on failure.
497 int mipi_dbi_dev_init_with_formats(struct mipi_dbi_dev *dbidev,
498 const struct drm_simple_display_pipe_funcs *funcs,
499 const uint32_t *formats, unsigned int format_count,
500 const struct drm_display_mode *mode,
501 unsigned int rotation, size_t tx_buf_size)
503 static const uint64_t modifiers[] = {
504 DRM_FORMAT_MOD_LINEAR,
505 DRM_FORMAT_MOD_INVALID
507 struct drm_device *drm = &dbidev->drm;
510 if (!dbidev->dbi.command)
513 dbidev->tx_buf = devm_kmalloc(drm->dev, tx_buf_size, GFP_KERNEL);
517 drm_mode_copy(&dbidev->mode, mode);
518 ret = mipi_dbi_rotate_mode(&dbidev->mode, rotation);
520 DRM_ERROR("Illegal rotation value %u\n", rotation);
524 drm_connector_helper_add(&dbidev->connector, &mipi_dbi_connector_hfuncs);
525 ret = drm_connector_init(drm, &dbidev->connector, &mipi_dbi_connector_funcs,
526 DRM_MODE_CONNECTOR_SPI);
530 ret = drm_simple_display_pipe_init(drm, &dbidev->pipe, funcs, formats, format_count,
531 modifiers, &dbidev->connector);
535 drm_plane_enable_fb_damage_clips(&dbidev->pipe.plane);
537 drm->mode_config.funcs = &mipi_dbi_mode_config_funcs;
538 drm->mode_config.min_width = dbidev->mode.hdisplay;
539 drm->mode_config.max_width = dbidev->mode.hdisplay;
540 drm->mode_config.min_height = dbidev->mode.vdisplay;
541 drm->mode_config.max_height = dbidev->mode.vdisplay;
542 dbidev->rotation = rotation;
544 DRM_DEBUG_KMS("rotation = %u\n", rotation);
548 EXPORT_SYMBOL(mipi_dbi_dev_init_with_formats);
551 * mipi_dbi_dev_init - MIPI DBI device initialization
552 * @dbidev: MIPI DBI device structure to initialize
553 * @funcs: Display pipe functions
554 * @mode: Display mode
555 * @rotation: Initial rotation in degrees Counter Clock Wise
557 * This function sets up a &drm_simple_display_pipe with a &drm_connector that
558 * has one fixed &drm_display_mode which is rotated according to @rotation.
559 * This mode is used to set the mode config min/max width/height properties.
560 * Additionally &mipi_dbi.tx_buf is allocated.
562 * Supported formats: Native RGB565 and emulated XRGB8888.
565 * Zero on success, negative error code on failure.
567 int mipi_dbi_dev_init(struct mipi_dbi_dev *dbidev,
568 const struct drm_simple_display_pipe_funcs *funcs,
569 const struct drm_display_mode *mode, unsigned int rotation)
571 size_t bufsize = mode->vdisplay * mode->hdisplay * sizeof(u16);
573 dbidev->drm.mode_config.preferred_depth = 16;
575 return mipi_dbi_dev_init_with_formats(dbidev, funcs, mipi_dbi_formats,
576 ARRAY_SIZE(mipi_dbi_formats), mode,
579 EXPORT_SYMBOL(mipi_dbi_dev_init);
582 * mipi_dbi_release - DRM driver release helper
585 * This function finalizes and frees &mipi_dbi.
587 * Drivers can use this as their &drm_driver->release callback.
589 void mipi_dbi_release(struct drm_device *drm)
591 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(drm);
593 DRM_DEBUG_DRIVER("\n");
595 drm_mode_config_cleanup(drm);
599 EXPORT_SYMBOL(mipi_dbi_release);
602 * mipi_dbi_hw_reset - Hardware reset of controller
603 * @dbi: MIPI DBI structure
605 * Reset controller if the &mipi_dbi->reset gpio is set.
607 void mipi_dbi_hw_reset(struct mipi_dbi *dbi)
612 gpiod_set_value_cansleep(dbi->reset, 0);
613 usleep_range(20, 1000);
614 gpiod_set_value_cansleep(dbi->reset, 1);
617 EXPORT_SYMBOL(mipi_dbi_hw_reset);
620 * mipi_dbi_display_is_on - Check if display is on
621 * @dbi: MIPI DBI structure
623 * This function checks the Power Mode register (if readable) to see if
624 * display output is turned on. This can be used to see if the bootloader
625 * has already turned on the display avoiding flicker when the pipeline is
629 * true if the display can be verified to be on, false otherwise.
631 bool mipi_dbi_display_is_on(struct mipi_dbi *dbi)
635 if (mipi_dbi_command_read(dbi, MIPI_DCS_GET_POWER_MODE, &val))
638 val &= ~DCS_POWER_MODE_RESERVED_MASK;
640 /* The poweron/reset value is 08h DCS_POWER_MODE_DISPLAY_NORMAL_MODE */
641 if (val != (DCS_POWER_MODE_DISPLAY |
642 DCS_POWER_MODE_DISPLAY_NORMAL_MODE | DCS_POWER_MODE_SLEEP_MODE))
645 DRM_DEBUG_DRIVER("Display is ON\n");
649 EXPORT_SYMBOL(mipi_dbi_display_is_on);
651 static int mipi_dbi_poweron_reset_conditional(struct mipi_dbi_dev *dbidev, bool cond)
653 struct device *dev = dbidev->drm.dev;
654 struct mipi_dbi *dbi = &dbidev->dbi;
657 if (dbidev->regulator) {
658 ret = regulator_enable(dbidev->regulator);
660 DRM_DEV_ERROR(dev, "Failed to enable regulator (%d)\n", ret);
665 if (cond && mipi_dbi_display_is_on(dbi))
668 mipi_dbi_hw_reset(dbi);
669 ret = mipi_dbi_command(dbi, MIPI_DCS_SOFT_RESET);
671 DRM_DEV_ERROR(dev, "Failed to send reset command (%d)\n", ret);
672 if (dbidev->regulator)
673 regulator_disable(dbidev->regulator);
678 * If we did a hw reset, we know the controller is in Sleep mode and
679 * per MIPI DSC spec should wait 5ms after soft reset. If we didn't,
680 * we assume worst case and wait 120ms.
683 usleep_range(5000, 20000);
691 * mipi_dbi_poweron_reset - MIPI DBI poweron and reset
692 * @dbidev: MIPI DBI device structure
694 * This function enables the regulator if used and does a hardware and software
698 * Zero on success, or a negative error code.
700 int mipi_dbi_poweron_reset(struct mipi_dbi_dev *dbidev)
702 return mipi_dbi_poweron_reset_conditional(dbidev, false);
704 EXPORT_SYMBOL(mipi_dbi_poweron_reset);
707 * mipi_dbi_poweron_conditional_reset - MIPI DBI poweron and conditional reset
708 * @dbidev: MIPI DBI device structure
710 * This function enables the regulator if used and if the display is off, it
711 * does a hardware and software reset. If mipi_dbi_display_is_on() determines
712 * that the display is on, no reset is performed.
715 * Zero if the controller was reset, 1 if the display was already on, or a
716 * negative error code.
718 int mipi_dbi_poweron_conditional_reset(struct mipi_dbi_dev *dbidev)
720 return mipi_dbi_poweron_reset_conditional(dbidev, true);
722 EXPORT_SYMBOL(mipi_dbi_poweron_conditional_reset);
724 #if IS_ENABLED(CONFIG_SPI)
727 * mipi_dbi_spi_cmd_max_speed - get the maximum SPI bus speed
729 * @len: The transfer buffer length.
731 * Many controllers have a max speed of 10MHz, but can be pushed way beyond
732 * that. Increase reliability by running pixel data at max speed and the rest
733 * at 10MHz, preventing transfer glitches from messing up the init settings.
735 u32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len)
738 return 0; /* use default */
740 return min_t(u32, 10000000, spi->max_speed_hz);
742 EXPORT_SYMBOL(mipi_dbi_spi_cmd_max_speed);
744 static bool mipi_dbi_machine_little_endian(void)
746 #if defined(__LITTLE_ENDIAN)
754 * MIPI DBI Type C Option 1
756 * If the SPI controller doesn't have 9 bits per word support,
757 * use blocks of 9 bytes to send 8x 9-bit words using a 8-bit SPI transfer.
758 * Pad partial blocks with MIPI_DCS_NOP (zero).
759 * This is how the D/C bit (x) is added:
771 static int mipi_dbi_spi1e_transfer(struct mipi_dbi *dbi, int dc,
772 const void *buf, size_t len,
775 bool swap_bytes = (bpw == 16 && mipi_dbi_machine_little_endian());
776 size_t chunk, max_chunk = dbi->tx_buf9_len;
777 struct spi_device *spi = dbi->spi;
778 struct spi_transfer tr = {
779 .tx_buf = dbi->tx_buf9,
782 struct spi_message m;
787 if (drm_debug_enabled(DRM_UT_DRIVER))
788 pr_debug("[drm:%s] dc=%d, max_chunk=%zu, transfers:\n",
789 __func__, dc, max_chunk);
791 tr.speed_hz = mipi_dbi_spi_cmd_max_speed(spi, len);
792 spi_message_init_with_transfers(&m, &tr, 1);
795 if (WARN_ON_ONCE(len != 1))
798 /* Command: pad no-op's (zeroes) at beginning of block */
804 return spi_sync(spi, &m);
807 /* max with room for adding one bit per byte */
808 max_chunk = max_chunk / 9 * 8;
809 /* but no bigger than len */
810 max_chunk = min(max_chunk, len);
812 max_chunk = max_t(size_t, 8, max_chunk & ~0x7);
817 chunk = min(len, max_chunk);
824 /* Data: pad no-op's (zeroes) at end of block */
828 for (i = 1; i < (chunk + 1); i++) {
830 *dst++ = carry | BIT(8 - i) | (val >> i);
831 carry = val << (8 - i);
834 *dst++ = carry | BIT(8 - i) | (val >> i);
835 carry = val << (8 - i);
840 for (i = 1; i < (chunk + 1); i++) {
842 *dst++ = carry | BIT(8 - i) | (val >> i);
843 carry = val << (8 - i);
851 for (i = 0; i < chunk; i += 8) {
853 *dst++ = BIT(7) | (src[1] >> 1);
854 *dst++ = (src[1] << 7) | BIT(6) | (src[0] >> 2);
855 *dst++ = (src[0] << 6) | BIT(5) | (src[3] >> 3);
856 *dst++ = (src[3] << 5) | BIT(4) | (src[2] >> 4);
857 *dst++ = (src[2] << 4) | BIT(3) | (src[5] >> 5);
858 *dst++ = (src[5] << 3) | BIT(2) | (src[4] >> 6);
859 *dst++ = (src[4] << 2) | BIT(1) | (src[7] >> 7);
860 *dst++ = (src[7] << 1) | BIT(0);
863 *dst++ = BIT(7) | (src[0] >> 1);
864 *dst++ = (src[0] << 7) | BIT(6) | (src[1] >> 2);
865 *dst++ = (src[1] << 6) | BIT(5) | (src[2] >> 3);
866 *dst++ = (src[2] << 5) | BIT(4) | (src[3] >> 4);
867 *dst++ = (src[3] << 4) | BIT(3) | (src[4] >> 5);
868 *dst++ = (src[4] << 3) | BIT(2) | (src[5] >> 6);
869 *dst++ = (src[5] << 2) | BIT(1) | (src[6] >> 7);
870 *dst++ = (src[6] << 1) | BIT(0);
879 tr.len = chunk + added;
881 ret = spi_sync(spi, &m);
889 static int mipi_dbi_spi1_transfer(struct mipi_dbi *dbi, int dc,
890 const void *buf, size_t len,
893 struct spi_device *spi = dbi->spi;
894 struct spi_transfer tr = {
897 const u16 *src16 = buf;
898 const u8 *src8 = buf;
899 struct spi_message m;
904 if (!spi_is_bpw_supported(spi, 9))
905 return mipi_dbi_spi1e_transfer(dbi, dc, buf, len, bpw);
907 tr.speed_hz = mipi_dbi_spi_cmd_max_speed(spi, len);
908 max_chunk = dbi->tx_buf9_len;
909 dst16 = dbi->tx_buf9;
911 if (drm_debug_enabled(DRM_UT_DRIVER))
912 pr_debug("[drm:%s] dc=%d, max_chunk=%zu, transfers:\n",
913 __func__, dc, max_chunk);
915 max_chunk = min(max_chunk / 2, len);
917 spi_message_init_with_transfers(&m, &tr, 1);
921 size_t chunk = min(len, max_chunk);
924 if (bpw == 16 && mipi_dbi_machine_little_endian()) {
925 for (i = 0; i < (chunk * 2); i += 2) {
926 dst16[i] = *src16 >> 8;
927 dst16[i + 1] = *src16++ & 0xFF;
930 dst16[i + 1] |= 0x0100;
934 for (i = 0; i < chunk; i++) {
944 ret = spi_sync(spi, &m);
952 static int mipi_dbi_typec1_command(struct mipi_dbi *dbi, u8 *cmd,
953 u8 *parameters, size_t num)
955 unsigned int bpw = (*cmd == MIPI_DCS_WRITE_MEMORY_START) ? 16 : 8;
958 if (mipi_dbi_command_is_read(dbi, *cmd))
961 MIPI_DBI_DEBUG_COMMAND(*cmd, parameters, num);
963 ret = mipi_dbi_spi1_transfer(dbi, 0, cmd, 1, 8);
967 return mipi_dbi_spi1_transfer(dbi, 1, parameters, num, bpw);
970 /* MIPI DBI Type C Option 3 */
972 static int mipi_dbi_typec3_command_read(struct mipi_dbi *dbi, u8 *cmd,
973 u8 *data, size_t len)
975 struct spi_device *spi = dbi->spi;
976 u32 speed_hz = min_t(u32, MIPI_DBI_MAX_SPI_READ_SPEED,
977 spi->max_speed_hz / 2);
978 struct spi_transfer tr[2] = {
980 .speed_hz = speed_hz,
984 .speed_hz = speed_hz,
988 struct spi_message m;
996 * Support non-standard 24-bit and 32-bit Nokia read commands which
997 * start with a dummy clock, so we need to read an extra byte.
999 if (*cmd == MIPI_DCS_GET_DISPLAY_ID ||
1000 *cmd == MIPI_DCS_GET_DISPLAY_STATUS) {
1001 if (!(len == 3 || len == 4))
1004 tr[1].len = len + 1;
1007 buf = kmalloc(tr[1].len, GFP_KERNEL);
1012 gpiod_set_value_cansleep(dbi->dc, 0);
1014 spi_message_init_with_transfers(&m, tr, ARRAY_SIZE(tr));
1015 ret = spi_sync(spi, &m);
1019 if (tr[1].len == len) {
1020 memcpy(data, buf, len);
1024 for (i = 0; i < len; i++)
1025 data[i] = (buf[i] << 1) | (buf[i + 1] >> 7);
1028 MIPI_DBI_DEBUG_COMMAND(*cmd, data, len);
1036 static int mipi_dbi_typec3_command(struct mipi_dbi *dbi, u8 *cmd,
1037 u8 *par, size_t num)
1039 struct spi_device *spi = dbi->spi;
1040 unsigned int bpw = 8;
1044 if (mipi_dbi_command_is_read(dbi, *cmd))
1045 return mipi_dbi_typec3_command_read(dbi, cmd, par, num);
1047 MIPI_DBI_DEBUG_COMMAND(*cmd, par, num);
1049 gpiod_set_value_cansleep(dbi->dc, 0);
1050 speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1);
1051 ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, cmd, 1);
1055 if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !dbi->swap_bytes)
1058 gpiod_set_value_cansleep(dbi->dc, 1);
1059 speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
1061 return mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num);
1065 * mipi_dbi_spi_init - Initialize MIPI DBI SPI interface
1067 * @dbi: MIPI DBI structure to initialize
1068 * @dc: D/C gpio (optional)
1070 * This function sets &mipi_dbi->command, enables &mipi_dbi->read_commands for the
1071 * usual read commands. It should be followed by a call to mipi_dbi_dev_init() or
1072 * a driver-specific init.
1074 * If @dc is set, a Type C Option 3 interface is assumed, if not
1077 * If the SPI master driver doesn't support the necessary bits per word,
1078 * the following transformation is used:
1080 * - 9-bit: reorder buffer as 9x 8-bit words, padded with no-op command.
1081 * - 16-bit: if big endian send as 8-bit, if little endian swap bytes
1084 * Zero on success, negative error code on failure.
1086 int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi,
1087 struct gpio_desc *dc)
1089 struct device *dev = &spi->dev;
1093 * Even though it's not the SPI device that does DMA (the master does),
1094 * the dma mask is necessary for the dma_alloc_wc() in
1095 * drm_gem_cma_create(). The dma_addr returned will be a physical
1096 * address which might be different from the bus address, but this is
1097 * not a problem since the address will not be used.
1098 * The virtual address is used in the transfer and the SPI core
1099 * re-maps it on the SPI master device using the DMA streaming API
1102 if (!dev->coherent_dma_mask) {
1103 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
1105 dev_warn(dev, "Failed to set dma mask %d\n", ret);
1111 dbi->read_commands = mipi_dbi_dcs_read_commands;
1114 dbi->command = mipi_dbi_typec3_command;
1116 if (mipi_dbi_machine_little_endian() && !spi_is_bpw_supported(spi, 16))
1117 dbi->swap_bytes = true;
1119 dbi->command = mipi_dbi_typec1_command;
1120 dbi->tx_buf9_len = SZ_16K;
1121 dbi->tx_buf9 = devm_kmalloc(dev, dbi->tx_buf9_len, GFP_KERNEL);
1126 mutex_init(&dbi->cmdlock);
1128 DRM_DEBUG_DRIVER("SPI speed: %uMHz\n", spi->max_speed_hz / 1000000);
1132 EXPORT_SYMBOL(mipi_dbi_spi_init);
1135 * mipi_dbi_spi_transfer - SPI transfer helper
1137 * @speed_hz: Override speed (optional)
1138 * @bpw: Bits per word
1139 * @buf: Buffer to transfer
1140 * @len: Buffer length
1142 * This SPI transfer helper breaks up the transfer of @buf into chunks which
1143 * the SPI controller driver can handle.
1146 * Zero on success, negative error code on failure.
1148 int mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz,
1149 u8 bpw, const void *buf, size_t len)
1151 size_t max_chunk = spi_max_transfer_size(spi);
1152 struct spi_transfer tr = {
1153 .bits_per_word = bpw,
1154 .speed_hz = speed_hz,
1156 struct spi_message m;
1160 spi_message_init_with_transfers(&m, &tr, 1);
1163 chunk = min(len, max_chunk);
1170 ret = spi_sync(spi, &m);
1177 EXPORT_SYMBOL(mipi_dbi_spi_transfer);
1179 #endif /* CONFIG_SPI */
1181 #ifdef CONFIG_DEBUG_FS
1183 static ssize_t mipi_dbi_debugfs_command_write(struct file *file,
1184 const char __user *ubuf,
1185 size_t count, loff_t *ppos)
1187 struct seq_file *m = file->private_data;
1188 struct mipi_dbi_dev *dbidev = m->private;
1189 u8 val, cmd = 0, parameters[64];
1190 char *buf, *pos, *token;
1193 if (!drm_dev_enter(&dbidev->drm, &idx))
1196 buf = memdup_user_nul(ubuf, count);
1202 /* strip trailing whitespace */
1203 for (i = count - 1; i > 0; i--)
1204 if (isspace(buf[i]))
1211 token = strsep(&pos, " ");
1217 ret = kstrtou8(token, 16, &val);
1224 parameters[i++] = val;
1232 ret = mipi_dbi_command_buf(&dbidev->dbi, cmd, parameters, i);
1239 return ret < 0 ? ret : count;
1242 static int mipi_dbi_debugfs_command_show(struct seq_file *m, void *unused)
1244 struct mipi_dbi_dev *dbidev = m->private;
1245 struct mipi_dbi *dbi = &dbidev->dbi;
1250 if (!drm_dev_enter(&dbidev->drm, &idx))
1253 for (cmd = 0; cmd < 255; cmd++) {
1254 if (!mipi_dbi_command_is_read(dbi, cmd))
1258 case MIPI_DCS_READ_MEMORY_START:
1259 case MIPI_DCS_READ_MEMORY_CONTINUE:
1262 case MIPI_DCS_GET_DISPLAY_ID:
1265 case MIPI_DCS_GET_DISPLAY_STATUS:
1273 seq_printf(m, "%02x: ", cmd);
1274 ret = mipi_dbi_command_buf(dbi, cmd, val, len);
1276 seq_puts(m, "XX\n");
1279 seq_printf(m, "%*phN\n", (int)len, val);
1287 static int mipi_dbi_debugfs_command_open(struct inode *inode,
1290 return single_open(file, mipi_dbi_debugfs_command_show,
1294 static const struct file_operations mipi_dbi_debugfs_command_fops = {
1295 .owner = THIS_MODULE,
1296 .open = mipi_dbi_debugfs_command_open,
1298 .llseek = seq_lseek,
1299 .release = single_release,
1300 .write = mipi_dbi_debugfs_command_write,
1304 * mipi_dbi_debugfs_init - Create debugfs entries
1307 * This function creates a 'command' debugfs file for sending commands to the
1308 * controller or getting the read command values.
1309 * Drivers can use this as their &drm_driver->debugfs_init callback.
1312 * Zero on success, negative error code on failure.
1314 int mipi_dbi_debugfs_init(struct drm_minor *minor)
1316 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(minor->dev);
1317 umode_t mode = S_IFREG | S_IWUSR;
1319 if (dbidev->dbi.read_commands)
1321 debugfs_create_file("command", mode, minor->debugfs_root, dbidev,
1322 &mipi_dbi_debugfs_command_fops);
1326 EXPORT_SYMBOL(mipi_dbi_debugfs_init);
1330 MODULE_LICENSE("GPL");