1 /**************************************************************************
3 * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
31 #include <linux/dma-buf-map.h>
32 #include <linux/export.h>
33 #include <linux/highmem.h>
34 #include <linux/mem_encrypt.h>
37 #include <drm/drm_cache.h>
39 /* A small bounce buffer that fits on the stack. */
40 #define MEMCPY_BOUNCE_SIZE 128
42 #if defined(CONFIG_X86)
46 * clflushopt is an unordered instruction which needs fencing with mfence or
47 * sfence to avoid ordering issues. For drm_clflush_page this fencing happens
51 drm_clflush_page(struct page *page)
53 uint8_t *page_virtual;
55 const int size = boot_cpu_data.x86_clflush_size;
57 if (unlikely(page == NULL))
60 page_virtual = kmap_atomic(page);
61 for (i = 0; i < PAGE_SIZE; i += size)
62 clflushopt(page_virtual + i);
63 kunmap_atomic(page_virtual);
66 static void drm_cache_flush_clflush(struct page *pages[],
67 unsigned long num_pages)
71 mb(); /*Full memory barrier used before so that CLFLUSH is ordered*/
72 for (i = 0; i < num_pages; i++)
73 drm_clflush_page(*pages++);
74 mb(); /*Also used after CLFLUSH so that all cache is flushed*/
79 * drm_clflush_pages - Flush dcache lines of a set of pages.
80 * @pages: List of pages to be flushed.
81 * @num_pages: Number of pages in the array.
83 * Flush every data cache line entry that points to an address belonging
84 * to a page in the array.
87 drm_clflush_pages(struct page *pages[], unsigned long num_pages)
90 #if defined(CONFIG_X86)
91 if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
92 drm_cache_flush_clflush(pages, num_pages);
96 if (wbinvd_on_all_cpus())
97 pr_err("Timed out waiting for cache flush\n");
99 #elif defined(__powerpc__)
102 for (i = 0; i < num_pages; i++) {
103 struct page *page = pages[i];
106 if (unlikely(page == NULL))
109 page_virtual = kmap_atomic(page);
110 flush_dcache_range((unsigned long)page_virtual,
111 (unsigned long)page_virtual + PAGE_SIZE);
112 kunmap_atomic(page_virtual);
115 pr_err("Architecture has no drm_cache.c support\n");
119 EXPORT_SYMBOL(drm_clflush_pages);
122 * drm_clflush_sg - Flush dcache lines pointing to a scather-gather.
123 * @st: struct sg_table.
125 * Flush every data cache line entry that points to an address in the
129 drm_clflush_sg(struct sg_table *st)
131 #if defined(CONFIG_X86)
132 if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
133 struct sg_page_iter sg_iter;
135 mb(); /*CLFLUSH is ordered only by using memory barriers*/
136 for_each_sgtable_page(st, &sg_iter, 0)
137 drm_clflush_page(sg_page_iter_page(&sg_iter));
138 mb(); /*Make sure that all cache line entry is flushed*/
143 if (wbinvd_on_all_cpus())
144 pr_err("Timed out waiting for cache flush\n");
146 pr_err("Architecture has no drm_cache.c support\n");
150 EXPORT_SYMBOL(drm_clflush_sg);
153 * drm_clflush_virt_range - Flush dcache lines of a region
154 * @addr: Initial kernel memory address.
155 * @length: Region size.
157 * Flush every data cache line entry that points to an address in the
161 drm_clflush_virt_range(void *addr, unsigned long length)
163 #if defined(CONFIG_X86)
164 if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
165 const int size = boot_cpu_data.x86_clflush_size;
166 void *end = addr + length;
168 addr = (void *)(((unsigned long)addr) & -size);
169 mb(); /*CLFLUSH is only ordered with a full memory barrier*/
170 for (; addr < end; addr += size)
172 clflushopt(end - 1); /* force serialisation */
173 mb(); /*Ensure that evry data cache line entry is flushed*/
177 if (wbinvd_on_all_cpus())
178 pr_err("Timed out waiting for cache flush\n");
180 pr_err("Architecture has no drm_cache.c support\n");
184 EXPORT_SYMBOL(drm_clflush_virt_range);
186 bool drm_need_swiotlb(int dma_bits)
188 struct resource *tmp;
189 resource_size_t max_iomem = 0;
192 * Xen paravirtual hosts require swiotlb regardless of requested dma
195 * NOTE: Really, what it requires is use of the dma_alloc_coherent
196 * allocator used in ttm_dma_populate() instead of
197 * ttm_populate_and_map_pages(), which bounce buffers so much in
198 * Xen it leads to swiotlb buffer exhaustion.
204 * Enforce dma_alloc_coherent when memory encryption is active as well
205 * for the same reasons as for Xen paravirtual hosts.
207 if (mem_encrypt_active())
210 for (tmp = iomem_resource.child; tmp; tmp = tmp->sibling)
211 max_iomem = max(max_iomem, tmp->end);
213 return max_iomem > ((u64)1 << dma_bits);
215 EXPORT_SYMBOL(drm_need_swiotlb);
217 static void memcpy_fallback(struct dma_buf_map *dst,
218 const struct dma_buf_map *src,
221 if (!dst->is_iomem && !src->is_iomem) {
222 memcpy(dst->vaddr, src->vaddr, len);
223 } else if (!src->is_iomem) {
224 dma_buf_map_memcpy_to(dst, src->vaddr, len);
225 } else if (!dst->is_iomem) {
226 memcpy_fromio(dst->vaddr, src->vaddr_iomem, len);
229 * Bounce size is not performance tuned, but using a
230 * bounce buffer like this is significantly faster than
231 * resorting to ioreadxx() + iowritexx().
233 char bounce[MEMCPY_BOUNCE_SIZE];
234 void __iomem *_src = src->vaddr_iomem;
235 void __iomem *_dst = dst->vaddr_iomem;
237 while (len >= MEMCPY_BOUNCE_SIZE) {
238 memcpy_fromio(bounce, _src, MEMCPY_BOUNCE_SIZE);
239 memcpy_toio(_dst, bounce, MEMCPY_BOUNCE_SIZE);
240 _src += MEMCPY_BOUNCE_SIZE;
241 _dst += MEMCPY_BOUNCE_SIZE;
242 len -= MEMCPY_BOUNCE_SIZE;
245 memcpy_fromio(bounce, _src, MEMCPY_BOUNCE_SIZE);
246 memcpy_toio(_dst, bounce, MEMCPY_BOUNCE_SIZE);
253 static DEFINE_STATIC_KEY_FALSE(has_movntdqa);
255 static void __memcpy_ntdqa(void *dst, const void *src, unsigned long len)
260 asm("movntdqa (%0), %%xmm0\n"
261 "movntdqa 16(%0), %%xmm1\n"
262 "movntdqa 32(%0), %%xmm2\n"
263 "movntdqa 48(%0), %%xmm3\n"
264 "movaps %%xmm0, (%1)\n"
265 "movaps %%xmm1, 16(%1)\n"
266 "movaps %%xmm2, 32(%1)\n"
267 "movaps %%xmm3, 48(%1)\n"
268 :: "r" (src), "r" (dst) : "memory");
274 asm("movntdqa (%0), %%xmm0\n"
275 "movaps %%xmm0, (%1)\n"
276 :: "r" (src), "r" (dst) : "memory");
285 * __drm_memcpy_from_wc copies @len bytes from @src to @dst using
286 * non-temporal instructions where available. Note that all arguments
287 * (@src, @dst) must be aligned to 16 bytes and @len must be a multiple
290 static void __drm_memcpy_from_wc(void *dst, const void *src, unsigned long len)
292 if (unlikely(((unsigned long)dst | (unsigned long)src | len) & 15))
293 memcpy(dst, src, len);
294 else if (likely(len))
295 __memcpy_ntdqa(dst, src, len >> 4);
299 * drm_memcpy_from_wc - Perform the fastest available memcpy from a source
301 * @dst: The destination pointer
302 * @src: The source pointer
303 * @len: The size of the area o transfer in bytes
305 * Tries an arch optimized memcpy for prefetching reading out of a WC region,
306 * and if no such beast is available, falls back to a normal memcpy.
308 void drm_memcpy_from_wc(struct dma_buf_map *dst,
309 const struct dma_buf_map *src,
312 if (WARN_ON(in_interrupt())) {
313 memcpy_fallback(dst, src, len);
317 if (static_branch_likely(&has_movntdqa)) {
318 __drm_memcpy_from_wc(dst->is_iomem ?
319 (void __force *)dst->vaddr_iomem :
322 (void const __force *)src->vaddr_iomem :
328 memcpy_fallback(dst, src, len);
330 EXPORT_SYMBOL(drm_memcpy_from_wc);
333 * drm_memcpy_init_early - One time initialization of the WC memcpy code
335 void drm_memcpy_init_early(void)
338 * Some hypervisors (e.g. KVM) don't support VEX-prefix instructions
339 * emulation. So don't enable movntdqa in hypervisor guest.
341 if (static_cpu_has(X86_FEATURE_XMM4_1) &&
342 !boot_cpu_has(X86_FEATURE_HYPERVISOR))
343 static_branch_enable(&has_movntdqa);
346 void drm_memcpy_from_wc(struct dma_buf_map *dst,
347 const struct dma_buf_map *src,
350 WARN_ON(in_interrupt());
352 memcpy_fallback(dst, src, len);
354 EXPORT_SYMBOL(drm_memcpy_from_wc);
356 void drm_memcpy_init_early(void)
359 #endif /* CONFIG_X86 */