1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2012-2019 Red Hat
5 * This file is subject to the terms and conditions of the GNU General
6 * Public License version 2. See the file COPYING in the main
7 * directory of this archive for more details.
9 * Authors: Matthew Garrett
13 * Portions of this code derived from cirrusfb.c:
14 * drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets
16 * Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
19 #include <linux/console.h>
20 #include <linux/module.h>
21 #include <linux/pci.h>
23 #include <video/cirrus.h>
24 #include <video/vga.h>
26 #include <drm/drm_atomic_helper.h>
27 #include <drm/drm_atomic_state_helper.h>
28 #include <drm/drm_connector.h>
29 #include <drm/drm_damage_helper.h>
30 #include <drm/drm_drv.h>
31 #include <drm/drm_fb_helper.h>
32 #include <drm/drm_file.h>
33 #include <drm/drm_format_helper.h>
34 #include <drm/drm_fourcc.h>
35 #include <drm/drm_gem_shmem_helper.h>
36 #include <drm/drm_gem_framebuffer_helper.h>
37 #include <drm/drm_ioctl.h>
38 #include <drm/drm_managed.h>
39 #include <drm/drm_modeset_helper_vtables.h>
40 #include <drm/drm_probe_helper.h>
41 #include <drm/drm_simple_kms_helper.h>
43 #define DRIVER_NAME "cirrus"
44 #define DRIVER_DESC "qemu cirrus vga"
45 #define DRIVER_DATE "2019"
46 #define DRIVER_MAJOR 2
47 #define DRIVER_MINOR 0
49 #define CIRRUS_MAX_PITCH (0x1FF << 3) /* (4096 - 1) & ~111b bytes */
50 #define CIRRUS_VRAM_SIZE (4 * 1024 * 1024) /* 4 MB */
52 struct cirrus_device {
53 struct drm_device dev;
54 struct drm_simple_display_pipe pipe;
55 struct drm_connector conn;
62 /* ------------------------------------------------------------------ */
64 * The meat of this driver. The core passes us a mode and we have to program
65 * it. The modesetting here is the bare minimum required to satisfy the qemu
66 * emulation of this hardware, and running this against a real device is
67 * likely to result in an inadequately programmed mode. We've already had
68 * the opportunity to modify the mode, so whatever we receive here should
69 * be something that can be correctly programmed and displayed
75 static u8 rreg_seq(struct cirrus_device *cirrus, u8 reg)
77 iowrite8(reg, cirrus->mmio + SEQ_INDEX);
78 return ioread8(cirrus->mmio + SEQ_DATA);
81 static void wreg_seq(struct cirrus_device *cirrus, u8 reg, u8 val)
83 iowrite8(reg, cirrus->mmio + SEQ_INDEX);
84 iowrite8(val, cirrus->mmio + SEQ_DATA);
87 #define CRT_INDEX 0x14
90 static u8 rreg_crt(struct cirrus_device *cirrus, u8 reg)
92 iowrite8(reg, cirrus->mmio + CRT_INDEX);
93 return ioread8(cirrus->mmio + CRT_DATA);
96 static void wreg_crt(struct cirrus_device *cirrus, u8 reg, u8 val)
98 iowrite8(reg, cirrus->mmio + CRT_INDEX);
99 iowrite8(val, cirrus->mmio + CRT_DATA);
102 #define GFX_INDEX 0xe
105 static void wreg_gfx(struct cirrus_device *cirrus, u8 reg, u8 val)
107 iowrite8(reg, cirrus->mmio + GFX_INDEX);
108 iowrite8(val, cirrus->mmio + GFX_DATA);
111 #define VGA_DAC_MASK 0x06
113 static void wreg_hdr(struct cirrus_device *cirrus, u8 val)
115 ioread8(cirrus->mmio + VGA_DAC_MASK);
116 ioread8(cirrus->mmio + VGA_DAC_MASK);
117 ioread8(cirrus->mmio + VGA_DAC_MASK);
118 ioread8(cirrus->mmio + VGA_DAC_MASK);
119 iowrite8(val, cirrus->mmio + VGA_DAC_MASK);
122 static int cirrus_convert_to(struct drm_framebuffer *fb)
124 if (fb->format->cpp[0] == 4 && fb->pitches[0] > CIRRUS_MAX_PITCH) {
125 if (fb->width * 3 <= CIRRUS_MAX_PITCH)
126 /* convert from XR24 to RG24 */
129 /* convert from XR24 to RG16 */
135 static int cirrus_cpp(struct drm_framebuffer *fb)
137 int convert_cpp = cirrus_convert_to(fb);
141 return fb->format->cpp[0];
144 static int cirrus_pitch(struct drm_framebuffer *fb)
146 int convert_cpp = cirrus_convert_to(fb);
149 return convert_cpp * fb->width;
150 return fb->pitches[0];
153 static void cirrus_set_start_address(struct cirrus_device *cirrus, u32 offset)
159 if (!drm_dev_enter(&cirrus->dev, &idx))
163 wreg_crt(cirrus, 0x0c, (u8)((addr >> 8) & 0xff));
164 wreg_crt(cirrus, 0x0d, (u8)(addr & 0xff));
166 tmp = rreg_crt(cirrus, 0x1b);
168 tmp |= (addr >> 16) & 0x01;
169 tmp |= (addr >> 15) & 0x0c;
170 wreg_crt(cirrus, 0x1b, tmp);
172 tmp = rreg_crt(cirrus, 0x1d);
174 tmp |= (addr >> 12) & 0x80;
175 wreg_crt(cirrus, 0x1d, tmp);
180 static int cirrus_mode_set(struct cirrus_device *cirrus,
181 struct drm_display_mode *mode,
182 struct drm_framebuffer *fb)
184 int hsyncstart, hsyncend, htotal, hdispend;
185 int vtotal, vdispend;
187 int sr07 = 0, hdr = 0;
189 if (!drm_dev_enter(&cirrus->dev, &idx))
192 htotal = mode->htotal / 8;
193 hsyncend = mode->hsync_end / 8;
194 hsyncstart = mode->hsync_start / 8;
195 hdispend = mode->hdisplay / 8;
197 vtotal = mode->vtotal;
198 vdispend = mode->vdisplay;
208 wreg_crt(cirrus, VGA_CRTC_V_SYNC_END, 0x20);
209 wreg_crt(cirrus, VGA_CRTC_H_TOTAL, htotal);
210 wreg_crt(cirrus, VGA_CRTC_H_DISP, hdispend);
211 wreg_crt(cirrus, VGA_CRTC_H_SYNC_START, hsyncstart);
212 wreg_crt(cirrus, VGA_CRTC_H_SYNC_END, hsyncend);
213 wreg_crt(cirrus, VGA_CRTC_V_TOTAL, vtotal & 0xff);
214 wreg_crt(cirrus, VGA_CRTC_V_DISP_END, vdispend & 0xff);
217 if ((vdispend + 1) & 512)
219 wreg_crt(cirrus, VGA_CRTC_MAX_SCAN, tmp);
222 * Overflow bits for values that don't fit in the standard registers
227 if (vdispend & 0x100)
229 if ((vdispend + 1) & 0x100)
233 if (vdispend & 0x200)
235 wreg_crt(cirrus, VGA_CRTC_OVERFLOW, tmp);
239 /* More overflow bits */
241 if ((htotal + 5) & 0x40)
243 if ((htotal + 5) & 0x80)
250 wreg_crt(cirrus, CL_CRT1A, tmp);
252 /* Disable Hercules/CGA compatibility */
253 wreg_crt(cirrus, VGA_CRTC_MODE, 0x03);
255 sr07 = rreg_seq(cirrus, 0x07);
259 cirrus->cpp = cirrus_cpp(fb);
260 switch (cirrus->cpp * 8) {
281 wreg_seq(cirrus, 0x7, sr07);
283 /* Program the pitch */
284 cirrus->pitch = cirrus_pitch(fb);
285 tmp = cirrus->pitch / 8;
286 wreg_crt(cirrus, VGA_CRTC_OFFSET, tmp);
288 /* Enable extended blanking and pitch bits, and enable full memory */
290 tmp |= (cirrus->pitch >> 7) & 0x10;
291 tmp |= (cirrus->pitch >> 6) & 0x40;
292 wreg_crt(cirrus, 0x1b, tmp);
294 /* Enable high-colour modes */
295 wreg_gfx(cirrus, VGA_GFX_MODE, 0x40);
297 /* And set graphics mode */
298 wreg_gfx(cirrus, VGA_GFX_MISC, 0x01);
300 wreg_hdr(cirrus, hdr);
302 cirrus_set_start_address(cirrus, 0);
304 /* Unblank (needed on S3 resume, vgabios doesn't do it then) */
311 static int cirrus_fb_blit_rect(struct drm_framebuffer *fb,
312 struct drm_rect *rect)
314 struct cirrus_device *cirrus = fb->dev->dev_private;
319 if (!drm_dev_enter(&cirrus->dev, &idx))
323 vmap = drm_gem_shmem_vmap(fb->obj[0]);
327 if (cirrus->cpp == fb->format->cpp[0])
328 drm_fb_memcpy_dstclip(cirrus->vram,
331 else if (fb->format->cpp[0] == 4 && cirrus->cpp == 2)
332 drm_fb_xrgb8888_to_rgb565_dstclip(cirrus->vram,
334 vmap, fb, rect, false);
336 else if (fb->format->cpp[0] == 4 && cirrus->cpp == 3)
337 drm_fb_xrgb8888_to_rgb888_dstclip(cirrus->vram,
342 WARN_ON_ONCE("cpp mismatch");
344 drm_gem_shmem_vunmap(fb->obj[0], vmap);
353 static int cirrus_fb_blit_fullscreen(struct drm_framebuffer *fb)
355 struct drm_rect fullscreen = {
361 return cirrus_fb_blit_rect(fb, &fullscreen);
364 static int cirrus_check_size(int width, int height,
365 struct drm_framebuffer *fb)
367 int pitch = width * 2;
370 pitch = cirrus_pitch(fb);
372 if (pitch > CIRRUS_MAX_PITCH)
374 if (pitch * height > CIRRUS_VRAM_SIZE)
379 /* ------------------------------------------------------------------ */
380 /* cirrus connector */
382 static int cirrus_conn_get_modes(struct drm_connector *conn)
386 count = drm_add_modes_noedid(conn,
387 conn->dev->mode_config.max_width,
388 conn->dev->mode_config.max_height);
389 drm_set_preferred_mode(conn, 1024, 768);
393 static const struct drm_connector_helper_funcs cirrus_conn_helper_funcs = {
394 .get_modes = cirrus_conn_get_modes,
397 static const struct drm_connector_funcs cirrus_conn_funcs = {
398 .fill_modes = drm_helper_probe_single_connector_modes,
399 .destroy = drm_connector_cleanup,
400 .reset = drm_atomic_helper_connector_reset,
401 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
402 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
405 static int cirrus_conn_init(struct cirrus_device *cirrus)
407 drm_connector_helper_add(&cirrus->conn, &cirrus_conn_helper_funcs);
408 return drm_connector_init(&cirrus->dev, &cirrus->conn,
409 &cirrus_conn_funcs, DRM_MODE_CONNECTOR_VGA);
413 /* ------------------------------------------------------------------ */
414 /* cirrus (simple) display pipe */
416 static enum drm_mode_status cirrus_pipe_mode_valid(struct drm_simple_display_pipe *pipe,
417 const struct drm_display_mode *mode)
419 if (cirrus_check_size(mode->hdisplay, mode->vdisplay, NULL) < 0)
424 static int cirrus_pipe_check(struct drm_simple_display_pipe *pipe,
425 struct drm_plane_state *plane_state,
426 struct drm_crtc_state *crtc_state)
428 struct drm_framebuffer *fb = plane_state->fb;
432 return cirrus_check_size(fb->width, fb->height, fb);
435 static void cirrus_pipe_enable(struct drm_simple_display_pipe *pipe,
436 struct drm_crtc_state *crtc_state,
437 struct drm_plane_state *plane_state)
439 struct cirrus_device *cirrus = pipe->crtc.dev->dev_private;
441 cirrus_mode_set(cirrus, &crtc_state->mode, plane_state->fb);
442 cirrus_fb_blit_fullscreen(plane_state->fb);
445 static void cirrus_pipe_update(struct drm_simple_display_pipe *pipe,
446 struct drm_plane_state *old_state)
448 struct cirrus_device *cirrus = pipe->crtc.dev->dev_private;
449 struct drm_plane_state *state = pipe->plane.state;
450 struct drm_crtc *crtc = &pipe->crtc;
451 struct drm_rect rect;
453 if (pipe->plane.state->fb &&
454 cirrus->cpp != cirrus_cpp(pipe->plane.state->fb))
455 cirrus_mode_set(cirrus, &crtc->mode,
456 pipe->plane.state->fb);
458 if (drm_atomic_helper_damage_merged(old_state, state, &rect))
459 cirrus_fb_blit_rect(pipe->plane.state->fb, &rect);
462 static const struct drm_simple_display_pipe_funcs cirrus_pipe_funcs = {
463 .mode_valid = cirrus_pipe_mode_valid,
464 .check = cirrus_pipe_check,
465 .enable = cirrus_pipe_enable,
466 .update = cirrus_pipe_update,
469 static const uint32_t cirrus_formats[] = {
475 static const uint64_t cirrus_modifiers[] = {
476 DRM_FORMAT_MOD_LINEAR,
477 DRM_FORMAT_MOD_INVALID
480 static int cirrus_pipe_init(struct cirrus_device *cirrus)
482 return drm_simple_display_pipe_init(&cirrus->dev,
486 ARRAY_SIZE(cirrus_formats),
491 /* ------------------------------------------------------------------ */
492 /* cirrus framebuffers & mode config */
494 static struct drm_framebuffer*
495 cirrus_fb_create(struct drm_device *dev, struct drm_file *file_priv,
496 const struct drm_mode_fb_cmd2 *mode_cmd)
498 if (mode_cmd->pixel_format != DRM_FORMAT_RGB565 &&
499 mode_cmd->pixel_format != DRM_FORMAT_RGB888 &&
500 mode_cmd->pixel_format != DRM_FORMAT_XRGB8888)
501 return ERR_PTR(-EINVAL);
502 if (cirrus_check_size(mode_cmd->width, mode_cmd->height, NULL) < 0)
503 return ERR_PTR(-EINVAL);
504 return drm_gem_fb_create_with_dirty(dev, file_priv, mode_cmd);
507 static const struct drm_mode_config_funcs cirrus_mode_config_funcs = {
508 .fb_create = cirrus_fb_create,
509 .atomic_check = drm_atomic_helper_check,
510 .atomic_commit = drm_atomic_helper_commit,
513 static int cirrus_mode_config_init(struct cirrus_device *cirrus)
515 struct drm_device *dev = &cirrus->dev;
518 ret = drmm_mode_config_init(dev);
522 dev->mode_config.min_width = 0;
523 dev->mode_config.min_height = 0;
524 dev->mode_config.max_width = CIRRUS_MAX_PITCH / 2;
525 dev->mode_config.max_height = 1024;
526 dev->mode_config.preferred_depth = 16;
527 dev->mode_config.prefer_shadow = 0;
528 dev->mode_config.funcs = &cirrus_mode_config_funcs;
533 /* ------------------------------------------------------------------ */
535 DEFINE_DRM_GEM_FOPS(cirrus_fops);
537 static struct drm_driver cirrus_driver = {
538 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
543 .major = DRIVER_MAJOR,
544 .minor = DRIVER_MINOR,
546 .fops = &cirrus_fops,
547 DRM_GEM_SHMEM_DRIVER_OPS,
550 static int cirrus_pci_probe(struct pci_dev *pdev,
551 const struct pci_device_id *ent)
553 struct drm_device *dev;
554 struct cirrus_device *cirrus;
557 ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, "cirrusdrmfb");
561 ret = pcim_enable_device(pdev);
565 ret = pci_request_regions(pdev, DRIVER_NAME);
570 cirrus = kzalloc(sizeof(*cirrus), GFP_KERNEL);
575 ret = devm_drm_dev_init(&pdev->dev, dev, &cirrus_driver);
580 dev->dev_private = cirrus;
581 drmm_add_final_kfree(dev, cirrus);
583 cirrus->vram = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 0),
584 pci_resource_len(pdev, 0));
585 if (cirrus->vram == NULL)
588 cirrus->mmio = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 1),
589 pci_resource_len(pdev, 1));
590 if (cirrus->mmio == NULL)
593 ret = cirrus_mode_config_init(cirrus);
597 ret = cirrus_conn_init(cirrus);
601 ret = cirrus_pipe_init(cirrus);
605 drm_mode_config_reset(dev);
608 pci_set_drvdata(pdev, dev);
609 ret = drm_dev_register(dev, 0);
613 drm_fbdev_generic_setup(dev, dev->mode_config.preferred_depth);
617 static void cirrus_pci_remove(struct pci_dev *pdev)
619 struct drm_device *dev = pci_get_drvdata(pdev);
622 drm_atomic_helper_shutdown(dev);
625 static const struct pci_device_id pciidlist[] = {
627 .vendor = PCI_VENDOR_ID_CIRRUS,
628 .device = PCI_DEVICE_ID_CIRRUS_5446,
629 /* only bind to the cirrus chip in qemu */
630 .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
631 .subdevice = PCI_SUBDEVICE_ID_QEMU,
633 .vendor = PCI_VENDOR_ID_CIRRUS,
634 .device = PCI_DEVICE_ID_CIRRUS_5446,
635 .subvendor = PCI_VENDOR_ID_XEN,
638 { /* end if list */ }
641 static struct pci_driver cirrus_pci_driver = {
643 .id_table = pciidlist,
644 .probe = cirrus_pci_probe,
645 .remove = cirrus_pci_remove,
648 static int __init cirrus_init(void)
650 if (vgacon_text_force())
652 return pci_register_driver(&cirrus_pci_driver);
655 static void __exit cirrus_exit(void)
657 pci_unregister_driver(&cirrus_pci_driver);
660 module_init(cirrus_init);
661 module_exit(cirrus_exit);
663 MODULE_DEVICE_TABLE(pci, pciidlist);
664 MODULE_LICENSE("GPL");