2 * Copyright 2012 Red Hat Inc.
3 * Parts based on xf86-video-ast
4 * Copyright (c) 2005 ASPEED Technology Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
28 * Authors: Dave Airlie <airlied@redhat.com>
31 #include <linux/export.h>
32 #include <linux/pci.h>
34 #include <drm/drm_crtc.h>
35 #include <drm/drm_crtc_helper.h>
36 #include <drm/drm_fourcc.h>
37 #include <drm/drm_gem_vram_helper.h>
38 #include <drm/drm_plane_helper.h>
39 #include <drm/drm_probe_helper.h>
42 #include "ast_tables.h"
44 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
45 static void ast_i2c_destroy(struct ast_i2c_chan *i2c);
46 static int ast_cursor_set(struct drm_crtc *crtc,
47 struct drm_file *file_priv,
51 static int ast_cursor_move(struct drm_crtc *crtc,
54 static inline void ast_load_palette_index(struct ast_private *ast,
55 u8 index, u8 red, u8 green,
58 ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);
59 ast_io_read8(ast, AST_IO_SEQ_PORT);
60 ast_io_write8(ast, AST_IO_DAC_DATA, red);
61 ast_io_read8(ast, AST_IO_SEQ_PORT);
62 ast_io_write8(ast, AST_IO_DAC_DATA, green);
63 ast_io_read8(ast, AST_IO_SEQ_PORT);
64 ast_io_write8(ast, AST_IO_DAC_DATA, blue);
65 ast_io_read8(ast, AST_IO_SEQ_PORT);
68 static void ast_crtc_load_lut(struct drm_crtc *crtc)
70 struct ast_private *ast = crtc->dev->dev_private;
77 r = crtc->gamma_store;
78 g = r + crtc->gamma_size;
79 b = g + crtc->gamma_size;
81 for (i = 0; i < 256; i++)
82 ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8);
85 static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode,
86 struct drm_display_mode *adjusted_mode,
87 struct ast_vbios_mode_info *vbios_mode)
89 struct ast_private *ast = crtc->dev->dev_private;
90 const struct drm_framebuffer *fb = crtc->primary->fb;
91 u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate;
92 const struct ast_vbios_enhtable *best = NULL;
96 switch (fb->format->cpp[0] * 8) {
98 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
99 color_index = VGAModeIndex - 1;
102 vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
103 color_index = HiCModeIndex;
107 vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
108 color_index = TrueCModeIndex;
114 switch (crtc->mode.crtc_hdisplay) {
116 vbios_mode->enh_table = &res_640x480[refresh_rate_index];
119 vbios_mode->enh_table = &res_800x600[refresh_rate_index];
122 vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
125 if (crtc->mode.crtc_vdisplay == 800)
126 vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
128 vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
131 vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
134 vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
137 if (crtc->mode.crtc_vdisplay == 900)
138 vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
140 vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
143 vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
146 if (crtc->mode.crtc_vdisplay == 1080)
147 vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
149 vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
155 refresh_rate = drm_mode_vrefresh(mode);
156 check_sync = vbios_mode->enh_table->flags & WideScreenMode;
158 const struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
160 while (loop->refresh_rate != 0xff) {
162 (((mode->flags & DRM_MODE_FLAG_NVSYNC) &&
163 (loop->flags & PVSync)) ||
164 ((mode->flags & DRM_MODE_FLAG_PVSYNC) &&
165 (loop->flags & NVSync)) ||
166 ((mode->flags & DRM_MODE_FLAG_NHSYNC) &&
167 (loop->flags & PHSync)) ||
168 ((mode->flags & DRM_MODE_FLAG_PHSYNC) &&
169 (loop->flags & NHSync)))) {
173 if (loop->refresh_rate <= refresh_rate
174 && (!best || loop->refresh_rate > best->refresh_rate))
178 if (best || !check_sync)
183 vbios_mode->enh_table = best;
185 hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
186 vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
188 adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
189 adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
190 adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
191 adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
192 vbios_mode->enh_table->hfp;
193 adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
194 vbios_mode->enh_table->hfp +
195 vbios_mode->enh_table->hsync);
197 adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
198 adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
199 adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
200 adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
201 vbios_mode->enh_table->vfp;
202 adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
203 vbios_mode->enh_table->vfp +
204 vbios_mode->enh_table->vsync);
206 refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
207 mode_id = vbios_mode->enh_table->mode_id;
209 if (ast->chip == AST1180) {
212 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4));
213 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);
214 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);
216 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
217 if (vbios_mode->enh_table->flags & NewModeInfo) {
218 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
219 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92,
220 fb->format->cpp[0] * 8);
221 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);
222 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);
223 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);
225 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);
226 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);
234 static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
235 struct ast_vbios_mode_info *vbios_mode)
237 struct ast_private *ast = crtc->dev->dev_private;
238 const struct ast_vbios_stdtable *stdtable;
242 stdtable = vbios_mode->std_table;
244 jreg = stdtable->misc;
245 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
248 ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);
249 for (i = 0; i < 4; i++) {
250 jreg = stdtable->seq[i];
253 ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);
256 /* Set CRTC; except base address and offset */
257 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
258 for (i = 0; i < 12; i++)
259 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
260 for (i = 14; i < 19; i++)
261 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
262 for (i = 20; i < 25; i++)
263 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
266 jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
267 for (i = 0; i < 20; i++) {
268 jreg = stdtable->ar[i];
269 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);
270 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
272 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);
273 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);
275 jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
276 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);
279 for (i = 0; i < 9; i++)
280 ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);
283 static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
284 struct ast_vbios_mode_info *vbios_mode)
286 struct ast_private *ast = crtc->dev->dev_private;
287 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
288 u16 temp, precache = 0;
290 if ((ast->chip == AST2500) &&
291 (vbios_mode->enh_table->flags & AST2500PreCatchCRT))
294 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
296 temp = (mode->crtc_htotal >> 3) - 5;
298 jregAC |= 0x01; /* HT D[8] */
299 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);
301 temp = (mode->crtc_hdisplay >> 3) - 1;
303 jregAC |= 0x04; /* HDE D[8] */
304 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);
306 temp = (mode->crtc_hblank_start >> 3) - 1;
308 jregAC |= 0x10; /* HBS D[8] */
309 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);
311 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
313 jreg05 |= 0x80; /* HBE D[5] */
315 jregAD |= 0x01; /* HBE D[5] */
316 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));
318 temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
320 jregAC |= 0x40; /* HRS D[5] */
321 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);
323 temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f;
325 jregAD |= 0x04; /* HRE D[5] */
326 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
328 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);
329 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);
332 temp = (mode->crtc_vtotal) - 2;
339 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);
341 temp = (mode->crtc_vsync_start) - 1;
348 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);
350 temp = (mode->crtc_vsync_end - 1) & 0x3f;
355 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);
357 temp = mode->crtc_vdisplay - 1;
364 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);
366 temp = mode->crtc_vblank_start - 1;
373 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);
375 temp = mode->crtc_vblank_end - 1;
378 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);
380 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);
381 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);
382 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));
385 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80);
387 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00);
389 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);
392 static void ast_set_offset_reg(struct drm_crtc *crtc)
394 struct ast_private *ast = crtc->dev->dev_private;
395 const struct drm_framebuffer *fb = crtc->primary->fb;
399 offset = fb->pitches[0] >> 3;
400 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
401 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
404 static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode,
405 struct ast_vbios_mode_info *vbios_mode)
407 struct ast_private *ast = dev->dev_private;
408 const struct ast_vbios_dclk_info *clk_info;
410 if (ast->chip == AST2500)
411 clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index];
413 clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
415 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
416 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
417 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,
418 (clk_info->param3 & 0xc0) |
419 ((clk_info->param3 & 0x3) << 4));
422 static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
423 struct ast_vbios_mode_info *vbios_mode)
425 struct ast_private *ast = crtc->dev->dev_private;
426 const struct drm_framebuffer *fb = crtc->primary->fb;
427 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
429 switch (fb->format->cpp[0] * 8) {
448 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);
449 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);
450 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);
453 if (ast->chip == AST2300 || ast->chip == AST2400 ||
454 ast->chip == AST2500) {
455 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);
456 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);
457 } else if (ast->chip == AST2100 ||
458 ast->chip == AST1100 ||
459 ast->chip == AST2200 ||
460 ast->chip == AST2150) {
461 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);
462 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);
464 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);
465 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);
469 static void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode,
470 struct ast_vbios_mode_info *vbios_mode)
472 struct ast_private *ast = dev->dev_private;
475 jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
477 if (vbios_mode->enh_table->flags & NVSync) jreg |= 0x80;
478 if (vbios_mode->enh_table->flags & NHSync) jreg |= 0x40;
479 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
482 static bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
483 struct ast_vbios_mode_info *vbios_mode)
485 const struct drm_framebuffer *fb = crtc->primary->fb;
487 switch (fb->format->cpp[0] * 8) {
496 static void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset)
498 struct ast_private *ast = crtc->dev->dev_private;
502 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));
503 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));
504 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));
508 static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)
510 struct ast_private *ast = crtc->dev->dev_private;
512 if (ast->chip == AST1180)
516 case DRM_MODE_DPMS_ON:
517 case DRM_MODE_DPMS_STANDBY:
518 case DRM_MODE_DPMS_SUSPEND:
519 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
520 if (ast->tx_chip_type == AST_TX_DP501)
521 ast_set_dp501_video_output(crtc->dev, 1);
522 ast_crtc_load_lut(crtc);
524 case DRM_MODE_DPMS_OFF:
525 if (ast->tx_chip_type == AST_TX_DP501)
526 ast_set_dp501_video_output(crtc->dev, 0);
527 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);
532 static int ast_crtc_do_set_base(struct drm_crtc *crtc,
533 struct drm_framebuffer *fb,
534 int x, int y, int atomic)
536 struct drm_gem_vram_object *gbo;
541 gbo = drm_gem_vram_of_gem(fb->obj[0]);
542 drm_gem_vram_unpin(gbo);
545 gbo = drm_gem_vram_of_gem(crtc->primary->fb->obj[0]);
547 ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM);
550 gpu_addr = drm_gem_vram_offset(gbo);
553 goto err_drm_gem_vram_unpin;
556 ast_set_offset_reg(crtc);
557 ast_set_start_address_crt1(crtc, (u32)gpu_addr);
561 err_drm_gem_vram_unpin:
562 drm_gem_vram_unpin(gbo);
566 static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
567 struct drm_framebuffer *old_fb)
569 return ast_crtc_do_set_base(crtc, old_fb, x, y, 0);
572 static int ast_crtc_mode_set(struct drm_crtc *crtc,
573 struct drm_display_mode *mode,
574 struct drm_display_mode *adjusted_mode,
576 struct drm_framebuffer *old_fb)
578 struct drm_device *dev = crtc->dev;
579 struct ast_private *ast = crtc->dev->dev_private;
580 struct ast_vbios_mode_info vbios_mode;
582 if (ast->chip == AST1180) {
583 DRM_ERROR("AST 1180 modesetting not supported\n");
587 ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &vbios_mode);
592 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06);
594 ast_set_std_reg(crtc, adjusted_mode, &vbios_mode);
595 ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode);
596 ast_set_offset_reg(crtc);
597 ast_set_dclk_reg(dev, adjusted_mode, &vbios_mode);
598 ast_set_ext_reg(crtc, adjusted_mode, &vbios_mode);
599 ast_set_sync_reg(dev, adjusted_mode, &vbios_mode);
600 ast_set_dac_reg(crtc, adjusted_mode, &vbios_mode);
602 ast_crtc_mode_set_base(crtc, x, y, old_fb);
607 static void ast_crtc_disable(struct drm_crtc *crtc)
610 ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
611 if (crtc->primary->fb) {
612 struct drm_framebuffer *fb = crtc->primary->fb;
613 struct drm_gem_vram_object *gbo =
614 drm_gem_vram_of_gem(fb->obj[0]);
616 drm_gem_vram_unpin(gbo);
618 crtc->primary->fb = NULL;
621 static void ast_crtc_prepare(struct drm_crtc *crtc)
626 static void ast_crtc_commit(struct drm_crtc *crtc)
628 struct ast_private *ast = crtc->dev->dev_private;
629 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
630 ast_crtc_load_lut(crtc);
634 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
635 .dpms = ast_crtc_dpms,
636 .mode_set = ast_crtc_mode_set,
637 .mode_set_base = ast_crtc_mode_set_base,
638 .disable = ast_crtc_disable,
639 .prepare = ast_crtc_prepare,
640 .commit = ast_crtc_commit,
644 static void ast_crtc_reset(struct drm_crtc *crtc)
649 static int ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
650 u16 *blue, uint32_t size,
651 struct drm_modeset_acquire_ctx *ctx)
653 ast_crtc_load_lut(crtc);
659 static void ast_crtc_destroy(struct drm_crtc *crtc)
661 drm_crtc_cleanup(crtc);
665 static const struct drm_crtc_funcs ast_crtc_funcs = {
666 .cursor_set = ast_cursor_set,
667 .cursor_move = ast_cursor_move,
668 .reset = ast_crtc_reset,
669 .set_config = drm_crtc_helper_set_config,
670 .gamma_set = ast_crtc_gamma_set,
671 .destroy = ast_crtc_destroy,
674 static int ast_crtc_init(struct drm_device *dev)
676 struct ast_crtc *crtc;
678 crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL);
682 drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs);
683 drm_mode_crtc_set_gamma_size(&crtc->base, 256);
684 drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs);
688 static void ast_encoder_destroy(struct drm_encoder *encoder)
690 drm_encoder_cleanup(encoder);
694 static const struct drm_encoder_funcs ast_enc_funcs = {
695 .destroy = ast_encoder_destroy,
698 static void ast_encoder_dpms(struct drm_encoder *encoder, int mode)
703 static void ast_encoder_mode_set(struct drm_encoder *encoder,
704 struct drm_display_mode *mode,
705 struct drm_display_mode *adjusted_mode)
709 static void ast_encoder_prepare(struct drm_encoder *encoder)
714 static void ast_encoder_commit(struct drm_encoder *encoder)
720 static const struct drm_encoder_helper_funcs ast_enc_helper_funcs = {
721 .dpms = ast_encoder_dpms,
722 .prepare = ast_encoder_prepare,
723 .commit = ast_encoder_commit,
724 .mode_set = ast_encoder_mode_set,
727 static int ast_encoder_init(struct drm_device *dev)
729 struct ast_encoder *ast_encoder;
731 ast_encoder = kzalloc(sizeof(struct ast_encoder), GFP_KERNEL);
735 drm_encoder_init(dev, &ast_encoder->base, &ast_enc_funcs,
736 DRM_MODE_ENCODER_DAC, NULL);
737 drm_encoder_helper_add(&ast_encoder->base, &ast_enc_helper_funcs);
739 ast_encoder->base.possible_crtcs = 1;
743 static int ast_get_modes(struct drm_connector *connector)
745 struct ast_connector *ast_connector = to_ast_connector(connector);
746 struct ast_private *ast = connector->dev->dev_private;
750 if (ast->tx_chip_type == AST_TX_DP501) {
751 ast->dp501_maxclk = 0xff;
752 edid = kmalloc(128, GFP_KERNEL);
756 flags = ast_dp501_read_edid(connector->dev, (u8 *)edid);
758 ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev);
763 edid = drm_get_edid(connector, &ast_connector->i2c->adapter);
765 drm_connector_update_edid_property(&ast_connector->base, edid);
766 ret = drm_add_edid_modes(connector, edid);
770 drm_connector_update_edid_property(&ast_connector->base, NULL);
774 static enum drm_mode_status ast_mode_valid(struct drm_connector *connector,
775 struct drm_display_mode *mode)
777 struct ast_private *ast = connector->dev->dev_private;
778 int flags = MODE_NOMODE;
781 if (ast->support_wide_screen) {
782 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050))
784 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800))
786 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900))
788 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768))
790 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900))
793 if ((ast->chip == AST2100) || (ast->chip == AST2200) ||
794 (ast->chip == AST2300) || (ast->chip == AST2400) ||
795 (ast->chip == AST2500) || (ast->chip == AST1180)) {
796 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080))
799 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) {
800 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
808 switch (mode->hdisplay) {
810 if (mode->vdisplay == 480) flags = MODE_OK;
813 if (mode->vdisplay == 600) flags = MODE_OK;
816 if (mode->vdisplay == 768) flags = MODE_OK;
819 if (mode->vdisplay == 1024) flags = MODE_OK;
822 if (mode->vdisplay == 1200) flags = MODE_OK;
831 static void ast_connector_destroy(struct drm_connector *connector)
833 struct ast_connector *ast_connector = to_ast_connector(connector);
834 ast_i2c_destroy(ast_connector->i2c);
835 drm_connector_unregister(connector);
836 drm_connector_cleanup(connector);
840 static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {
841 .mode_valid = ast_mode_valid,
842 .get_modes = ast_get_modes,
845 static const struct drm_connector_funcs ast_connector_funcs = {
846 .dpms = drm_helper_connector_dpms,
847 .fill_modes = drm_helper_probe_single_connector_modes,
848 .destroy = ast_connector_destroy,
851 static int ast_connector_init(struct drm_device *dev)
853 struct ast_connector *ast_connector;
854 struct drm_connector *connector;
855 struct drm_encoder *encoder;
857 ast_connector = kzalloc(sizeof(struct ast_connector), GFP_KERNEL);
861 connector = &ast_connector->base;
862 ast_connector->i2c = ast_i2c_create(dev);
863 if (!ast_connector->i2c)
864 DRM_ERROR("failed to add ddc bus for connector\n");
866 drm_connector_init_with_ddc(dev, connector,
867 &ast_connector_funcs,
868 DRM_MODE_CONNECTOR_VGA,
869 &ast_connector->i2c->adapter);
871 drm_connector_helper_add(connector, &ast_connector_helper_funcs);
873 connector->interlace_allowed = 0;
874 connector->doublescan_allowed = 0;
876 drm_connector_register(connector);
878 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
880 encoder = list_first_entry(&dev->mode_config.encoder_list, struct drm_encoder, head);
881 drm_connector_attach_encoder(connector, encoder);
886 /* allocate cursor cache and pin at start of VRAM */
887 static int ast_cursor_init(struct drm_device *dev)
889 struct ast_private *ast = dev->dev_private;
891 struct drm_gem_vram_object *gbo;
894 size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE);
896 for (i = 0; i < ARRAY_SIZE(ast->cursor.gbo); ++i) {
897 gbo = drm_gem_vram_create(dev, &dev->vram_mm->bdev,
901 goto err_drm_gem_vram_put;
903 ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM |
904 DRM_GEM_VRAM_PL_FLAG_TOPDOWN);
906 drm_gem_vram_put(gbo);
907 goto err_drm_gem_vram_put;
910 ast->cursor.gbo[i] = gbo;
915 err_drm_gem_vram_put:
918 gbo = ast->cursor.gbo[i];
919 drm_gem_vram_unpin(gbo);
920 drm_gem_vram_put(gbo);
921 ast->cursor.gbo[i] = NULL;
926 static void ast_cursor_fini(struct drm_device *dev)
928 struct ast_private *ast = dev->dev_private;
930 struct drm_gem_vram_object *gbo;
932 for (i = 0; i < ARRAY_SIZE(ast->cursor.gbo); ++i) {
933 gbo = ast->cursor.gbo[i];
934 drm_gem_vram_unpin(gbo);
935 drm_gem_vram_put(gbo);
939 int ast_mode_init(struct drm_device *dev)
941 ast_cursor_init(dev);
943 ast_encoder_init(dev);
944 ast_connector_init(dev);
948 void ast_mode_fini(struct drm_device *dev)
950 ast_cursor_fini(dev);
953 static int get_clock(void *i2c_priv)
955 struct ast_i2c_chan *i2c = i2c_priv;
956 struct ast_private *ast = i2c->dev->dev_private;
957 uint32_t val, val2, count, pass;
961 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
963 val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
968 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
970 } while ((pass < 5) && (count++ < 0x10000));
972 return val & 1 ? 1 : 0;
975 static int get_data(void *i2c_priv)
977 struct ast_i2c_chan *i2c = i2c_priv;
978 struct ast_private *ast = i2c->dev->dev_private;
979 uint32_t val, val2, count, pass;
983 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
985 val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
990 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
992 } while ((pass < 5) && (count++ < 0x10000));
994 return val & 1 ? 1 : 0;
997 static void set_clock(void *i2c_priv, int clock)
999 struct ast_i2c_chan *i2c = i2c_priv;
1000 struct ast_private *ast = i2c->dev->dev_private;
1004 for (i = 0; i < 0x10000; i++) {
1005 ujcrb7 = ((clock & 0x01) ? 0 : 1);
1006 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf4, ujcrb7);
1007 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);
1008 if (ujcrb7 == jtemp)
1013 static void set_data(void *i2c_priv, int data)
1015 struct ast_i2c_chan *i2c = i2c_priv;
1016 struct ast_private *ast = i2c->dev->dev_private;
1020 for (i = 0; i < 0x10000; i++) {
1021 ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
1022 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf1, ujcrb7);
1023 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);
1024 if (ujcrb7 == jtemp)
1029 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev)
1031 struct ast_i2c_chan *i2c;
1034 i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL);
1038 i2c->adapter.owner = THIS_MODULE;
1039 i2c->adapter.class = I2C_CLASS_DDC;
1040 i2c->adapter.dev.parent = &dev->pdev->dev;
1042 i2c_set_adapdata(&i2c->adapter, i2c);
1043 snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
1045 i2c->adapter.algo_data = &i2c->bit;
1047 i2c->bit.udelay = 20;
1048 i2c->bit.timeout = 2;
1049 i2c->bit.data = i2c;
1050 i2c->bit.setsda = set_data;
1051 i2c->bit.setscl = set_clock;
1052 i2c->bit.getsda = get_data;
1053 i2c->bit.getscl = get_clock;
1054 ret = i2c_bit_add_bus(&i2c->adapter);
1056 DRM_ERROR("Failed to register bit i2c\n");
1066 static void ast_i2c_destroy(struct ast_i2c_chan *i2c)
1070 i2c_del_adapter(&i2c->adapter);
1074 static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height)
1079 } srcdata32[2], data32;
1085 s32 alpha_dst_delta, last_alpha_dst_delta;
1086 u8 *srcxor, *dstxor;
1088 u32 per_pixel_copy, two_pixel_copy;
1090 alpha_dst_delta = AST_MAX_HWC_WIDTH << 1;
1091 last_alpha_dst_delta = alpha_dst_delta - (width << 1);
1094 dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;
1095 per_pixel_copy = width & 1;
1096 two_pixel_copy = width >> 1;
1098 for (j = 0; j < height; j++) {
1099 for (i = 0; i < two_pixel_copy; i++) {
1100 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1101 srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
1102 data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1103 data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1104 data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4);
1105 data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4);
1107 writel(data32.ul, dstxor);
1115 for (i = 0; i < per_pixel_copy; i++) {
1116 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1117 data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1118 data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1119 writew(data16.us, dstxor);
1120 csum += (u32)data16.us;
1125 dstxor += last_alpha_dst_delta;
1130 static int ast_cursor_update(void *dst, void *src, unsigned int width,
1131 unsigned int height)
1135 /* do data transfer to cursor cache */
1136 csum = copy_cursor_image(src, dst, width, height);
1138 /* write checksum + signature */
1139 dst += AST_HWC_SIZE;
1141 writel(width, dst + AST_HWC_SIGNATURE_SizeX);
1142 writel(height, dst + AST_HWC_SIGNATURE_SizeY);
1143 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
1144 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
1149 static void ast_cursor_set_base(struct ast_private *ast, u64 address)
1151 u8 addr0 = (address >> 3) & 0xff;
1152 u8 addr1 = (address >> 11) & 0xff;
1153 u8 addr2 = (address >> 19) & 0xff;
1155 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, addr0);
1156 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, addr1);
1157 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, addr2);
1160 static int ast_show_cursor(struct drm_crtc *crtc, void *src,
1161 unsigned int width, unsigned int height)
1163 struct ast_private *ast = crtc->dev->dev_private;
1164 struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1165 struct drm_gem_vram_object *gbo;
1171 gbo = ast->cursor.gbo[ast->cursor.next_index];
1172 dst = drm_gem_vram_vmap(gbo);
1174 return PTR_ERR(dst);
1175 off = drm_gem_vram_offset(gbo);
1178 goto err_drm_gem_vram_vunmap;
1181 ret = ast_cursor_update(dst, src, width, height);
1183 goto err_drm_gem_vram_vunmap;
1184 ast_cursor_set_base(ast, off);
1186 ast_crtc->offset_x = AST_MAX_HWC_WIDTH - width;
1187 ast_crtc->offset_y = AST_MAX_HWC_WIDTH - height;
1190 /* enable ARGB cursor */
1192 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);
1194 ++ast->cursor.next_index;
1195 ast->cursor.next_index %= ARRAY_SIZE(ast->cursor.gbo);
1197 drm_gem_vram_vunmap(gbo, dst);
1201 err_drm_gem_vram_vunmap:
1202 drm_gem_vram_vunmap(gbo, dst);
1206 static void ast_hide_cursor(struct drm_crtc *crtc)
1208 struct ast_private *ast = crtc->dev->dev_private;
1210 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00);
1213 static int ast_cursor_set(struct drm_crtc *crtc,
1214 struct drm_file *file_priv,
1219 struct drm_gem_object *obj;
1220 struct drm_gem_vram_object *gbo;
1225 ast_hide_cursor(crtc);
1229 if (width > AST_MAX_HWC_WIDTH || height > AST_MAX_HWC_HEIGHT)
1232 obj = drm_gem_object_lookup(file_priv, handle);
1234 DRM_ERROR("Cannot find cursor object %x for crtc\n", handle);
1237 gbo = drm_gem_vram_of_gem(obj);
1238 src = drm_gem_vram_vmap(gbo);
1241 goto err_drm_gem_object_put_unlocked;
1244 ret = ast_show_cursor(crtc, src, width, height);
1246 goto err_drm_gem_vram_vunmap;
1248 drm_gem_vram_vunmap(gbo, src);
1249 drm_gem_object_put_unlocked(obj);
1253 err_drm_gem_vram_vunmap:
1254 drm_gem_vram_vunmap(gbo, src);
1255 err_drm_gem_object_put_unlocked:
1256 drm_gem_object_put_unlocked(obj);
1260 static int ast_cursor_move(struct drm_crtc *crtc,
1263 struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1264 struct ast_private *ast = crtc->dev->dev_private;
1265 struct drm_gem_vram_object *gbo;
1266 int x_offset, y_offset;
1270 gbo = ast->cursor.gbo[ast->cursor.next_index];
1271 dst = drm_gem_vram_vmap(gbo);
1273 return PTR_ERR(dst);
1275 sig = dst + AST_HWC_SIZE;
1276 writel(x, sig + AST_HWC_SIGNATURE_X);
1277 writel(y, sig + AST_HWC_SIGNATURE_Y);
1279 x_offset = ast_crtc->offset_x;
1280 y_offset = ast_crtc->offset_y;
1282 x_offset = (-x) + ast_crtc->offset_x;
1287 y_offset = (-y) + ast_crtc->offset_y;
1290 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);
1291 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);
1292 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff));
1293 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f));
1294 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff));
1295 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07));
1297 /* dummy write to fire HWC */
1299 0x01; /* enable ARGB4444 cursor */
1300 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);
1302 drm_gem_vram_vunmap(gbo, dst);