2 * Copyright 2012 Red Hat Inc.
3 * Parts based on xf86-video-ast
4 * Copyright (c) 2005 ASPEED Technology Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
28 * Authors: Dave Airlie <airlied@redhat.com>
31 #include <linux/export.h>
32 #include <linux/pci.h>
34 #include <drm/drm_crtc.h>
35 #include <drm/drm_crtc_helper.h>
36 #include <drm/drm_fourcc.h>
37 #include <drm/drm_gem_vram_helper.h>
38 #include <drm/drm_plane_helper.h>
39 #include <drm/drm_probe_helper.h>
42 #include "ast_tables.h"
44 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
45 static void ast_i2c_destroy(struct ast_i2c_chan *i2c);
46 static int ast_cursor_set(struct drm_crtc *crtc,
47 struct drm_file *file_priv,
51 static int ast_cursor_move(struct drm_crtc *crtc,
54 static inline void ast_load_palette_index(struct ast_private *ast,
55 u8 index, u8 red, u8 green,
58 ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);
59 ast_io_read8(ast, AST_IO_SEQ_PORT);
60 ast_io_write8(ast, AST_IO_DAC_DATA, red);
61 ast_io_read8(ast, AST_IO_SEQ_PORT);
62 ast_io_write8(ast, AST_IO_DAC_DATA, green);
63 ast_io_read8(ast, AST_IO_SEQ_PORT);
64 ast_io_write8(ast, AST_IO_DAC_DATA, blue);
65 ast_io_read8(ast, AST_IO_SEQ_PORT);
68 static void ast_crtc_load_lut(struct drm_crtc *crtc)
70 struct ast_private *ast = crtc->dev->dev_private;
77 r = crtc->gamma_store;
78 g = r + crtc->gamma_size;
79 b = g + crtc->gamma_size;
81 for (i = 0; i < 256; i++)
82 ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8);
85 static bool ast_get_vbios_mode_info(const struct drm_framebuffer *fb,
86 const struct drm_display_mode *mode,
87 struct drm_display_mode *adjusted_mode,
88 struct ast_vbios_mode_info *vbios_mode)
90 u32 refresh_rate_index = 0, refresh_rate;
91 const struct ast_vbios_enhtable *best = NULL;
95 switch (fb->format->cpp[0] * 8) {
97 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
100 vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
104 vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
110 switch (mode->crtc_hdisplay) {
112 vbios_mode->enh_table = &res_640x480[refresh_rate_index];
115 vbios_mode->enh_table = &res_800x600[refresh_rate_index];
118 vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
121 if (mode->crtc_vdisplay == 800)
122 vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
124 vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
127 vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
130 vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
133 if (mode->crtc_vdisplay == 900)
134 vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
136 vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
139 vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
142 if (mode->crtc_vdisplay == 1080)
143 vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
145 vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
151 refresh_rate = drm_mode_vrefresh(mode);
152 check_sync = vbios_mode->enh_table->flags & WideScreenMode;
155 const struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
157 while (loop->refresh_rate != 0xff) {
159 (((mode->flags & DRM_MODE_FLAG_NVSYNC) &&
160 (loop->flags & PVSync)) ||
161 ((mode->flags & DRM_MODE_FLAG_PVSYNC) &&
162 (loop->flags & NVSync)) ||
163 ((mode->flags & DRM_MODE_FLAG_NHSYNC) &&
164 (loop->flags & PHSync)) ||
165 ((mode->flags & DRM_MODE_FLAG_PHSYNC) &&
166 (loop->flags & NHSync)))) {
170 if (loop->refresh_rate <= refresh_rate
171 && (!best || loop->refresh_rate > best->refresh_rate))
175 if (best || !check_sync)
181 vbios_mode->enh_table = best;
183 hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
184 vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
186 adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
187 adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
188 adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
189 adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
190 vbios_mode->enh_table->hfp;
191 adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
192 vbios_mode->enh_table->hfp +
193 vbios_mode->enh_table->hsync);
195 adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
196 adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
197 adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
198 adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
199 vbios_mode->enh_table->vfp;
200 adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
201 vbios_mode->enh_table->vfp +
202 vbios_mode->enh_table->vsync);
207 static void ast_set_vbios_color_reg(struct drm_crtc *crtc,
208 const struct drm_framebuffer *fb,
209 const struct ast_vbios_mode_info *vbios_mode)
211 struct ast_private *ast = crtc->dev->dev_private;
214 switch (fb->format->cpp[0]) {
216 color_index = VGAModeIndex - 1;
219 color_index = HiCModeIndex;
223 color_index = TrueCModeIndex;
228 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0x0f) << 4));
230 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
232 if (vbios_mode->enh_table->flags & NewModeInfo) {
233 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
234 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, fb->format->cpp[0] * 8);
238 static void ast_set_vbios_mode_reg(struct drm_crtc *crtc,
239 const struct drm_display_mode *adjusted_mode,
240 const struct ast_vbios_mode_info *vbios_mode)
242 struct ast_private *ast = crtc->dev->dev_private;
243 u32 refresh_rate_index, mode_id;
245 refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
246 mode_id = vbios_mode->enh_table->mode_id;
248 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);
249 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);
251 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
253 if (vbios_mode->enh_table->flags & NewModeInfo) {
254 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
255 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);
256 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);
257 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);
258 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);
259 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);
263 static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
264 struct ast_vbios_mode_info *vbios_mode)
266 struct ast_private *ast = crtc->dev->dev_private;
267 const struct ast_vbios_stdtable *stdtable;
271 stdtable = vbios_mode->std_table;
273 jreg = stdtable->misc;
274 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
277 ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);
278 for (i = 0; i < 4; i++) {
279 jreg = stdtable->seq[i];
282 ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);
285 /* Set CRTC; except base address and offset */
286 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
287 for (i = 0; i < 12; i++)
288 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
289 for (i = 14; i < 19; i++)
290 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
291 for (i = 20; i < 25; i++)
292 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
295 jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
296 for (i = 0; i < 20; i++) {
297 jreg = stdtable->ar[i];
298 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);
299 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
301 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);
302 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);
304 jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
305 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);
308 for (i = 0; i < 9; i++)
309 ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);
312 static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
313 struct ast_vbios_mode_info *vbios_mode)
315 struct ast_private *ast = crtc->dev->dev_private;
316 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
317 u16 temp, precache = 0;
319 if ((ast->chip == AST2500) &&
320 (vbios_mode->enh_table->flags & AST2500PreCatchCRT))
323 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
325 temp = (mode->crtc_htotal >> 3) - 5;
327 jregAC |= 0x01; /* HT D[8] */
328 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);
330 temp = (mode->crtc_hdisplay >> 3) - 1;
332 jregAC |= 0x04; /* HDE D[8] */
333 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);
335 temp = (mode->crtc_hblank_start >> 3) - 1;
337 jregAC |= 0x10; /* HBS D[8] */
338 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);
340 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
342 jreg05 |= 0x80; /* HBE D[5] */
344 jregAD |= 0x01; /* HBE D[5] */
345 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));
347 temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
349 jregAC |= 0x40; /* HRS D[5] */
350 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);
352 temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f;
354 jregAD |= 0x04; /* HRE D[5] */
355 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
357 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);
358 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);
361 temp = (mode->crtc_vtotal) - 2;
368 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);
370 temp = (mode->crtc_vsync_start) - 1;
377 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);
379 temp = (mode->crtc_vsync_end - 1) & 0x3f;
384 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);
386 temp = mode->crtc_vdisplay - 1;
393 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);
395 temp = mode->crtc_vblank_start - 1;
402 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);
404 temp = mode->crtc_vblank_end - 1;
407 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);
409 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);
410 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);
411 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));
414 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80);
416 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00);
418 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);
421 static void ast_set_offset_reg(struct drm_crtc *crtc)
423 struct ast_private *ast = crtc->dev->dev_private;
424 const struct drm_framebuffer *fb = crtc->primary->fb;
428 offset = fb->pitches[0] >> 3;
429 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
430 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
433 static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode,
434 struct ast_vbios_mode_info *vbios_mode)
436 struct ast_private *ast = dev->dev_private;
437 const struct ast_vbios_dclk_info *clk_info;
439 if (ast->chip == AST2500)
440 clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index];
442 clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
444 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
445 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
446 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,
447 (clk_info->param3 & 0xc0) |
448 ((clk_info->param3 & 0x3) << 4));
451 static void ast_set_color_reg(struct drm_crtc *crtc,
452 const struct drm_framebuffer *fb)
454 struct ast_private *ast = crtc->dev->dev_private;
455 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
457 switch (fb->format->cpp[0] * 8) {
476 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);
477 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);
478 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);
481 static void ast_set_crtthd_reg(struct drm_crtc *crtc)
483 struct ast_private *ast = crtc->dev->dev_private;
486 if (ast->chip == AST2300 || ast->chip == AST2400 ||
487 ast->chip == AST2500) {
488 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);
489 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);
490 } else if (ast->chip == AST2100 ||
491 ast->chip == AST1100 ||
492 ast->chip == AST2200 ||
493 ast->chip == AST2150) {
494 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);
495 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);
497 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);
498 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);
502 static void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode,
503 struct ast_vbios_mode_info *vbios_mode)
505 struct ast_private *ast = dev->dev_private;
508 jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
510 if (vbios_mode->enh_table->flags & NVSync) jreg |= 0x80;
511 if (vbios_mode->enh_table->flags & NHSync) jreg |= 0x40;
512 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
515 static bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
516 struct ast_vbios_mode_info *vbios_mode)
518 const struct drm_framebuffer *fb = crtc->primary->fb;
520 switch (fb->format->cpp[0] * 8) {
529 static void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset)
531 struct ast_private *ast = crtc->dev->dev_private;
535 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));
536 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));
537 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));
541 static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)
543 struct ast_private *ast = crtc->dev->dev_private;
545 if (ast->chip == AST1180)
549 case DRM_MODE_DPMS_ON:
550 case DRM_MODE_DPMS_STANDBY:
551 case DRM_MODE_DPMS_SUSPEND:
552 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
553 if (ast->tx_chip_type == AST_TX_DP501)
554 ast_set_dp501_video_output(crtc->dev, 1);
555 ast_crtc_load_lut(crtc);
557 case DRM_MODE_DPMS_OFF:
558 if (ast->tx_chip_type == AST_TX_DP501)
559 ast_set_dp501_video_output(crtc->dev, 0);
560 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);
565 static int ast_crtc_do_set_base(struct drm_crtc *crtc,
566 struct drm_framebuffer *fb,
567 int x, int y, int atomic)
569 struct drm_gem_vram_object *gbo;
574 gbo = drm_gem_vram_of_gem(fb->obj[0]);
575 drm_gem_vram_unpin(gbo);
578 gbo = drm_gem_vram_of_gem(crtc->primary->fb->obj[0]);
580 ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM);
583 gpu_addr = drm_gem_vram_offset(gbo);
586 goto err_drm_gem_vram_unpin;
589 ast_set_offset_reg(crtc);
590 ast_set_start_address_crt1(crtc, (u32)gpu_addr);
594 err_drm_gem_vram_unpin:
595 drm_gem_vram_unpin(gbo);
599 static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
600 struct drm_framebuffer *old_fb)
602 return ast_crtc_do_set_base(crtc, old_fb, x, y, 0);
605 static int ast_crtc_mode_set(struct drm_crtc *crtc,
606 struct drm_display_mode *mode,
607 struct drm_display_mode *adjusted_mode,
609 struct drm_framebuffer *old_fb)
611 struct drm_device *dev = crtc->dev;
612 struct ast_private *ast = crtc->dev->dev_private;
613 const struct drm_framebuffer *fb = crtc->primary->fb;
614 struct ast_vbios_mode_info vbios_mode;
617 if (ast->chip == AST1180) {
618 DRM_ERROR("AST 1180 modesetting not supported\n");
622 succ = ast_get_vbios_mode_info(fb, mode, adjusted_mode, &vbios_mode);
628 ast_set_vbios_color_reg(crtc, fb, &vbios_mode);
629 ast_set_vbios_mode_reg(crtc, adjusted_mode, &vbios_mode);
630 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06);
631 ast_set_std_reg(crtc, adjusted_mode, &vbios_mode);
632 ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode);
633 ast_set_offset_reg(crtc);
634 ast_set_dclk_reg(dev, adjusted_mode, &vbios_mode);
635 ast_set_color_reg(crtc, fb);
636 ast_set_crtthd_reg(crtc);
637 ast_set_sync_reg(dev, adjusted_mode, &vbios_mode);
638 ast_set_dac_reg(crtc, adjusted_mode, &vbios_mode);
640 ast_crtc_mode_set_base(crtc, x, y, old_fb);
645 static void ast_crtc_disable(struct drm_crtc *crtc)
648 ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
649 if (crtc->primary->fb) {
650 struct drm_framebuffer *fb = crtc->primary->fb;
651 struct drm_gem_vram_object *gbo =
652 drm_gem_vram_of_gem(fb->obj[0]);
654 drm_gem_vram_unpin(gbo);
656 crtc->primary->fb = NULL;
659 static void ast_crtc_prepare(struct drm_crtc *crtc)
664 static void ast_crtc_commit(struct drm_crtc *crtc)
666 struct ast_private *ast = crtc->dev->dev_private;
667 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
668 ast_crtc_load_lut(crtc);
672 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
673 .dpms = ast_crtc_dpms,
674 .mode_set = ast_crtc_mode_set,
675 .mode_set_base = ast_crtc_mode_set_base,
676 .disable = ast_crtc_disable,
677 .prepare = ast_crtc_prepare,
678 .commit = ast_crtc_commit,
682 static void ast_crtc_reset(struct drm_crtc *crtc)
687 static int ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
688 u16 *blue, uint32_t size,
689 struct drm_modeset_acquire_ctx *ctx)
691 ast_crtc_load_lut(crtc);
697 static void ast_crtc_destroy(struct drm_crtc *crtc)
699 drm_crtc_cleanup(crtc);
703 static const struct drm_crtc_funcs ast_crtc_funcs = {
704 .cursor_set = ast_cursor_set,
705 .cursor_move = ast_cursor_move,
706 .reset = ast_crtc_reset,
707 .set_config = drm_crtc_helper_set_config,
708 .gamma_set = ast_crtc_gamma_set,
709 .destroy = ast_crtc_destroy,
712 static int ast_crtc_init(struct drm_device *dev)
714 struct ast_crtc *crtc;
716 crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL);
720 drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs);
721 drm_mode_crtc_set_gamma_size(&crtc->base, 256);
722 drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs);
726 static void ast_encoder_destroy(struct drm_encoder *encoder)
728 drm_encoder_cleanup(encoder);
732 static const struct drm_encoder_funcs ast_enc_funcs = {
733 .destroy = ast_encoder_destroy,
736 static void ast_encoder_dpms(struct drm_encoder *encoder, int mode)
741 static void ast_encoder_mode_set(struct drm_encoder *encoder,
742 struct drm_display_mode *mode,
743 struct drm_display_mode *adjusted_mode)
747 static void ast_encoder_prepare(struct drm_encoder *encoder)
752 static void ast_encoder_commit(struct drm_encoder *encoder)
758 static const struct drm_encoder_helper_funcs ast_enc_helper_funcs = {
759 .dpms = ast_encoder_dpms,
760 .prepare = ast_encoder_prepare,
761 .commit = ast_encoder_commit,
762 .mode_set = ast_encoder_mode_set,
765 static int ast_encoder_init(struct drm_device *dev)
767 struct ast_encoder *ast_encoder;
769 ast_encoder = kzalloc(sizeof(struct ast_encoder), GFP_KERNEL);
773 drm_encoder_init(dev, &ast_encoder->base, &ast_enc_funcs,
774 DRM_MODE_ENCODER_DAC, NULL);
775 drm_encoder_helper_add(&ast_encoder->base, &ast_enc_helper_funcs);
777 ast_encoder->base.possible_crtcs = 1;
781 static int ast_get_modes(struct drm_connector *connector)
783 struct ast_connector *ast_connector = to_ast_connector(connector);
784 struct ast_private *ast = connector->dev->dev_private;
788 if (ast->tx_chip_type == AST_TX_DP501) {
789 ast->dp501_maxclk = 0xff;
790 edid = kmalloc(128, GFP_KERNEL);
794 flags = ast_dp501_read_edid(connector->dev, (u8 *)edid);
796 ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev);
801 edid = drm_get_edid(connector, &ast_connector->i2c->adapter);
803 drm_connector_update_edid_property(&ast_connector->base, edid);
804 ret = drm_add_edid_modes(connector, edid);
808 drm_connector_update_edid_property(&ast_connector->base, NULL);
812 static enum drm_mode_status ast_mode_valid(struct drm_connector *connector,
813 struct drm_display_mode *mode)
815 struct ast_private *ast = connector->dev->dev_private;
816 int flags = MODE_NOMODE;
819 if (ast->support_wide_screen) {
820 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050))
822 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800))
824 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900))
826 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768))
828 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900))
831 if ((ast->chip == AST2100) || (ast->chip == AST2200) ||
832 (ast->chip == AST2300) || (ast->chip == AST2400) ||
833 (ast->chip == AST2500) || (ast->chip == AST1180)) {
834 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080))
837 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) {
838 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
846 switch (mode->hdisplay) {
848 if (mode->vdisplay == 480) flags = MODE_OK;
851 if (mode->vdisplay == 600) flags = MODE_OK;
854 if (mode->vdisplay == 768) flags = MODE_OK;
857 if (mode->vdisplay == 1024) flags = MODE_OK;
860 if (mode->vdisplay == 1200) flags = MODE_OK;
869 static void ast_connector_destroy(struct drm_connector *connector)
871 struct ast_connector *ast_connector = to_ast_connector(connector);
872 ast_i2c_destroy(ast_connector->i2c);
873 drm_connector_unregister(connector);
874 drm_connector_cleanup(connector);
878 static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {
879 .mode_valid = ast_mode_valid,
880 .get_modes = ast_get_modes,
883 static const struct drm_connector_funcs ast_connector_funcs = {
884 .dpms = drm_helper_connector_dpms,
885 .fill_modes = drm_helper_probe_single_connector_modes,
886 .destroy = ast_connector_destroy,
889 static int ast_connector_init(struct drm_device *dev)
891 struct ast_connector *ast_connector;
892 struct drm_connector *connector;
893 struct drm_encoder *encoder;
895 ast_connector = kzalloc(sizeof(struct ast_connector), GFP_KERNEL);
899 connector = &ast_connector->base;
900 ast_connector->i2c = ast_i2c_create(dev);
901 if (!ast_connector->i2c)
902 DRM_ERROR("failed to add ddc bus for connector\n");
904 drm_connector_init_with_ddc(dev, connector,
905 &ast_connector_funcs,
906 DRM_MODE_CONNECTOR_VGA,
907 &ast_connector->i2c->adapter);
909 drm_connector_helper_add(connector, &ast_connector_helper_funcs);
911 connector->interlace_allowed = 0;
912 connector->doublescan_allowed = 0;
914 drm_connector_register(connector);
916 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
918 encoder = list_first_entry(&dev->mode_config.encoder_list, struct drm_encoder, head);
919 drm_connector_attach_encoder(connector, encoder);
924 /* allocate cursor cache and pin at start of VRAM */
925 static int ast_cursor_init(struct drm_device *dev)
927 struct ast_private *ast = dev->dev_private;
929 struct drm_gem_vram_object *gbo;
932 size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE);
934 for (i = 0; i < ARRAY_SIZE(ast->cursor.gbo); ++i) {
935 gbo = drm_gem_vram_create(dev, &dev->vram_mm->bdev,
939 goto err_drm_gem_vram_put;
941 ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM |
942 DRM_GEM_VRAM_PL_FLAG_TOPDOWN);
944 drm_gem_vram_put(gbo);
945 goto err_drm_gem_vram_put;
948 ast->cursor.gbo[i] = gbo;
953 err_drm_gem_vram_put:
956 gbo = ast->cursor.gbo[i];
957 drm_gem_vram_unpin(gbo);
958 drm_gem_vram_put(gbo);
959 ast->cursor.gbo[i] = NULL;
964 static void ast_cursor_fini(struct drm_device *dev)
966 struct ast_private *ast = dev->dev_private;
968 struct drm_gem_vram_object *gbo;
970 for (i = 0; i < ARRAY_SIZE(ast->cursor.gbo); ++i) {
971 gbo = ast->cursor.gbo[i];
972 drm_gem_vram_unpin(gbo);
973 drm_gem_vram_put(gbo);
977 int ast_mode_init(struct drm_device *dev)
979 ast_cursor_init(dev);
981 ast_encoder_init(dev);
982 ast_connector_init(dev);
986 void ast_mode_fini(struct drm_device *dev)
988 ast_cursor_fini(dev);
991 static int get_clock(void *i2c_priv)
993 struct ast_i2c_chan *i2c = i2c_priv;
994 struct ast_private *ast = i2c->dev->dev_private;
995 uint32_t val, val2, count, pass;
999 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
1001 val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
1006 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
1008 } while ((pass < 5) && (count++ < 0x10000));
1010 return val & 1 ? 1 : 0;
1013 static int get_data(void *i2c_priv)
1015 struct ast_i2c_chan *i2c = i2c_priv;
1016 struct ast_private *ast = i2c->dev->dev_private;
1017 uint32_t val, val2, count, pass;
1021 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
1023 val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
1028 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
1030 } while ((pass < 5) && (count++ < 0x10000));
1032 return val & 1 ? 1 : 0;
1035 static void set_clock(void *i2c_priv, int clock)
1037 struct ast_i2c_chan *i2c = i2c_priv;
1038 struct ast_private *ast = i2c->dev->dev_private;
1042 for (i = 0; i < 0x10000; i++) {
1043 ujcrb7 = ((clock & 0x01) ? 0 : 1);
1044 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf4, ujcrb7);
1045 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);
1046 if (ujcrb7 == jtemp)
1051 static void set_data(void *i2c_priv, int data)
1053 struct ast_i2c_chan *i2c = i2c_priv;
1054 struct ast_private *ast = i2c->dev->dev_private;
1058 for (i = 0; i < 0x10000; i++) {
1059 ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
1060 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf1, ujcrb7);
1061 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);
1062 if (ujcrb7 == jtemp)
1067 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev)
1069 struct ast_i2c_chan *i2c;
1072 i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL);
1076 i2c->adapter.owner = THIS_MODULE;
1077 i2c->adapter.class = I2C_CLASS_DDC;
1078 i2c->adapter.dev.parent = &dev->pdev->dev;
1080 i2c_set_adapdata(&i2c->adapter, i2c);
1081 snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
1083 i2c->adapter.algo_data = &i2c->bit;
1085 i2c->bit.udelay = 20;
1086 i2c->bit.timeout = 2;
1087 i2c->bit.data = i2c;
1088 i2c->bit.setsda = set_data;
1089 i2c->bit.setscl = set_clock;
1090 i2c->bit.getsda = get_data;
1091 i2c->bit.getscl = get_clock;
1092 ret = i2c_bit_add_bus(&i2c->adapter);
1094 DRM_ERROR("Failed to register bit i2c\n");
1104 static void ast_i2c_destroy(struct ast_i2c_chan *i2c)
1108 i2c_del_adapter(&i2c->adapter);
1112 static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height)
1117 } srcdata32[2], data32;
1123 s32 alpha_dst_delta, last_alpha_dst_delta;
1124 u8 *srcxor, *dstxor;
1126 u32 per_pixel_copy, two_pixel_copy;
1128 alpha_dst_delta = AST_MAX_HWC_WIDTH << 1;
1129 last_alpha_dst_delta = alpha_dst_delta - (width << 1);
1132 dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;
1133 per_pixel_copy = width & 1;
1134 two_pixel_copy = width >> 1;
1136 for (j = 0; j < height; j++) {
1137 for (i = 0; i < two_pixel_copy; i++) {
1138 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1139 srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
1140 data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1141 data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1142 data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4);
1143 data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4);
1145 writel(data32.ul, dstxor);
1153 for (i = 0; i < per_pixel_copy; i++) {
1154 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1155 data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1156 data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1157 writew(data16.us, dstxor);
1158 csum += (u32)data16.us;
1163 dstxor += last_alpha_dst_delta;
1168 static int ast_cursor_update(void *dst, void *src, unsigned int width,
1169 unsigned int height)
1173 /* do data transfer to cursor cache */
1174 csum = copy_cursor_image(src, dst, width, height);
1176 /* write checksum + signature */
1177 dst += AST_HWC_SIZE;
1179 writel(width, dst + AST_HWC_SIGNATURE_SizeX);
1180 writel(height, dst + AST_HWC_SIGNATURE_SizeY);
1181 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
1182 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
1187 static void ast_cursor_set_base(struct ast_private *ast, u64 address)
1189 u8 addr0 = (address >> 3) & 0xff;
1190 u8 addr1 = (address >> 11) & 0xff;
1191 u8 addr2 = (address >> 19) & 0xff;
1193 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, addr0);
1194 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, addr1);
1195 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, addr2);
1198 static int ast_show_cursor(struct drm_crtc *crtc, void *src,
1199 unsigned int width, unsigned int height)
1201 struct ast_private *ast = crtc->dev->dev_private;
1202 struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1203 struct drm_gem_vram_object *gbo;
1209 gbo = ast->cursor.gbo[ast->cursor.next_index];
1210 dst = drm_gem_vram_vmap(gbo);
1212 return PTR_ERR(dst);
1213 off = drm_gem_vram_offset(gbo);
1216 goto err_drm_gem_vram_vunmap;
1219 ret = ast_cursor_update(dst, src, width, height);
1221 goto err_drm_gem_vram_vunmap;
1222 ast_cursor_set_base(ast, off);
1224 ast_crtc->offset_x = AST_MAX_HWC_WIDTH - width;
1225 ast_crtc->offset_y = AST_MAX_HWC_WIDTH - height;
1228 /* enable ARGB cursor */
1230 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);
1232 ++ast->cursor.next_index;
1233 ast->cursor.next_index %= ARRAY_SIZE(ast->cursor.gbo);
1235 drm_gem_vram_vunmap(gbo, dst);
1239 err_drm_gem_vram_vunmap:
1240 drm_gem_vram_vunmap(gbo, dst);
1244 static void ast_hide_cursor(struct drm_crtc *crtc)
1246 struct ast_private *ast = crtc->dev->dev_private;
1248 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00);
1251 static int ast_cursor_set(struct drm_crtc *crtc,
1252 struct drm_file *file_priv,
1257 struct drm_gem_object *obj;
1258 struct drm_gem_vram_object *gbo;
1263 ast_hide_cursor(crtc);
1267 if (width > AST_MAX_HWC_WIDTH || height > AST_MAX_HWC_HEIGHT)
1270 obj = drm_gem_object_lookup(file_priv, handle);
1272 DRM_ERROR("Cannot find cursor object %x for crtc\n", handle);
1275 gbo = drm_gem_vram_of_gem(obj);
1276 src = drm_gem_vram_vmap(gbo);
1279 goto err_drm_gem_object_put_unlocked;
1282 ret = ast_show_cursor(crtc, src, width, height);
1284 goto err_drm_gem_vram_vunmap;
1286 drm_gem_vram_vunmap(gbo, src);
1287 drm_gem_object_put_unlocked(obj);
1291 err_drm_gem_vram_vunmap:
1292 drm_gem_vram_vunmap(gbo, src);
1293 err_drm_gem_object_put_unlocked:
1294 drm_gem_object_put_unlocked(obj);
1298 static int ast_cursor_move(struct drm_crtc *crtc,
1301 struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1302 struct ast_private *ast = crtc->dev->dev_private;
1303 struct drm_gem_vram_object *gbo;
1304 int x_offset, y_offset;
1308 gbo = ast->cursor.gbo[ast->cursor.next_index];
1309 dst = drm_gem_vram_vmap(gbo);
1311 return PTR_ERR(dst);
1313 sig = dst + AST_HWC_SIZE;
1314 writel(x, sig + AST_HWC_SIGNATURE_X);
1315 writel(y, sig + AST_HWC_SIGNATURE_Y);
1317 x_offset = ast_crtc->offset_x;
1318 y_offset = ast_crtc->offset_y;
1320 x_offset = (-x) + ast_crtc->offset_x;
1325 y_offset = (-y) + ast_crtc->offset_y;
1328 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);
1329 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);
1330 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff));
1331 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f));
1332 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff));
1333 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07));
1335 /* dummy write to fire HWC */
1337 0x01; /* enable ARGB4444 cursor */
1338 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);
1340 drm_gem_vram_vunmap(gbo, dst);