drivers/gpu/drm/amd/pm/powerplay/smumgr/smumgr.c

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #include <linux/delay.h>
  25 #include <linux/kernel.h>
  26 #include <linux/module.h>
  27 #include <linux/slab.h>
  28 #include <linux/types.h>
  29 #include <drm/amdgpu_drm.h>
  30 #include "smumgr.h"
  31
  32 MODULE_FIRMWARE("amdgpu/bonaire_smc.bin");
  33 MODULE_FIRMWARE("amdgpu/bonaire_k_smc.bin");
  34 MODULE_FIRMWARE("amdgpu/hawaii_smc.bin");
  35 MODULE_FIRMWARE("amdgpu/hawaii_k_smc.bin");
  36 MODULE_FIRMWARE("amdgpu/topaz_smc.bin");
  37 MODULE_FIRMWARE("amdgpu/topaz_k_smc.bin");
  38 MODULE_FIRMWARE("amdgpu/tonga_smc.bin");
  39 MODULE_FIRMWARE("amdgpu/tonga_k_smc.bin");
  40 MODULE_FIRMWARE("amdgpu/fiji_smc.bin");
  41 MODULE_FIRMWARE("amdgpu/polaris10_smc.bin");
  42 MODULE_FIRMWARE("amdgpu/polaris10_smc_sk.bin");
  43 MODULE_FIRMWARE("amdgpu/polaris10_k_smc.bin");
  44 MODULE_FIRMWARE("amdgpu/polaris10_k2_smc.bin");
  45 MODULE_FIRMWARE("amdgpu/polaris11_smc.bin");
  46 MODULE_FIRMWARE("amdgpu/polaris11_smc_sk.bin");
  47 MODULE_FIRMWARE("amdgpu/polaris11_k_smc.bin");
  48 MODULE_FIRMWARE("amdgpu/polaris11_k2_smc.bin");
  49 MODULE_FIRMWARE("amdgpu/polaris12_smc.bin");
  50 MODULE_FIRMWARE("amdgpu/polaris12_k_smc.bin");
  51 MODULE_FIRMWARE("amdgpu/vegam_smc.bin");
  52 MODULE_FIRMWARE("amdgpu/vega10_smc.bin");
  53 MODULE_FIRMWARE("amdgpu/vega10_acg_smc.bin");
  54 MODULE_FIRMWARE("amdgpu/vega12_smc.bin");
  55 MODULE_FIRMWARE("amdgpu/vega20_smc.bin");
  56
  57 int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr)
  58 {
  59         if (NULL != hwmgr->smumgr_funcs->thermal_avfs_enable)
  60                 return hwmgr->smumgr_funcs->thermal_avfs_enable(hwmgr);
  61
  62         return 0;
  63 }
  64
  65 int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
  66 {
  67         if (NULL != hwmgr->smumgr_funcs->thermal_setup_fan_table)
  68                 return hwmgr->smumgr_funcs->thermal_setup_fan_table(hwmgr);
  69
  70         return 0;
  71 }
  72
  73 int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr)
  74 {
  75
  76         if (NULL != hwmgr->smumgr_funcs->update_sclk_threshold)
  77                 return hwmgr->smumgr_funcs->update_sclk_threshold(hwmgr);
  78
  79         return 0;
  80 }
  81
  82 int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type)
  83 {
  84
  85         if (NULL != hwmgr->smumgr_funcs->update_smc_table)
  86                 return hwmgr->smumgr_funcs->update_smc_table(hwmgr, type);
  87
  88         return 0;
  89 }
  90
  91 uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr, uint32_t type, uint32_t member)
  92 {
  93         if (NULL != hwmgr->smumgr_funcs->get_offsetof)
  94                 return hwmgr->smumgr_funcs->get_offsetof(type, member);
  95
  96         return 0;
  97 }
  98
  99 int smum_process_firmware_header(struct pp_hwmgr *hwmgr)
 100 {
 101         if (NULL != hwmgr->smumgr_funcs->process_firmware_header)
 102                 return hwmgr->smumgr_funcs->process_firmware_header(hwmgr);
 103         return 0;
 104 }
 105
 106 uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value)
 107 {
 108         if (NULL != hwmgr->smumgr_funcs->get_mac_definition)
 109                 return hwmgr->smumgr_funcs->get_mac_definition(value);
 110
 111         return 0;
 112 }
 113
 114 int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table)
 115 {
 116         if (NULL != hwmgr->smumgr_funcs->download_pptable_settings)
 117                 return hwmgr->smumgr_funcs->download_pptable_settings(hwmgr,
 118                                                                         table);
 119         return 0;
 120 }
 121
 122 int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr)
 123 {
 124         if (NULL != hwmgr->smumgr_funcs->upload_pptable_settings)
 125                 return hwmgr->smumgr_funcs->upload_pptable_settings(hwmgr);
 126
 127         return 0;
 128 }
 129
 130 int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp)
 131 {
 132         int ret = 0;
 133
 134         if (hwmgr == NULL ||
 135             hwmgr->smumgr_funcs->send_msg_to_smc == NULL ||
 136             (resp && !hwmgr->smumgr_funcs->get_argument))
 137                 return -EINVAL;
 138
 139         mutex_lock(&hwmgr->msg_lock);
 140
 141         ret = hwmgr->smumgr_funcs->send_msg_to_smc(hwmgr, msg);
 142         if (ret) {
 143                 mutex_unlock(&hwmgr->msg_lock);
 144                 return ret;
 145         }
 146
 147         if (resp)
 148                 *resp = hwmgr->smumgr_funcs->get_argument(hwmgr);
 149
 150         mutex_unlock(&hwmgr->msg_lock);
 151
 152         return ret;
 153 }
 154
 155 int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
 156                                         uint16_t msg,
 157                                         uint32_t parameter,
 158                                         uint32_t *resp)
 159 {
 160         int ret = 0;
 161
 162         if (hwmgr == NULL ||
 163             hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter == NULL ||
 164             (resp && !hwmgr->smumgr_funcs->get_argument))
 165                 return -EINVAL;
 166
 167         mutex_lock(&hwmgr->msg_lock);
 168
 169         ret = hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter(
 170                                                 hwmgr, msg, parameter);
 171         if (ret) {
 172                 mutex_unlock(&hwmgr->msg_lock);
 173                 return ret;
 174         }
 175
 176         if (resp)
 177                 *resp = hwmgr->smumgr_funcs->get_argument(hwmgr);
 178
 179         mutex_unlock(&hwmgr->msg_lock);
 180
 181         return ret;
 182 }
 183
 184 int smum_init_smc_table(struct pp_hwmgr *hwmgr)
 185 {
 186         if (NULL != hwmgr->smumgr_funcs->init_smc_table)
 187                 return hwmgr->smumgr_funcs->init_smc_table(hwmgr);
 188
 189         return 0;
 190 }
 191
 192 int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
 193 {
 194         if (NULL != hwmgr->smumgr_funcs->populate_all_graphic_levels)
 195                 return hwmgr->smumgr_funcs->populate_all_graphic_levels(hwmgr);
 196
 197         return 0;
 198 }
 199
 200 int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
 201 {
 202         if (NULL != hwmgr->smumgr_funcs->populate_all_memory_levels)
 203                 return hwmgr->smumgr_funcs->populate_all_memory_levels(hwmgr);
 204
 205         return 0;
 206 }
 207
 208 /*this interface is needed by island ci/vi */
 209 int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr)
 210 {
 211         if (NULL != hwmgr->smumgr_funcs->initialize_mc_reg_table)
 212                 return hwmgr->smumgr_funcs->initialize_mc_reg_table(hwmgr);
 213
 214         return 0;
 215 }
 216
 217 bool smum_is_dpm_running(struct pp_hwmgr *hwmgr)
 218 {
 219         if (NULL != hwmgr->smumgr_funcs->is_dpm_running)
 220                 return hwmgr->smumgr_funcs->is_dpm_running(hwmgr);
 221
 222         return true;
 223 }
 224
 225 bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr)
 226 {
 227         if (hwmgr->smumgr_funcs->is_hw_avfs_present)
 228                 return hwmgr->smumgr_funcs->is_hw_avfs_present(hwmgr);
 229
 230         return false;
 231 }
 232
 233 int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting)
 234 {
 235         if (hwmgr->smumgr_funcs->update_dpm_settings)
 236                 return hwmgr->smumgr_funcs->update_dpm_settings(hwmgr, profile_setting);
 237
 238         return -EINVAL;
 239 }
 240
 241 int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw)
 242 {
 243         if (hwmgr->smumgr_funcs->smc_table_manager)
 244                 return hwmgr->smumgr_funcs->smc_table_manager(hwmgr, table, table_id, rw);
 245
 246         return -EINVAL;
 247 }