2 * Copyright 2019 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef __SMU_V12_0_H__
24 #define __SMU_V12_0_H__
26 #include "amdgpu_smu.h"
29 #define MP0_Public 0x03800000
30 #define MP0_SRAM 0x03900000
31 #define MP1_Public 0x03b00000
32 #define MP1_SRAM 0x03c00004
34 #if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3)
36 int smu_v12_0_check_fw_status(struct smu_context *smu);
38 int smu_v12_0_check_fw_version(struct smu_context *smu);
40 int smu_v12_0_powergate_sdma(struct smu_context *smu, bool gate);
42 int smu_v12_0_powergate_vcn(struct smu_context *smu, bool gate);
44 int smu_v12_0_powergate_jpeg(struct smu_context *smu, bool gate);
46 int smu_v12_0_set_gfx_cgpg(struct smu_context *smu, bool enable);
48 uint32_t smu_v12_0_get_gfxoff_status(struct smu_context *smu);
50 int smu_v12_0_gfx_off_control(struct smu_context *smu, bool enable);
52 int smu_v12_0_fini_smc_tables(struct smu_context *smu);
54 int smu_v12_0_set_default_dpm_tables(struct smu_context *smu);
56 int smu_v12_0_mode2_reset(struct smu_context *smu);
58 int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,
59 uint32_t min, uint32_t max);
61 int smu_v12_0_set_driver_table_location(struct smu_context *smu);
63 void smu_v12_0_init_gpu_metrics_v2_0(struct gpu_metrics_v2_0 *gpu_metrics);