2 * Copyright 2020 Advanced Micro Devices, Inc.
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24 #ifndef SMU_V11_0_7_PPSMC_H
25 #define SMU_V11_0_7_PPSMC_H
27 #define PPSMC_VERSION 0x1
29 // SMU Response Codes:
30 #define PPSMC_Result_OK 0x1
31 #define PPSMC_Result_Failed 0xFF
32 #define PPSMC_Result_UnknownCmd 0xFE
33 #define PPSMC_Result_CmdRejectedPrereq 0xFD
34 #define PPSMC_Result_CmdRejectedBusy 0xFC
36 // Message Definitions:
38 #define PPSMC_MSG_TestMessage 0x1
39 #define PPSMC_MSG_GetSmuVersion 0x2
40 #define PPSMC_MSG_GetDriverIfVersion 0x3
41 #define PPSMC_MSG_SetAllowedFeaturesMaskLow 0x4
42 #define PPSMC_MSG_SetAllowedFeaturesMaskHigh 0x5
43 #define PPSMC_MSG_EnableAllSmuFeatures 0x6
44 #define PPSMC_MSG_DisableAllSmuFeatures 0x7
45 #define PPSMC_MSG_EnableSmuFeaturesLow 0x8
46 #define PPSMC_MSG_EnableSmuFeaturesHigh 0x9
47 #define PPSMC_MSG_DisableSmuFeaturesLow 0xA
48 #define PPSMC_MSG_DisableSmuFeaturesHigh 0xB
49 #define PPSMC_MSG_GetRunningSmuFeaturesLow 0xC
50 #define PPSMC_MSG_GetRunningSmuFeaturesHigh 0xD
51 #define PPSMC_MSG_SetDriverDramAddrHigh 0xE
52 #define PPSMC_MSG_SetDriverDramAddrLow 0xF
53 #define PPSMC_MSG_SetToolsDramAddrHigh 0x10
54 #define PPSMC_MSG_SetToolsDramAddrLow 0x11
55 #define PPSMC_MSG_TransferTableSmu2Dram 0x12
56 #define PPSMC_MSG_TransferTableDram2Smu 0x13
57 #define PPSMC_MSG_UseDefaultPPTable 0x14
60 #define PPSMC_MSG_EnterBaco 0x15
61 #define PPSMC_MSG_ExitBaco 0x16
62 #define PPSMC_MSG_ArmD3 0x17
63 #define PPSMC_MSG_BacoAudioD3PME 0x18
66 #define PPSMC_MSG_SetSoftMinByFreq 0x19
67 #define PPSMC_MSG_SetSoftMaxByFreq 0x1A
68 #define PPSMC_MSG_SetHardMinByFreq 0x1B
69 #define PPSMC_MSG_SetHardMaxByFreq 0x1C
70 #define PPSMC_MSG_GetMinDpmFreq 0x1D
71 #define PPSMC_MSG_GetMaxDpmFreq 0x1E
72 #define PPSMC_MSG_GetDpmFreqByIndex 0x1F
73 #define PPSMC_MSG_OverridePcieParameters 0x20
75 //DramLog Set DramAddrHigh
76 #define PPSMC_MSG_DramLogSetDramAddrHigh 0x21
78 #define PPSMC_MSG_SetWorkloadMask 0x22
79 #define PPSMC_MSG_SetUclkFastSwitch 0x23
80 #define PPSMC_MSG_GetVoltageByDpm 0x24
81 #define PPSMC_MSG_SetVideoFps 0x25
82 #define PPSMC_MSG_GetDcModeMaxDpmFreq 0x26
84 //DramLog Set DramAddrLow
85 #define PPSMC_MSG_DramLogSetDramAddrLow 0x27
88 #define PPSMC_MSG_AllowGfxOff 0x28
89 #define PPSMC_MSG_DisallowGfxOff 0x29
90 #define PPSMC_MSG_PowerUpVcn 0x2A
91 #define PPSMC_MSG_PowerDownVcn 0x2B
92 #define PPSMC_MSG_PowerUpJpeg 0x2C
93 #define PPSMC_MSG_PowerDownJpeg 0x2D
96 #define PPSMC_MSG_PrepareMp1ForUnload 0x2E
98 //DramLog Set DramLog SetDramSize
99 #define PPSMC_MSG_DramLogSetDramSize 0x2F
101 #define PPSMC_MSG_Mode1Reset 0x30
103 //Set SystemVirtual DramAddrHigh
104 #define PPSMC_MSG_SetSystemVirtualDramAddrHigh 0x31
107 #define PPSMC_MSG_SetPptLimit 0x32
108 #define PPSMC_MSG_GetPptLimit 0x33
109 #define PPSMC_MSG_ReenableAcDcInterrupt 0x34
110 #define PPSMC_MSG_NotifyPowerSource 0x35
113 #define PPSMC_MSG_RunDcBtc 0x36
115 //Set SystemVirtual DramAddrLow
116 #define PPSMC_MSG_SetSystemVirtualDramAddrLow 0x38
119 #define PPSMC_MSG_SetMemoryChannelEnable 0x39
120 #define PPSMC_MSG_SetDramBitWidth 0x3A
121 #define PPSMC_MSG_SetGeminiMode 0x3B
122 #define PPSMC_MSG_SetGeminiApertureHigh 0x3C
123 #define PPSMC_MSG_SetGeminiApertureLow 0x3D
125 #define PPSMC_MSG_SetTemperatureInputSelect 0x3E
126 #define PPSMC_MSG_SetFwDstatesMask 0x3F
127 #define PPSMC_MSG_SetThrottlerMask 0x40
129 #define PPSMC_MSG_SetExternalClientDfCstateAllow 0x41
130 #define PPSMC_MSG_EnableOutOfBandMonTesting 0x42
131 #define PPSMC_MSG_SetMGpuFanBoostLimitRpm 0x43
133 #define PPSMC_MSG_SetNumBadHbmPagesRetired 0x44
134 #define PPSMC_MSG_SetGpoFeaturePMask 0x45
135 #define PPSMC_MSG_SetSMBUSInterrupt 0x46
137 #define PPSMC_Message_Count 0x47