2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #ifndef __DC_HW_SEQUENCER_H__
27 #define __DC_HW_SEQUENCER_H__
29 #include "clock_source.h"
30 #include "inc/hw/timing_generator.h"
31 #include "inc/hw/opp.h"
32 #include "inc/hw/link_encoder.h"
33 #include "core_status.h"
42 struct dc_stream_status;
43 struct dc_writeback_info;
44 struct dchub_init_data;
45 struct dc_static_screen_params;
47 struct dc_phy_addr_space_config;
48 struct dc_virtual_addr_space_config;
52 struct hw_sequencer_funcs {
53 /* Embedded Display Related */
54 void (*edp_power_control)(struct dc_link *link, bool enable);
55 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
57 /* Pipe Programming Related */
58 void (*init_hw)(struct dc *dc);
59 void (*enable_accelerated_mode)(struct dc *dc,
60 struct dc_state *context);
61 enum dc_status (*apply_ctx_to_hw)(struct dc *dc,
62 struct dc_state *context);
63 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
64 void (*apply_ctx_for_surface)(struct dc *dc,
65 const struct dc_stream_state *stream,
66 int num_planes, struct dc_state *context);
67 void (*program_front_end_for_ctx)(struct dc *dc,
68 struct dc_state *context);
69 void (*post_unlock_program_front_end)(struct dc *dc,
70 struct dc_state *context);
71 void (*update_plane_addr)(const struct dc *dc,
72 struct pipe_ctx *pipe_ctx);
73 void (*update_dchub)(struct dce_hwseq *hws,
74 struct dchub_init_data *dh_data);
75 void (*wait_for_mpcc_disconnect)(struct dc *dc,
76 struct resource_pool *res_pool,
77 struct pipe_ctx *pipe_ctx);
78 void (*program_triplebuffer)(const struct dc *dc,
79 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer);
80 void (*update_pending_status)(struct pipe_ctx *pipe_ctx);
82 /* Pipe Lock Related */
83 void (*pipe_control_lock)(struct dc *dc,
84 struct pipe_ctx *pipe, bool lock);
85 void (*interdependent_update_lock)(struct dc *dc,
86 struct dc_state *context, bool lock);
87 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx,
89 void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock);
92 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
93 struct crtc_position *position);
94 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx);
95 void (*enable_per_frame_crtc_position_reset)(struct dc *dc,
96 int group_size, struct pipe_ctx *grouped_pipes[]);
97 void (*enable_timing_synchronization)(struct dc *dc,
98 int group_index, int group_size,
99 struct pipe_ctx *grouped_pipes[]);
100 void (*setup_periodic_interrupt)(struct dc *dc,
101 struct pipe_ctx *pipe_ctx,
102 enum vline_select vline);
103 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
104 unsigned int vmin, unsigned int vmax,
105 unsigned int vmid, unsigned int vmid_frame_number);
106 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
108 const struct dc_static_screen_params *events);
111 void (*enable_stream)(struct pipe_ctx *pipe_ctx);
112 void (*disable_stream)(struct pipe_ctx *pipe_ctx);
113 void (*blank_stream)(struct pipe_ctx *pipe_ctx);
114 void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
115 struct dc_link_settings *link_settings);
117 /* Bandwidth Related */
118 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);
119 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);
120 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);
122 /* Infopacket Related */
123 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
124 void (*send_immediate_sdp_message)(
125 struct pipe_ctx *pipe_ctx,
126 const uint8_t *custom_sdp_message,
127 unsigned int sdp_message_size);
128 void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
129 void (*set_dmdata_attributes)(struct pipe_ctx *pipe);
130 void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx);
131 bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx);
134 void (*set_cursor_position)(struct pipe_ctx *pipe);
135 void (*set_cursor_attribute)(struct pipe_ctx *pipe);
136 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
139 void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx);
140 void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx,
141 enum dc_color_space colorspace,
142 uint16_t *matrix, int opp_id);
145 int (*init_sys_ctx)(struct dce_hwseq *hws,
147 struct dc_phy_addr_space_config *pa_config);
148 void (*init_vm_ctx)(struct dce_hwseq *hws,
150 struct dc_virtual_addr_space_config *va_config,
153 /* Writeback Related */
154 void (*update_writeback)(struct dc *dc,
155 struct dc_writeback_info *wb_info,
156 struct dc_state *context);
157 void (*enable_writeback)(struct dc *dc,
158 struct dc_writeback_info *wb_info,
159 struct dc_state *context);
160 void (*disable_writeback)(struct dc *dc,
161 unsigned int dwb_pipe_inst);
163 bool (*mmhubbub_warmup)(struct dc *dc,
164 unsigned int num_dwb,
165 struct dc_writeback_info *wb_info);
168 enum dc_status (*set_clock)(struct dc *dc,
169 enum dc_clock_type clock_type,
170 uint32_t clk_khz, uint32_t stepping);
171 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
172 struct dc_clock_config *clock_cfg);
173 void (*optimize_pwr_state)(const struct dc *dc,
174 struct dc_state *context);
175 void (*exit_optimized_pwr_state)(const struct dc *dc,
176 struct dc_state *context);
179 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
180 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx);
182 /* Stereo 3D Related */
183 void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc);
185 /* HW State Logging Related */
186 void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx);
187 void (*get_hw_state)(struct dc *dc, char *pBuf,
188 unsigned int bufSize, unsigned int mask);
189 void (*clear_status_bits)(struct dc *dc, unsigned int mask);
194 void color_space_to_black_color(
196 enum dc_color_space colorspace,
197 struct tg_color *black_color);
199 bool hwss_wait_for_blank_complete(
200 struct timing_generator *tg);
202 const uint16_t *find_color_matrix(
203 enum dc_color_space color_space,
204 uint32_t *array_size);
206 #endif /* __DC_HW_SEQUENCER_H__ */