2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #ifndef __DC_HW_SEQUENCER_H__
27 #define __DC_HW_SEQUENCER_H__
29 #include "clock_source.h"
30 #include "inc/hw/timing_generator.h"
31 #include "inc/hw/link_encoder.h"
32 #include "core_status.h"
34 enum pipe_gating_control {
35 PIPE_GATING_CONTROL_DISABLE = 0,
36 PIPE_GATING_CONTROL_ENABLE,
37 PIPE_GATING_CONTROL_INIT
41 bool blnd_crtc_trigger;
43 bool false_optc_underflow;
46 struct hwseq_wa_state {
47 bool DEGVIDCN10_253_applied;
51 struct dc_context *ctx;
52 const struct dce_hwseq_registers *regs;
53 const struct dce_hwseq_shift *shifts;
54 const struct dce_hwseq_mask *masks;
55 struct dce_hwseq_wa wa;
56 struct hwseq_wa_state wa_state;
61 struct dchub_init_data;
62 struct dc_static_screen_events;
64 struct resource_context;
66 struct hw_sequencer_funcs {
68 void (*init_hw)(struct dc *dc);
70 enum dc_status (*apply_ctx_to_hw)(
71 struct dc *dc, struct dc_state *context);
73 void (*reset_hw_ctx_wrap)(
74 struct dc *dc, struct dc_state *context);
76 void (*apply_ctx_for_surface)(
78 const struct dc_stream_state *stream,
80 struct dc_state *context);
82 void (*set_plane_config)(
84 struct pipe_ctx *pipe_ctx,
85 struct resource_context *res_ctx);
87 void (*program_gamut_remap)(
88 struct pipe_ctx *pipe_ctx);
90 void (*program_csc_matrix)(
91 struct pipe_ctx *pipe_ctx,
92 enum dc_color_space colorspace,
95 void (*update_plane_addr)(
97 struct pipe_ctx *pipe_ctx);
100 struct dce_hwseq *hws,
101 struct dchub_init_data *dh_data);
103 void (*update_pending_status)(
104 struct pipe_ctx *pipe_ctx);
106 bool (*set_input_transfer_func)(
107 struct pipe_ctx *pipe_ctx,
108 const struct dc_plane_state *plane_state);
110 bool (*set_output_transfer_func)(
111 struct pipe_ctx *pipe_ctx,
112 const struct dc_stream_state *stream);
114 void (*power_down)(struct dc *dc);
116 void (*enable_accelerated_mode)(struct dc *dc);
118 void (*enable_timing_synchronization)(
122 struct pipe_ctx *grouped_pipes[]);
124 void (*enable_per_frame_crtc_position_reset)(
127 struct pipe_ctx *grouped_pipes[]);
129 void (*enable_display_pipe_clock_gating)(
130 struct dc_context *ctx,
133 bool (*enable_display_power_gating)(
135 uint8_t controller_id,
137 enum pipe_gating_control power_gating);
139 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
141 void (*enable_plane)(struct dc *dc,
142 struct pipe_ctx *pipe,
143 struct dc_state *context);
145 void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
147 void (*enable_stream)(struct pipe_ctx *pipe_ctx);
149 void (*disable_stream)(struct pipe_ctx *pipe_ctx,
152 void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
153 struct dc_link_settings *link_settings);
155 void (*pipe_control_lock)(
157 struct pipe_ctx *pipe,
160 void (*set_bandwidth)(
162 struct dc_state *context,
163 bool decrease_allowed);
165 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
168 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
169 struct crtc_position *position);
171 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
172 int num_pipes, const struct dc_static_screen_events *events);
174 enum dc_status (*prog_pixclk_crtc_otg)(
175 struct pipe_ctx *pipe_ctx,
176 struct dc_state *context,
179 void (*setup_stereo)(
180 struct pipe_ctx *pipe_ctx,
183 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
185 void (*log_hw_state)(struct dc *dc);
187 void (*wait_for_mpcc_disconnect)(struct dc *dc,
188 struct resource_pool *res_pool,
189 struct pipe_ctx *pipe_ctx);
191 void (*ready_shared_resources)(struct dc *dc, struct dc_state *context);
192 void (*optimize_shared_resources)(struct dc *dc);
193 void (*pplib_apply_display_requirements)(
195 struct dc_state *context);
196 void (*edp_power_control)(
197 struct dc_link *link,
199 void (*edp_backlight_control)(
200 struct dc_link *link,
205 void color_space_to_black_color(
207 enum dc_color_space colorspace,
208 struct tg_color *black_color);
210 bool hwss_wait_for_blank_complete(
211 struct timing_generator *tg);
213 #endif /* __DC_HW_SEQUENCER_H__ */