2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #ifndef __DAL_HW_SHARED_H__
27 #define __DAL_HW_SHARED_H__
30 #include "fixed31_32.h"
31 #include "dc_hw_types.h"
33 /******************************************************************************
34 * Data types shared between different Virtual HW blocks
35 ******************************************************************************/
41 uint32_t segments_num;
47 struct fixed31_32 offset;
48 struct fixed31_32 slope;
50 uint32_t custom_float_x;
51 uint32_t custom_float_y;
52 uint32_t custom_float_offset;
53 uint32_t custom_float_slope;
56 struct pwl_result_data {
57 struct fixed31_32 red;
58 struct fixed31_32 green;
59 struct fixed31_32 blue;
61 struct fixed31_32 delta_red;
62 struct fixed31_32 delta_green;
63 struct fixed31_32 delta_blue;
69 uint32_t delta_red_reg;
70 uint32_t delta_green_reg;
71 uint32_t delta_blue_reg;
75 struct gamma_curve arr_curve_points[34];
76 struct curve_points arr_points[2];
77 struct pwl_result_data rgb_resulted[256 + 3];
78 uint32_t hw_points_num;
82 * while we are moving functionality out of opp to dpp to align
83 * HW programming to HW IP, we define these struct in hw_shared
84 * so we can still compile while refactoring
88 /* do not change the values because it is used as bit vector */
89 LB_PIXEL_DEPTH_18BPP = 1,
90 LB_PIXEL_DEPTH_24BPP = 2,
91 LB_PIXEL_DEPTH_30BPP = 4,
92 LB_PIXEL_DEPTH_36BPP = 8
95 enum graphics_csc_adjust_type {
96 GRAPHICS_CSC_ADJUST_TYPE_BYPASS = 0,
97 GRAPHICS_CSC_ADJUST_TYPE_HW, /* without adjustments */
98 GRAPHICS_CSC_ADJUST_TYPE_SW /*use adjustments */
101 enum ipp_degamma_mode {
102 IPP_DEGAMMA_MODE_BYPASS,
103 IPP_DEGAMMA_MODE_HW_sRGB,
104 IPP_DEGAMMA_MODE_HW_xvYCC,
105 IPP_DEGAMMA_MODE_USER_PWL
108 enum ipp_output_format {
109 IPP_OUTPUT_FORMAT_12_BIT_FIX,
110 IPP_OUTPUT_FORMAT_16_BIT_BYPASS,
111 IPP_OUTPUT_FORMAT_FLOAT
114 enum expansion_mode {
115 EXPANSION_MODE_DYNAMIC,
119 struct default_adjustment {
120 enum lb_pixel_depth lb_color_depth;
121 enum dc_color_space out_color_space;
122 enum dc_color_space in_color_space;
123 enum dc_color_depth color_depth;
124 enum pixel_format surface_pixel_format;
125 enum graphics_csc_adjust_type csc_adjust_type;
126 bool force_hw_default;
129 struct out_csc_color_matrix {
130 enum dc_color_space color_space;
134 struct output_csc_matrix {
135 enum dc_color_space color_space;
139 static const struct output_csc_matrix output_csc_matrix[] = {
141 { 0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
142 { COLOR_SPACE_SRGB_LIMITED,
143 { 0x1B67, 0, 0, 0x201, 0, 0x1B67, 0, 0x201, 0, 0, 0x1B67, 0x201} },
144 { COLOR_SPACE_YCBCR601,
145 { 0xE04, 0xF444, 0xFDB9, 0x1004, 0x831, 0x1016, 0x320, 0x201, 0xFB45,
146 0xF6B7, 0xE04, 0x1004} },
147 { COLOR_SPACE_YCBCR709,
148 { 0xE04, 0xF345, 0xFEB7, 0x1004, 0x5D3, 0x1399, 0x1FA,
149 0x201, 0xFCCA, 0xF533, 0xE04, 0x1004} },
151 /* TODO: correct values below */
152 { COLOR_SPACE_YCBCR601_LIMITED,
153 { 0xE00, 0xF447, 0xFDB9, 0x1000, 0x991,
154 0x12C9, 0x3A6, 0x200, 0xFB47, 0xF6B9, 0xE00, 0x1000} },
155 { COLOR_SPACE_YCBCR709_LIMITED,
156 { 0xE00, 0xF349, 0xFEB7, 0x1000, 0x6CE, 0x16E3,
157 0x24F, 0x200, 0xFCCB, 0xF535, 0xE00, 0x1000} },
161 OPP_REGAMMA_BYPASS = 0,
167 struct csc_transform {
169 bool enable_adjustment;
172 struct dc_bias_and_scale {
175 uint16_t scale_green;
181 enum test_pattern_dyn_range {
182 TEST_PATTERN_DYN_RANGE_VESA = 0,
183 TEST_PATTERN_DYN_RANGE_CEA
186 enum test_pattern_mode {
187 TEST_PATTERN_MODE_COLORSQUARES_RGB = 0,
188 TEST_PATTERN_MODE_COLORSQUARES_YCBCR601,
189 TEST_PATTERN_MODE_COLORSQUARES_YCBCR709,
190 TEST_PATTERN_MODE_VERTICALBARS,
191 TEST_PATTERN_MODE_HORIZONTALBARS,
192 TEST_PATTERN_MODE_SINGLERAMP_RGB,
193 TEST_PATTERN_MODE_DUALRAMP_RGB
196 enum test_pattern_color_format {
197 TEST_PATTERN_COLOR_FORMAT_BPC_6 = 0,
198 TEST_PATTERN_COLOR_FORMAT_BPC_8,
199 TEST_PATTERN_COLOR_FORMAT_BPC_10,
200 TEST_PATTERN_COLOR_FORMAT_BPC_12
203 enum controller_dp_test_pattern {
204 CONTROLLER_DP_TEST_PATTERN_D102 = 0,
205 CONTROLLER_DP_TEST_PATTERN_SYMBOLERROR,
206 CONTROLLER_DP_TEST_PATTERN_PRBS7,
207 CONTROLLER_DP_TEST_PATTERN_COLORSQUARES,
208 CONTROLLER_DP_TEST_PATTERN_VERTICALBARS,
209 CONTROLLER_DP_TEST_PATTERN_HORIZONTALBARS,
210 CONTROLLER_DP_TEST_PATTERN_COLORRAMP,
211 CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
212 CONTROLLER_DP_TEST_PATTERN_RESERVED_8,
213 CONTROLLER_DP_TEST_PATTERN_RESERVED_9,
214 CONTROLLER_DP_TEST_PATTERN_RESERVED_A,
215 CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA
218 #endif /* __DAL_HW_SHARED_H__ */