2 * Copyright 2017 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #ifndef __DISPLAY_MODE_ENUMS_H__
26 #define __DISPLAY_MODE_ENUMS_H__
28 enum output_encoder_class {
29 dm_dp = 0, dm_hdmi = 1, dm_wb = 2, dm_edp
31 enum output_format_class {
32 dm_444 = 0, dm_420 = 1, dm_n422, dm_s422
34 enum source_format_class {
45 dm_mono_16 = dm_444_16,
49 enum output_bpc_class {
50 dm_out_6 = 0, dm_out_8 = 1, dm_out_10 = 2, dm_out_12 = 3, dm_out_16 = 4
52 enum scan_direction_class {
53 dm_horz = 0, dm_vert = 1
55 enum dm_swizzle_mode {
88 dm_sw_gfx7_2d_thin_l_vp,
89 dm_sw_gfx7_2d_thin_gl,
92 dm_lb_10 = 0, dm_lb_8 = 1, dm_lb_6 = 2, dm_lb_12 = 3, dm_lb_16 = 4,
96 dm_vmin = 0, dm_vmid = 1, dm_vnom = 2, dm_vmax = 3
98 enum source_macro_tile_size {
99 dm_4k_tile = 0, dm_64k_tile = 1, dm_256k_tile = 2
102 dm_cur_2bit = 0, dm_cur_32bit = 1, dm_cur_64bit = 2
104 enum clock_change_support {
105 dm_dram_clock_change_uninitialized = 0,
106 dm_dram_clock_change_vactive,
107 dm_dram_clock_change_vblank,
108 dm_dram_clock_change_unsupported
111 enum output_standard {
112 dm_std_uninitialized = 0, dm_std_cvtr2, dm_std_cvt
115 enum mpc_combine_affinity {
116 dm_mpc_always_when_possible,
117 dm_mpc_reduce_voltage,
118 dm_mpc_reduce_voltage_and_clocks,
123 REQ_256Bytes, REQ_128BytesNonContiguous, REQ_128BytesContiguous, REQ_NA
126 enum self_refresh_affinity {
127 dm_try_to_allow_self_refresh_and_mclk_switch,
128 dm_allow_self_refresh_and_mclk_switch,
129 dm_allow_self_refresh,
130 dm_neither_self_refresh_nor_mclk_switch
133 enum dm_validation_status {
135 DML_FAIL_SCALE_RATIO_TAP,
136 DML_FAIL_SOURCE_PIXEL_FORMAT,
137 DML_FAIL_VIEWPORT_SIZE,
138 DML_FAIL_TOTAL_V_ACTIVE_BW,
139 DML_FAIL_DIO_SUPPORT,
140 DML_FAIL_NOT_ENOUGH_DSC,
141 DML_FAIL_DSC_CLK_REQUIRED,
142 DML_FAIL_DSC_VALIDATION_FAILURE,
143 DML_FAIL_URGENT_LATENCY,
144 DML_FAIL_REORDERING_BUFFER,
145 DML_FAIL_DISPCLK_DPPCLK,
146 DML_FAIL_TOTAL_AVAILABLE_PIPES,
148 DML_FAIL_WRITEBACK_MODE,
149 DML_FAIL_WRITEBACK_LATENCY,
150 DML_FAIL_WRITEBACK_SCALE_RATIO_TAP,
151 DML_FAIL_CURSOR_SUPPORT,
152 DML_FAIL_PITCH_SUPPORT,
153 DML_FAIL_PTE_BUFFER_SIZE,
154 DML_FAIL_HOST_VM_IMMEDIATE_FLIP,
155 DML_FAIL_DSC_INPUT_BPC,
156 DML_FAIL_PREFETCH_SUPPORT,
157 DML_FAIL_V_RATIO_PREFETCH,
160 enum writeback_config {
162 dm_whole_buffer_for_single_stream_no_interleave,
163 dm_whole_buffer_for_single_stream_interleave,
166 enum odm_combine_mode {
167 dm_odm_combine_mode_disabled,
168 dm_odm_combine_mode_2to1,
169 dm_odm_combine_mode_4to1,
172 enum odm_combine_policy {
173 dm_odm_combine_policy_dal,
174 dm_odm_combine_policy_none,
175 dm_odm_combine_policy_2to1,
176 dm_odm_combine_policy_4to1,
179 enum immediate_flip_requirement {
180 dm_immediate_flip_not_required,
181 dm_immediate_flip_required,
184 enum unbounded_requesting_policy {
185 dm_unbounded_requesting,
186 dm_unbounded_requesting_edp_only,
187 dm_unbounded_requesting_disable