1 /* SPDX-License-Identifier: MIT */
3 * Copyright 2022 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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27 #ifndef __DCN32_FPU_H__
28 #define __DCN32_FPU_H__
30 #include "clk_mgr_internal.h"
32 #define DCN3_2_DEFAULT_DET_SIZE 256
33 #define DCN3_2_MAX_DET_SIZE 1152
34 #define DCN3_2_MIN_DET_SIZE 128
35 #define DCN3_2_MIN_COMPBUF_SIZE_KB 128
37 void dcn32_build_wm_range_table_fpu(struct clk_mgr_internal *clk_mgr);
39 void dcn32_helper_populate_phantom_dlg_params(struct dc *dc,
40 struct dc_state *context,
41 display_e2e_pipe_params_st *pipes,
44 bool dcn32_predict_pipe_split(struct dc_state *context,
45 display_pipe_params_st pipe,
48 void insert_entry_into_table_sorted(struct _vcs_dpi_voltage_scaling_st *table,
49 unsigned int *num_entries,
50 struct _vcs_dpi_voltage_scaling_st *entry);
52 void dcn32_set_phantom_stream_timing(struct dc *dc,
53 struct dc_state *context,
54 struct pipe_ctx *ref_pipe,
55 struct dc_stream_state *phantom_stream,
56 display_e2e_pipe_params_st *pipes,
57 unsigned int pipe_cnt,
58 unsigned int dc_pipe_idx);