Merge tag 'imx-drm-fixes-2022-04-06' of git://git.pengutronix.de/pza/linux into drm...
[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / display / dc / dcn31 / dcn31_hubp.c
1 /*
2  * Copyright 2012-20 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25
26 #include "dm_services.h"
27 #include "dce_calcs.h"
28 #include "reg_helper.h"
29 #include "basics/conversion.h"
30 #include "dcn31_hubp.h"
31
32 #define REG(reg)\
33         hubp2->hubp_regs->reg
34
35 #define CTX \
36         hubp2->base.ctx
37
38 #undef FN
39 #define FN(reg_name, field_name) \
40         hubp2->hubp_shift->field_name, hubp2->hubp_mask->field_name
41
42 void hubp31_set_unbounded_requesting(struct hubp *hubp, bool enable)
43 {
44         struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
45
46         REG_UPDATE(DCHUBP_CNTL, HUBP_UNBOUNDED_REQ_MODE, enable);
47         REG_UPDATE(CURSOR_CONTROL, CURSOR_REQ_MODE, enable);
48 }
49
50 void hubp31_soft_reset(struct hubp *hubp, bool reset)
51 {
52         struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
53
54         REG_UPDATE(DCHUBP_CNTL, HUBP_SOFT_RESET, reset);
55 }
56
57 void hubp31_program_extended_blank(struct hubp *hubp, unsigned int min_dst_y_next_start_optimized)
58 {
59         struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
60
61         REG_SET(BLANK_OFFSET_1, 0, MIN_DST_Y_NEXT_START, min_dst_y_next_start_optimized);
62 }
63
64 static struct hubp_funcs dcn31_hubp_funcs = {
65         .hubp_enable_tripleBuffer = hubp2_enable_triplebuffer,
66         .hubp_is_triplebuffer_enabled = hubp2_is_triplebuffer_enabled,
67         .hubp_program_surface_flip_and_addr = hubp3_program_surface_flip_and_addr,
68         .hubp_program_surface_config = hubp3_program_surface_config,
69         .hubp_is_flip_pending = hubp2_is_flip_pending,
70         .hubp_setup = hubp3_setup,
71         .hubp_setup_interdependent = hubp2_setup_interdependent,
72         .hubp_set_vm_system_aperture_settings = hubp3_set_vm_system_aperture_settings,
73         .set_blank = hubp2_set_blank,
74         .dcc_control = hubp3_dcc_control,
75         .mem_program_viewport = min_set_viewport,
76         .set_cursor_attributes  = hubp2_cursor_set_attributes,
77         .set_cursor_position    = hubp2_cursor_set_position,
78         .hubp_clk_cntl = hubp2_clk_cntl,
79         .hubp_vtg_sel = hubp2_vtg_sel,
80         .dmdata_set_attributes = hubp3_dmdata_set_attributes,
81         .dmdata_load = hubp2_dmdata_load,
82         .dmdata_status_done = hubp2_dmdata_status_done,
83         .hubp_read_state = hubp3_read_state,
84         .hubp_clear_underflow = hubp2_clear_underflow,
85         .hubp_set_flip_control_surface_gsl = hubp2_set_flip_control_surface_gsl,
86         .hubp_init = hubp3_init,
87         .set_unbounded_requesting = hubp31_set_unbounded_requesting,
88         .hubp_soft_reset = hubp31_soft_reset,
89         .hubp_in_blank = hubp1_in_blank,
90         .program_extended_blank = hubp31_program_extended_blank,
91 };
92
93 bool hubp31_construct(
94         struct dcn20_hubp *hubp2,
95         struct dc_context *ctx,
96         uint32_t inst,
97         const struct dcn_hubp2_registers *hubp_regs,
98         const struct dcn_hubp2_shift *hubp_shift,
99         const struct dcn_hubp2_mask *hubp_mask)
100 {
101         hubp2->base.funcs = &dcn31_hubp_funcs;
102         hubp2->base.ctx = ctx;
103         hubp2->hubp_regs = hubp_regs;
104         hubp2->hubp_shift = hubp_shift;
105         hubp2->hubp_mask = hubp_mask;
106         hubp2->base.inst = inst;
107         hubp2->base.opp_id = OPP_ID_INVALID;
108         hubp2->base.mpcc_id = 0xf;
109
110         return true;
111 }