2 * Copyright 2016 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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26 #ifndef __DC_HWSS_DCN10_H__
27 #define __DC_HWSS_DCN10_H__
29 #include "core_types.h"
30 #include "hw_sequencer_private.h"
34 void dcn10_hw_sequencer_construct(struct dc *dc);
36 int dcn10_get_vupdate_offset_from_vsync(struct pipe_ctx *pipe_ctx);
37 void dcn10_calc_vupdate_position(
39 struct pipe_ctx *pipe_ctx,
42 void dcn10_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx);
43 enum dc_status dcn10_enable_stream_timing(
44 struct pipe_ctx *pipe_ctx,
45 struct dc_state *context,
47 void dcn10_optimize_bandwidth(
49 struct dc_state *context);
50 void dcn10_prepare_bandwidth(
52 struct dc_state *context);
53 void dcn10_pipe_control_lock(
55 struct pipe_ctx *pipe,
57 void dcn10_cursor_lock(struct dc *dc, struct pipe_ctx *pipe, bool lock);
58 void dcn10_blank_pixel_data(
60 struct pipe_ctx *pipe_ctx,
62 void dcn10_unblank_stream(struct pipe_ctx *pipe_ctx,
63 struct dc_link_settings *link_settings);
64 void dcn10_program_output_csc(struct dc *dc,
65 struct pipe_ctx *pipe_ctx,
66 enum dc_color_space colorspace,
69 bool dcn10_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
70 const struct dc_stream_state *stream);
71 bool dcn10_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
72 const struct dc_plane_state *plane_state);
73 void dcn10_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx);
74 void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx);
75 void dcn10_reset_hw_ctx_wrap(
77 struct dc_state *context);
78 void dcn10_disable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx);
79 void dcn10_lock_all_pipes(
81 struct dc_state *context,
83 void dcn10_apply_ctx_for_surface(
85 const struct dc_stream_state *stream,
87 struct dc_state *context);
88 void dcn10_post_unlock_program_front_end(
90 struct dc_state *context);
91 void dcn10_hubp_pg_control(
92 struct dce_hwseq *hws,
93 unsigned int hubp_inst,
95 void dcn10_dpp_pg_control(
96 struct dce_hwseq *hws,
97 unsigned int dpp_inst,
99 void dcn10_enable_power_gating_plane(
100 struct dce_hwseq *hws,
102 void dcn10_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx);
103 void dcn10_disable_vga(
104 struct dce_hwseq *hws);
105 void dcn10_program_pipe(
107 struct pipe_ctx *pipe_ctx,
108 struct dc_state *context);
109 void dcn10_program_gamut_remap(struct pipe_ctx *pipe_ctx);
110 void dcn10_init_hw(struct dc *dc);
111 void dcn10_init_pipes(struct dc *dc, struct dc_state *context);
112 void dcn10_power_down_on_boot(struct dc *dc);
113 enum dc_status dce110_apply_ctx_to_hw(
115 struct dc_state *context);
116 void dcn10_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx);
117 void dcn10_update_dchub(struct dce_hwseq *hws, struct dchub_init_data *dh_data);
118 void dcn10_update_pending_status(struct pipe_ctx *pipe_ctx);
119 void dce110_power_down(struct dc *dc);
120 void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context);
121 void dcn10_enable_timing_synchronization(
125 struct pipe_ctx *grouped_pipes[]);
126 void dcn10_enable_per_frame_crtc_position_reset(
129 struct pipe_ctx *grouped_pipes[]);
130 void dce110_update_info_frame(struct pipe_ctx *pipe_ctx);
131 void dcn10_send_immediate_sdp_message(struct pipe_ctx *pipe_ctx,
132 const uint8_t *custom_sdp_message,
133 unsigned int sdp_message_size);
134 void dce110_blank_stream(struct pipe_ctx *pipe_ctx);
135 void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx);
136 void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx);
137 bool dcn10_dummy_display_power_gating(
139 uint8_t controller_id,
141 enum pipe_gating_control power_gating);
142 void dcn10_set_drr(struct pipe_ctx **pipe_ctx,
143 int num_pipes, unsigned int vmin, unsigned int vmax,
144 unsigned int vmid, unsigned int vmid_frame_number);
145 void dcn10_get_position(struct pipe_ctx **pipe_ctx,
147 struct crtc_position *position);
148 void dcn10_set_static_screen_control(struct pipe_ctx **pipe_ctx,
149 int num_pipes, const struct dc_static_screen_params *params);
150 void dcn10_setup_stereo(struct pipe_ctx *pipe_ctx, struct dc *dc);
151 void dce110_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
152 void dcn10_log_hw_state(struct dc *dc,
153 struct dc_log_buffer_ctx *log_ctx);
154 void dcn10_get_hw_state(struct dc *dc,
156 unsigned int bufSize,
158 void dcn10_clear_status_bits(struct dc *dc, unsigned int mask);
159 void dcn10_wait_for_mpcc_disconnect(
161 struct resource_pool *res_pool,
162 struct pipe_ctx *pipe_ctx);
163 void dce110_edp_backlight_control(
164 struct dc_link *link,
166 void dce110_edp_power_control(
167 struct dc_link *link,
169 void dce110_edp_wait_for_hpd_ready(
170 struct dc_link *link,
172 void dcn10_set_cursor_position(struct pipe_ctx *pipe_ctx);
173 void dcn10_set_cursor_attribute(struct pipe_ctx *pipe_ctx);
174 void dcn10_set_cursor_sdr_white_level(struct pipe_ctx *pipe_ctx);
175 void dcn10_setup_periodic_interrupt(
177 struct pipe_ctx *pipe_ctx,
178 enum vline_select vline);
179 enum dc_status dcn10_set_clock(struct dc *dc,
180 enum dc_clock_type clock_type,
183 void dcn10_get_clock(struct dc *dc,
184 enum dc_clock_type clock_type,
185 struct dc_clock_config *clock_cfg);
186 bool dcn10_did_underflow_occur(struct dc *dc, struct pipe_ctx *pipe_ctx);
187 void dcn10_bios_golden_init(struct dc *dc);
188 void dcn10_plane_atomic_power_down(struct dc *dc,
191 void dcn10_get_surface_visual_confirm_color(
192 const struct pipe_ctx *pipe_ctx,
193 struct tg_color *color);
194 void dcn10_get_hdr_visual_confirm_color(
195 struct pipe_ctx *pipe_ctx,
196 struct tg_color *color);
197 void dcn10_set_hdr_multiplier(struct pipe_ctx *pipe_ctx);
198 void dcn10_verify_allow_pstate_change_high(struct dc *dc);
200 #endif /* __DC_HWSS_DCN10_H__ */