drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include "dm_services.h"
  27
  28 #include "ObjectID.h"
  29 #include "atomfirmware.h"
  30
  31 #include "include/bios_parser_types.h"
  32
  33 #include "command_table_helper2.h"
  34
  35 bool dal_bios_parser_init_cmd_tbl_helper2(
  36         const struct command_table_helper **h,
  37         enum dce_version dce)
  38 {
  39         switch (dce) {
  40 #if defined(CONFIG_DRM_AMD_DC_SI)
  41         case DCE_VERSION_6_0:
  42         case DCE_VERSION_6_1:
  43         case DCE_VERSION_6_4:
  44                 *h = dal_cmd_tbl_helper_dce60_get_table();
  45                 return true;
  46 #endif
  47
  48         case DCE_VERSION_8_0:
  49         case DCE_VERSION_8_1:
  50         case DCE_VERSION_8_3:
  51                 *h = dal_cmd_tbl_helper_dce80_get_table();
  52                 return true;
  53
  54         case DCE_VERSION_10_0:
  55                 *h = dal_cmd_tbl_helper_dce110_get_table();
  56                 return true;
  57
  58         case DCE_VERSION_11_0:
  59                 *h = dal_cmd_tbl_helper_dce110_get_table();
  60                 return true;
  61
  62         case DCE_VERSION_11_2:
  63         case DCE_VERSION_11_22:
  64         case DCE_VERSION_12_0:
  65         case DCE_VERSION_12_1:
  66                 *h = dal_cmd_tbl_helper_dce112_get_table2();
  67                 return true;
  68 #if defined(CONFIG_DRM_AMD_DC_DCN)
  69         case DCN_VERSION_1_0:
  70         case DCN_VERSION_1_01:
  71         case DCN_VERSION_2_0:
  72         case DCN_VERSION_2_1:
  73         case DCN_VERSION_2_01:
  74         case DCN_VERSION_3_0:
  75         case DCN_VERSION_3_01:
  76         case DCN_VERSION_3_02:
  77         case DCN_VERSION_3_03:
  78         case DCN_VERSION_3_1:
  79                 *h = dal_cmd_tbl_helper_dce112_get_table2();
  80                 return true;
  81 #endif
  82         default:
  83                 /* Unsupported DCE */
  84                 BREAK_TO_DEBUGGER();
  85                 return false;
  86         }
  87 }
  88
  89 /* real implementations */
  90
  91 bool dal_cmd_table_helper_controller_id_to_atom2(
  92         enum controller_id id,
  93         uint8_t *atom_id)
  94 {
  95         if (atom_id == NULL) {
  96                 BREAK_TO_DEBUGGER();
  97                 return false;
  98         }
  99
 100         switch (id) {
 101         case CONTROLLER_ID_D0:
 102                 *atom_id = ATOM_CRTC1;
 103                 return true;
 104         case CONTROLLER_ID_D1:
 105                 *atom_id = ATOM_CRTC2;
 106                 return true;
 107         case CONTROLLER_ID_D2:
 108                 *atom_id = ATOM_CRTC3;
 109                 return true;
 110         case CONTROLLER_ID_D3:
 111                 *atom_id = ATOM_CRTC4;
 112                 return true;
 113         case CONTROLLER_ID_D4:
 114                 *atom_id = ATOM_CRTC5;
 115                 return true;
 116         case CONTROLLER_ID_D5:
 117                 *atom_id = ATOM_CRTC6;
 118                 return true;
 119         /* TODO :case CONTROLLER_ID_UNDERLAY0:
 120                 *atom_id = ATOM_UNDERLAY_PIPE0;
 121                 return true;
 122         */
 123         case CONTROLLER_ID_UNDEFINED:
 124                 *atom_id = ATOM_CRTC_INVALID;
 125                 return true;
 126         default:
 127                 /* Wrong controller id */
 128                 BREAK_TO_DEBUGGER();
 129                 return false;
 130         }
 131 }
 132
 133 /**
 134  * dal_cmd_table_helper_transmitter_bp_to_atom2 - Translate the Transmitter to the
 135  *                                     corresponding ATOM BIOS value
 136  *  @t: transmitter
 137  *  returns: digitalTransmitter
 138  *    // =00: Digital Transmitter1 ( UNIPHY linkAB )
 139  *    // =01: Digital Transmitter2 ( UNIPHY linkCD )
 140  *    // =02: Digital Transmitter3 ( UNIPHY linkEF )
 141  */
 142 uint8_t dal_cmd_table_helper_transmitter_bp_to_atom2(
 143         enum transmitter t)
 144 {
 145         switch (t) {
 146         case TRANSMITTER_UNIPHY_A:
 147         case TRANSMITTER_UNIPHY_B:
 148         case TRANSMITTER_TRAVIS_LCD:
 149                 return 0;
 150         case TRANSMITTER_UNIPHY_C:
 151         case TRANSMITTER_UNIPHY_D:
 152                 return 1;
 153         case TRANSMITTER_UNIPHY_E:
 154         case TRANSMITTER_UNIPHY_F:
 155                 return 2;
 156         default:
 157                 /* Invalid Transmitter Type! */
 158                 BREAK_TO_DEBUGGER();
 159                 return 0;
 160         }
 161 }
 162
 163 uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom2(
 164         enum signal_type s,
 165         bool enable_dp_audio)
 166 {
 167         switch (s) {
 168         case SIGNAL_TYPE_DVI_SINGLE_LINK:
 169         case SIGNAL_TYPE_DVI_DUAL_LINK:
 170                 return ATOM_ENCODER_MODE_DVI;
 171         case SIGNAL_TYPE_HDMI_TYPE_A:
 172                 return ATOM_ENCODER_MODE_HDMI;
 173         case SIGNAL_TYPE_LVDS:
 174                 return ATOM_ENCODER_MODE_LVDS;
 175         case SIGNAL_TYPE_EDP:
 176         case SIGNAL_TYPE_DISPLAY_PORT_MST:
 177         case SIGNAL_TYPE_DISPLAY_PORT:
 178         case SIGNAL_TYPE_VIRTUAL:
 179                 if (enable_dp_audio)
 180                         return ATOM_ENCODER_MODE_DP_AUDIO;
 181                 else
 182                         return ATOM_ENCODER_MODE_DP;
 183         case SIGNAL_TYPE_RGB:
 184                 return ATOM_ENCODER_MODE_CRT;
 185         default:
 186                 return ATOM_ENCODER_MODE_CRT;
 187         }
 188 }
 189
 190 bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src2(
 191         enum clock_source_id id,
 192         uint32_t *ref_clk_src_id)
 193 {
 194         if (ref_clk_src_id == NULL) {
 195                 BREAK_TO_DEBUGGER();
 196                 return false;
 197         }
 198
 199         switch (id) {
 200         case CLOCK_SOURCE_ID_PLL1:
 201                 *ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL;
 202                 return true;
 203         case CLOCK_SOURCE_ID_PLL2:
 204                 *ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL;
 205                 return true;
 206         /*TODO:case CLOCK_SOURCE_ID_DCPLL:
 207                 *ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL;
 208                 return true;
 209         */
 210         case CLOCK_SOURCE_ID_EXTERNAL:
 211                 *ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK;
 212                 return true;
 213         case CLOCK_SOURCE_ID_UNDEFINED:
 214                 *ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID;
 215                 return true;
 216         default:
 217                 /* Unsupported clock source id */
 218                 BREAK_TO_DEBUGGER();
 219                 return false;
 220         }
 221 }
 222
 223 uint8_t dal_cmd_table_helper_encoder_id_to_atom2(
 224         enum encoder_id id)
 225 {
 226         switch (id) {
 227         case ENCODER_ID_INTERNAL_LVDS:
 228                 return ENCODER_OBJECT_ID_INTERNAL_LVDS;
 229         case ENCODER_ID_INTERNAL_TMDS1:
 230                 return ENCODER_OBJECT_ID_INTERNAL_TMDS1;
 231         case ENCODER_ID_INTERNAL_TMDS2:
 232                 return ENCODER_OBJECT_ID_INTERNAL_TMDS2;
 233         case ENCODER_ID_INTERNAL_DAC1:
 234                 return ENCODER_OBJECT_ID_INTERNAL_DAC1;
 235         case ENCODER_ID_INTERNAL_DAC2:
 236                 return ENCODER_OBJECT_ID_INTERNAL_DAC2;
 237         case ENCODER_ID_INTERNAL_LVTM1:
 238                 return ENCODER_OBJECT_ID_INTERNAL_LVTM1;
 239         case ENCODER_ID_INTERNAL_HDMI:
 240                 return ENCODER_OBJECT_ID_HDMI_INTERNAL;
 241         case ENCODER_ID_EXTERNAL_TRAVIS:
 242                 return ENCODER_OBJECT_ID_TRAVIS;
 243         case ENCODER_ID_EXTERNAL_NUTMEG:
 244                 return ENCODER_OBJECT_ID_NUTMEG;
 245         case ENCODER_ID_INTERNAL_KLDSCP_TMDS1:
 246                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1;
 247         case ENCODER_ID_INTERNAL_KLDSCP_DAC1:
 248                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1;
 249         case ENCODER_ID_INTERNAL_KLDSCP_DAC2:
 250                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2;
 251         case ENCODER_ID_EXTERNAL_MVPU_FPGA:
 252                 return ENCODER_OBJECT_ID_MVPU_FPGA;
 253         case ENCODER_ID_INTERNAL_DDI:
 254                 return ENCODER_OBJECT_ID_INTERNAL_DDI;
 255         case ENCODER_ID_INTERNAL_UNIPHY:
 256                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY;
 257         case ENCODER_ID_INTERNAL_KLDSCP_LVTMA:
 258                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA;
 259         case ENCODER_ID_INTERNAL_UNIPHY1:
 260                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1;
 261         case ENCODER_ID_INTERNAL_UNIPHY2:
 262                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2;
 263         case ENCODER_ID_INTERNAL_UNIPHY3:
 264                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3;
 265         case ENCODER_ID_INTERNAL_WIRELESS:
 266                 return ENCODER_OBJECT_ID_INTERNAL_VCE;
 267         case ENCODER_ID_INTERNAL_VIRTUAL:
 268                 return ENCODER_OBJECT_ID_NONE;
 269         case ENCODER_ID_UNKNOWN:
 270                 return ENCODER_OBJECT_ID_NONE;
 271         default:
 272                 /* Invalid encoder id */
 273                 BREAK_TO_DEBUGGER();
 274                 return ENCODER_OBJECT_ID_NONE;
 275         }
 276 }