drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include <linux/slab.h>
  27
  28 #include "dm_services.h"
  29
  30 #include "ObjectID.h"
  31 #include "atomfirmware.h"
  32
  33 #include "dc_bios_types.h"
  34 #include "include/grph_object_ctrl_defs.h"
  35 #include "include/bios_parser_interface.h"
  36 #include "include/i2caux_interface.h"
  37 #include "include/logger_interface.h"
  38
  39 #include "command_table2.h"
  40
  41 #include "bios_parser_helper.h"
  42 #include "command_table_helper2.h"
  43 #include "bios_parser2.h"
  44 #include "bios_parser_types_internal2.h"
  45 #include "bios_parser_interface.h"
  46
  47 #include "bios_parser_common.h"
  48
  49 /* Temporarily add in defines until ObjectID.h patch is updated in a few days */
  50 #ifndef GENERIC_OBJECT_ID_BRACKET_LAYOUT
  51 #define GENERIC_OBJECT_ID_BRACKET_LAYOUT          0x05
  52 #endif /* GENERIC_OBJECT_ID_BRACKET_LAYOUT */
  53
  54 #ifndef GENERICOBJECT_BRACKET_LAYOUT_ENUM_ID1
  55 #define GENERICOBJECT_BRACKET_LAYOUT_ENUM_ID1   \
  56         (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
  57         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
  58         GENERIC_OBJECT_ID_BRACKET_LAYOUT << OBJECT_ID_SHIFT)
  59 #endif /* GENERICOBJECT_BRACKET_LAYOUT_ENUM_ID1 */
  60
  61 #ifndef GENERICOBJECT_BRACKET_LAYOUT_ENUM_ID2
  62 #define GENERICOBJECT_BRACKET_LAYOUT_ENUM_ID2   \
  63         (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
  64         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
  65         GENERIC_OBJECT_ID_BRACKET_LAYOUT << OBJECT_ID_SHIFT)
  66 #endif /* GENERICOBJECT_BRACKET_LAYOUT_ENUM_ID2 */
  67
  68 #define DC_LOGGER \
  69         bp->base.ctx->logger
  70
  71 #define LAST_RECORD_TYPE 0xff
  72 #define SMU9_SYSPLL0_ID  0
  73
  74 struct i2c_id_config_access {
  75         uint8_t bfI2C_LineMux:4;
  76         uint8_t bfHW_EngineID:3;
  77         uint8_t bfHW_Capable:1;
  78         uint8_t ucAccess;
  79 };
  80
  81 static enum bp_result get_gpio_i2c_info(struct bios_parser *bp,
  82         struct atom_i2c_record *record,
  83         struct graphics_object_i2c_info *info);
  84
  85 static enum bp_result bios_parser_get_firmware_info(
  86         struct dc_bios *dcb,
  87         struct dc_firmware_info *info);
  88
  89 static enum bp_result bios_parser_get_encoder_cap_info(
  90         struct dc_bios *dcb,
  91         struct graphics_object_id object_id,
  92         struct bp_encoder_cap_info *info);
  93
  94 static enum bp_result get_firmware_info_v3_1(
  95         struct bios_parser *bp,
  96         struct dc_firmware_info *info);
  97
  98 static enum bp_result get_firmware_info_v3_2(
  99         struct bios_parser *bp,
 100         struct dc_firmware_info *info);
 101
 102 static struct atom_hpd_int_record *get_hpd_record(struct bios_parser *bp,
 103                 struct atom_display_object_path_v2 *object);
 104
 105 static struct atom_encoder_caps_record *get_encoder_cap_record(
 106         struct bios_parser *bp,
 107         struct atom_display_object_path_v2 *object);
 108
 109 #define BIOS_IMAGE_SIZE_OFFSET 2
 110 #define BIOS_IMAGE_SIZE_UNIT 512
 111
 112 #define DATA_TABLES(table) (bp->master_data_tbl->listOfdatatables.table)
 113
 114 static void bios_parser2_destruct(struct bios_parser *bp)
 115 {
 116         kfree(bp->base.bios_local_image);
 117         kfree(bp->base.integrated_info);
 118 }
 119
 120 static void firmware_parser_destroy(struct dc_bios **dcb)
 121 {
 122         struct bios_parser *bp = BP_FROM_DCB(*dcb);
 123
 124         if (!bp) {
 125                 BREAK_TO_DEBUGGER();
 126                 return;
 127         }
 128
 129         bios_parser2_destruct(bp);
 130
 131         kfree(bp);
 132         *dcb = NULL;
 133 }
 134
 135 static void get_atom_data_table_revision(
 136         struct atom_common_table_header *atom_data_tbl,
 137         struct atom_data_revision *tbl_revision)
 138 {
 139         if (!tbl_revision)
 140                 return;
 141
 142         /* initialize the revision to 0 which is invalid revision */
 143         tbl_revision->major = 0;
 144         tbl_revision->minor = 0;
 145
 146         if (!atom_data_tbl)
 147                 return;
 148
 149         tbl_revision->major =
 150                         (uint32_t) atom_data_tbl->format_revision & 0x3f;
 151         tbl_revision->minor =
 152                         (uint32_t) atom_data_tbl->content_revision & 0x3f;
 153 }
 154
 155 /* BIOS oject table displaypath is per connector.
 156  * There is extra path not for connector. BIOS fill its encoderid as 0
 157  */
 158 static uint8_t bios_parser_get_connectors_number(struct dc_bios *dcb)
 159 {
 160         struct bios_parser *bp = BP_FROM_DCB(dcb);
 161         unsigned int count = 0;
 162         unsigned int i;
 163
 164         for (i = 0; i < bp->object_info_tbl.v1_4->number_of_path; i++) {
 165                 if (bp->object_info_tbl.v1_4->display_path[i].encoderobjid != 0)
 166                         count++;
 167         }
 168         return count;
 169 }
 170
 171 static struct graphics_object_id bios_parser_get_connector_id(
 172         struct dc_bios *dcb,
 173         uint8_t i)
 174 {
 175         struct bios_parser *bp = BP_FROM_DCB(dcb);
 176         struct graphics_object_id object_id = dal_graphics_object_id_init(
 177                 0, ENUM_ID_UNKNOWN, OBJECT_TYPE_UNKNOWN);
 178         struct object_info_table *tbl = &bp->object_info_tbl;
 179         struct display_object_info_table_v1_4 *v1_4 = tbl->v1_4;
 180
 181         if (v1_4->number_of_path > i) {
 182                 /* If display_objid is generic object id,  the encoderObj
 183                  * /extencoderobjId should be 0
 184                  */
 185                 if (v1_4->display_path[i].encoderobjid != 0 &&
 186                                 v1_4->display_path[i].display_objid != 0)
 187                         object_id = object_id_from_bios_object_id(
 188                                         v1_4->display_path[i].display_objid);
 189         }
 190
 191         return object_id;
 192 }
 193
 194 static enum bp_result bios_parser_get_src_obj(struct dc_bios *dcb,
 195         struct graphics_object_id object_id, uint32_t index,
 196         struct graphics_object_id *src_object_id)
 197 {
 198         struct bios_parser *bp = BP_FROM_DCB(dcb);
 199         unsigned int i;
 200         enum bp_result  bp_result = BP_RESULT_BADINPUT;
 201         struct graphics_object_id obj_id = {0};
 202         struct object_info_table *tbl = &bp->object_info_tbl;
 203
 204         if (!src_object_id)
 205                 return bp_result;
 206
 207         switch (object_id.type) {
 208         /* Encoder's Source is GPU.  BIOS does not provide GPU, since all
 209          * displaypaths point to same GPU (0x1100).  Hardcode GPU object type
 210          */
 211         case OBJECT_TYPE_ENCODER:
 212                 /* TODO: since num of src must be less than 2.
 213                  * If found in for loop, should break.
 214                  * DAL2 implementation may be changed too
 215                  */
 216                 for (i = 0; i < tbl->v1_4->number_of_path; i++) {
 217                         obj_id = object_id_from_bios_object_id(
 218                         tbl->v1_4->display_path[i].encoderobjid);
 219                         if (object_id.type == obj_id.type &&
 220                                         object_id.id == obj_id.id &&
 221                                                 object_id.enum_id ==
 222                                                         obj_id.enum_id) {
 223                                 *src_object_id =
 224                                 object_id_from_bios_object_id(0x1100);
 225                                 /* break; */
 226                         }
 227                 }
 228                 bp_result = BP_RESULT_OK;
 229                 break;
 230         case OBJECT_TYPE_CONNECTOR:
 231                 for (i = 0; i < tbl->v1_4->number_of_path; i++) {
 232                         obj_id = object_id_from_bios_object_id(
 233                                 tbl->v1_4->display_path[i].display_objid);
 234
 235                         if (object_id.type == obj_id.type &&
 236                                 object_id.id == obj_id.id &&
 237                                         object_id.enum_id == obj_id.enum_id) {
 238                                 *src_object_id =
 239                                 object_id_from_bios_object_id(
 240                                 tbl->v1_4->display_path[i].encoderobjid);
 241                                 /* break; */
 242                         }
 243                 }
 244                 bp_result = BP_RESULT_OK;
 245                 break;
 246         default:
 247                 break;
 248         }
 249
 250         return bp_result;
 251 }
 252
 253 /* from graphics_object_id, find display path which includes the object_id */
 254 static struct atom_display_object_path_v2 *get_bios_object(
 255                 struct bios_parser *bp,
 256                 struct graphics_object_id id)
 257 {
 258         unsigned int i;
 259         struct graphics_object_id obj_id = {0};
 260
 261         switch (id.type) {
 262         case OBJECT_TYPE_ENCODER:
 263                 for (i = 0; i < bp->object_info_tbl.v1_4->number_of_path; i++) {
 264                         obj_id = object_id_from_bios_object_id(
 265                                         bp->object_info_tbl.v1_4->display_path[i].encoderobjid);
 266                         if (id.type == obj_id.type && id.id == obj_id.id
 267                                         && id.enum_id == obj_id.enum_id)
 268                                 return &bp->object_info_tbl.v1_4->display_path[i];
 269                 }
 270                 fallthrough;
 271         case OBJECT_TYPE_CONNECTOR:
 272         case OBJECT_TYPE_GENERIC:
 273                 /* Both Generic and Connector Object ID
 274                  * will be stored on display_objid
 275                  */
 276                 for (i = 0; i < bp->object_info_tbl.v1_4->number_of_path; i++) {
 277                         obj_id = object_id_from_bios_object_id(
 278                                         bp->object_info_tbl.v1_4->display_path[i].display_objid);
 279                         if (id.type == obj_id.type && id.id == obj_id.id
 280                                         && id.enum_id == obj_id.enum_id)
 281                                 return &bp->object_info_tbl.v1_4->display_path[i];
 282                 }
 283                 fallthrough;
 284         default:
 285                 return NULL;
 286         }
 287 }
 288
 289 static enum bp_result bios_parser_get_i2c_info(struct dc_bios *dcb,
 290         struct graphics_object_id id,
 291         struct graphics_object_i2c_info *info)
 292 {
 293         uint32_t offset;
 294         struct atom_display_object_path_v2 *object;
 295         struct atom_common_record_header *header;
 296         struct atom_i2c_record *record;
 297         struct atom_i2c_record dummy_record = {0};
 298         struct bios_parser *bp = BP_FROM_DCB(dcb);
 299
 300         if (!info)
 301                 return BP_RESULT_BADINPUT;
 302
 303         if (id.type == OBJECT_TYPE_GENERIC) {
 304                 dummy_record.i2c_id = id.id;
 305
 306                 if (get_gpio_i2c_info(bp, &dummy_record, info) == BP_RESULT_OK)
 307                         return BP_RESULT_OK;
 308                 else
 309                         return BP_RESULT_NORECORD;
 310         }
 311
 312         object = get_bios_object(bp, id);
 313
 314         if (!object)
 315                 return BP_RESULT_BADINPUT;
 316
 317         offset = object->disp_recordoffset + bp->object_info_tbl_offset;
 318
 319         for (;;) {
 320                 header = GET_IMAGE(struct atom_common_record_header, offset);
 321
 322                 if (!header)
 323                         return BP_RESULT_BADBIOSTABLE;
 324
 325                 if (header->record_type == LAST_RECORD_TYPE ||
 326                         !header->record_size)
 327                         break;
 328
 329                 if (header->record_type == ATOM_I2C_RECORD_TYPE
 330                         && sizeof(struct atom_i2c_record) <=
 331                                                         header->record_size) {
 332                         /* get the I2C info */
 333                         record = (struct atom_i2c_record *) header;
 334
 335                         if (get_gpio_i2c_info(bp, record, info) ==
 336                                                                 BP_RESULT_OK)
 337                                 return BP_RESULT_OK;
 338                 }
 339
 340                 offset += header->record_size;
 341         }
 342
 343         return BP_RESULT_NORECORD;
 344 }
 345
 346 static enum bp_result get_gpio_i2c_info(
 347         struct bios_parser *bp,
 348         struct atom_i2c_record *record,
 349         struct graphics_object_i2c_info *info)
 350 {
 351         struct atom_gpio_pin_lut_v2_1 *header;
 352         uint32_t count = 0;
 353         unsigned int table_index = 0;
 354         bool find_valid = false;
 355
 356         if (!info)
 357                 return BP_RESULT_BADINPUT;
 358
 359         /* get the GPIO_I2C info */
 360         if (!DATA_TABLES(gpio_pin_lut))
 361                 return BP_RESULT_BADBIOSTABLE;
 362
 363         header = GET_IMAGE(struct atom_gpio_pin_lut_v2_1,
 364                                         DATA_TABLES(gpio_pin_lut));
 365         if (!header)
 366                 return BP_RESULT_BADBIOSTABLE;
 367
 368         if (sizeof(struct atom_common_table_header) +
 369                         sizeof(struct atom_gpio_pin_assignment) >
 370                         le16_to_cpu(header->table_header.structuresize))
 371                 return BP_RESULT_BADBIOSTABLE;
 372
 373         /* TODO: is version change? */
 374         if (header->table_header.content_revision != 1)
 375                 return BP_RESULT_UNSUPPORTED;
 376
 377         /* get data count */
 378         count = (le16_to_cpu(header->table_header.structuresize)
 379                         - sizeof(struct atom_common_table_header))
 380                                 / sizeof(struct atom_gpio_pin_assignment);
 381
 382         for (table_index = 0; table_index < count; table_index++) {
 383                 if (((record->i2c_id & I2C_HW_CAP) == (
 384                 header->gpio_pin[table_index].gpio_id &
 385                                                 I2C_HW_CAP)) &&
 386                 ((record->i2c_id & I2C_HW_ENGINE_ID_MASK)  ==
 387                 (header->gpio_pin[table_index].gpio_id &
 388                                         I2C_HW_ENGINE_ID_MASK)) &&
 389                 ((record->i2c_id & I2C_HW_LANE_MUX) ==
 390                 (header->gpio_pin[table_index].gpio_id &
 391                                                 I2C_HW_LANE_MUX))) {
 392                         /* still valid */
 393                         find_valid = true;
 394                         break;
 395                 }
 396         }
 397
 398         /* If we don't find the entry that we are looking for then
 399          *  we will return BP_Result_BadBiosTable.
 400          */
 401         if (find_valid == false)
 402                 return BP_RESULT_BADBIOSTABLE;
 403
 404         /* get the GPIO_I2C_INFO */
 405         info->i2c_hw_assist = (record->i2c_id & I2C_HW_CAP) ? true : false;
 406         info->i2c_line = record->i2c_id & I2C_HW_LANE_MUX;
 407         info->i2c_engine_id = (record->i2c_id & I2C_HW_ENGINE_ID_MASK) >> 4;
 408         info->i2c_slave_address = record->i2c_slave_addr;
 409
 410         /* TODO: check how to get register offset for en, Y, etc. */
 411         info->gpio_info.clk_a_register_index =
 412                         le16_to_cpu(
 413                         header->gpio_pin[table_index].data_a_reg_index);
 414         info->gpio_info.clk_a_shift =
 415                         header->gpio_pin[table_index].gpio_bitshift;
 416
 417         return BP_RESULT_OK;
 418 }
 419
 420 static enum bp_result bios_parser_get_hpd_info(
 421         struct dc_bios *dcb,
 422         struct graphics_object_id id,
 423         struct graphics_object_hpd_info *info)
 424 {
 425         struct bios_parser *bp = BP_FROM_DCB(dcb);
 426         struct atom_display_object_path_v2 *object;
 427         struct atom_hpd_int_record *record = NULL;
 428
 429         if (!info)
 430                 return BP_RESULT_BADINPUT;
 431
 432         object = get_bios_object(bp, id);
 433
 434         if (!object)
 435                 return BP_RESULT_BADINPUT;
 436
 437         record = get_hpd_record(bp, object);
 438
 439         if (record != NULL) {
 440                 info->hpd_int_gpio_uid = record->pin_id;
 441                 info->hpd_active = record->plugin_pin_state;
 442                 return BP_RESULT_OK;
 443         }
 444
 445         return BP_RESULT_NORECORD;
 446 }
 447
 448 static struct atom_hpd_int_record *get_hpd_record(
 449         struct bios_parser *bp,
 450         struct atom_display_object_path_v2 *object)
 451 {
 452         struct atom_common_record_header *header;
 453         uint32_t offset;
 454
 455         if (!object) {
 456                 BREAK_TO_DEBUGGER(); /* Invalid object */
 457                 return NULL;
 458         }
 459
 460         offset = le16_to_cpu(object->disp_recordoffset)
 461                         + bp->object_info_tbl_offset;
 462
 463         for (;;) {
 464                 header = GET_IMAGE(struct atom_common_record_header, offset);
 465
 466                 if (!header)
 467                         return NULL;
 468
 469                 if (header->record_type == LAST_RECORD_TYPE ||
 470                         !header->record_size)
 471                         break;
 472
 473                 if (header->record_type == ATOM_HPD_INT_RECORD_TYPE
 474                         && sizeof(struct atom_hpd_int_record) <=
 475                                                         header->record_size)
 476                         return (struct atom_hpd_int_record *) header;
 477
 478                 offset += header->record_size;
 479         }
 480
 481         return NULL;
 482 }
 483
 484 /**
 485  * bios_parser_get_gpio_pin_info
 486  * Get GpioPin information of input gpio id
 487  *
 488  * @param gpio_id, GPIO ID
 489  * @param info, GpioPin information structure
 490  * @return Bios parser result code
 491  * @note
 492  *  to get the GPIO PIN INFO, we need:
 493  *  1. get the GPIO_ID from other object table, see GetHPDInfo()
 494  *  2. in DATA_TABLE.GPIO_Pin_LUT, search all records,
 495  *      to get the registerA  offset/mask
 496  */
 497 static enum bp_result bios_parser_get_gpio_pin_info(
 498         struct dc_bios *dcb,
 499         uint32_t gpio_id,
 500         struct gpio_pin_info *info)
 501 {
 502         struct bios_parser *bp = BP_FROM_DCB(dcb);
 503         struct atom_gpio_pin_lut_v2_1 *header;
 504         uint32_t count = 0;
 505         uint32_t i = 0;
 506
 507         if (!DATA_TABLES(gpio_pin_lut))
 508                 return BP_RESULT_BADBIOSTABLE;
 509
 510         header = GET_IMAGE(struct atom_gpio_pin_lut_v2_1,
 511                                                 DATA_TABLES(gpio_pin_lut));
 512         if (!header)
 513                 return BP_RESULT_BADBIOSTABLE;
 514
 515         if (sizeof(struct atom_common_table_header) +
 516                         sizeof(struct atom_gpio_pin_assignment)
 517                         > le16_to_cpu(header->table_header.structuresize))
 518                 return BP_RESULT_BADBIOSTABLE;
 519
 520         if (header->table_header.content_revision != 1)
 521                 return BP_RESULT_UNSUPPORTED;
 522
 523         /* Temporary hard code gpio pin info */
 524 #if defined(FOR_SIMNOW_BOOT)
 525         {
 526                 struct  atom_gpio_pin_assignment  gpio_pin[8] = {
 527                                 {0x5db5, 0, 0, 1, 0},
 528                                 {0x5db5, 8, 8, 2, 0},
 529                                 {0x5db5, 0x10, 0x10, 3, 0},
 530                                 {0x5db5, 0x18, 0x14, 4, 0},
 531                                 {0x5db5, 0x1A, 0x18, 5, 0},
 532                                 {0x5db5, 0x1C, 0x1C, 6, 0},
 533                 };
 534
 535                 count = 6;
 536                 memmove(header->gpio_pin, gpio_pin, sizeof(gpio_pin));
 537         }
 538 #else
 539         count = (le16_to_cpu(header->table_header.structuresize)
 540                         - sizeof(struct atom_common_table_header))
 541                                 / sizeof(struct atom_gpio_pin_assignment);
 542 #endif
 543         for (i = 0; i < count; ++i) {
 544                 if (header->gpio_pin[i].gpio_id != gpio_id)
 545                         continue;
 546
 547                 info->offset =
 548                         (uint32_t) le16_to_cpu(
 549                                         header->gpio_pin[i].data_a_reg_index);
 550                 info->offset_y = info->offset + 2;
 551                 info->offset_en = info->offset + 1;
 552                 info->offset_mask = info->offset - 1;
 553
 554                 info->mask = (uint32_t) (1 <<
 555                         header->gpio_pin[i].gpio_bitshift);
 556                 info->mask_y = info->mask + 2;
 557                 info->mask_en = info->mask + 1;
 558                 info->mask_mask = info->mask - 1;
 559
 560                 return BP_RESULT_OK;
 561         }
 562
 563         return BP_RESULT_NORECORD;
 564 }
 565
 566 static struct device_id device_type_from_device_id(uint16_t device_id)
 567 {
 568
 569         struct device_id result_device_id;
 570
 571         result_device_id.raw_device_tag = device_id;
 572
 573         switch (device_id) {
 574         case ATOM_DISPLAY_LCD1_SUPPORT:
 575                 result_device_id.device_type = DEVICE_TYPE_LCD;
 576                 result_device_id.enum_id = 1;
 577                 break;
 578
 579         case ATOM_DISPLAY_DFP1_SUPPORT:
 580                 result_device_id.device_type = DEVICE_TYPE_DFP;
 581                 result_device_id.enum_id = 1;
 582                 break;
 583
 584         case ATOM_DISPLAY_DFP2_SUPPORT:
 585                 result_device_id.device_type = DEVICE_TYPE_DFP;
 586                 result_device_id.enum_id = 2;
 587                 break;
 588
 589         case ATOM_DISPLAY_DFP3_SUPPORT:
 590                 result_device_id.device_type = DEVICE_TYPE_DFP;
 591                 result_device_id.enum_id = 3;
 592                 break;
 593
 594         case ATOM_DISPLAY_DFP4_SUPPORT:
 595                 result_device_id.device_type = DEVICE_TYPE_DFP;
 596                 result_device_id.enum_id = 4;
 597                 break;
 598
 599         case ATOM_DISPLAY_DFP5_SUPPORT:
 600                 result_device_id.device_type = DEVICE_TYPE_DFP;
 601                 result_device_id.enum_id = 5;
 602                 break;
 603
 604         case ATOM_DISPLAY_DFP6_SUPPORT:
 605                 result_device_id.device_type = DEVICE_TYPE_DFP;
 606                 result_device_id.enum_id = 6;
 607                 break;
 608
 609         default:
 610                 BREAK_TO_DEBUGGER(); /* Invalid device Id */
 611                 result_device_id.device_type = DEVICE_TYPE_UNKNOWN;
 612                 result_device_id.enum_id = 0;
 613         }
 614         return result_device_id;
 615 }
 616
 617 static enum bp_result bios_parser_get_device_tag(
 618         struct dc_bios *dcb,
 619         struct graphics_object_id connector_object_id,
 620         uint32_t device_tag_index,
 621         struct connector_device_tag_info *info)
 622 {
 623         struct bios_parser *bp = BP_FROM_DCB(dcb);
 624         struct atom_display_object_path_v2 *object;
 625
 626         if (!info)
 627                 return BP_RESULT_BADINPUT;
 628
 629         /* getBiosObject will return MXM object */
 630         object = get_bios_object(bp, connector_object_id);
 631
 632         if (!object) {
 633                 BREAK_TO_DEBUGGER(); /* Invalid object id */
 634                 return BP_RESULT_BADINPUT;
 635         }
 636
 637         info->acpi_device = 0; /* BIOS no longer provides this */
 638         info->dev_id = device_type_from_device_id(object->device_tag);
 639
 640         return BP_RESULT_OK;
 641 }
 642
 643 static enum bp_result get_ss_info_v4_1(
 644         struct bios_parser *bp,
 645         uint32_t id,
 646         uint32_t index,
 647         struct spread_spectrum_info *ss_info)
 648 {
 649         enum bp_result result = BP_RESULT_OK;
 650         struct atom_display_controller_info_v4_1 *disp_cntl_tbl = NULL;
 651         struct atom_smu_info_v3_3 *smu_info = NULL;
 652
 653         if (!ss_info)
 654                 return BP_RESULT_BADINPUT;
 655
 656         if (!DATA_TABLES(dce_info))
 657                 return BP_RESULT_BADBIOSTABLE;
 658
 659         disp_cntl_tbl =  GET_IMAGE(struct atom_display_controller_info_v4_1,
 660                                                         DATA_TABLES(dce_info));
 661         if (!disp_cntl_tbl)
 662                 return BP_RESULT_BADBIOSTABLE;
 663
 664
 665         ss_info->type.STEP_AND_DELAY_INFO = false;
 666         ss_info->spread_percentage_divider = 1000;
 667         /* BIOS no longer uses target clock.  Always enable for now */
 668         ss_info->target_clock_range = 0xffffffff;
 669
 670         switch (id) {
 671         case AS_SIGNAL_TYPE_DVI:
 672                 ss_info->spread_spectrum_percentage =
 673                                 disp_cntl_tbl->dvi_ss_percentage;
 674                 ss_info->spread_spectrum_range =
 675                                 disp_cntl_tbl->dvi_ss_rate_10hz * 10;
 676                 if (disp_cntl_tbl->dvi_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)
 677                         ss_info->type.CENTER_MODE = true;
 678                 break;
 679         case AS_SIGNAL_TYPE_HDMI:
 680                 ss_info->spread_spectrum_percentage =
 681                                 disp_cntl_tbl->hdmi_ss_percentage;
 682                 ss_info->spread_spectrum_range =
 683                                 disp_cntl_tbl->hdmi_ss_rate_10hz * 10;
 684                 if (disp_cntl_tbl->hdmi_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)
 685                         ss_info->type.CENTER_MODE = true;
 686                 break;
 687         /* TODO LVDS not support anymore? */
 688         case AS_SIGNAL_TYPE_DISPLAY_PORT:
 689                 ss_info->spread_spectrum_percentage =
 690                                 disp_cntl_tbl->dp_ss_percentage;
 691                 ss_info->spread_spectrum_range =
 692                                 disp_cntl_tbl->dp_ss_rate_10hz * 10;
 693                 if (disp_cntl_tbl->dp_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)
 694                         ss_info->type.CENTER_MODE = true;
 695                 break;
 696         case AS_SIGNAL_TYPE_GPU_PLL:
 697                 /* atom_firmware: DAL only get data from dce_info table.
 698                  * if data within smu_info is needed for DAL, VBIOS should
 699                  * copy it into dce_info
 700                  */
 701                 result = BP_RESULT_UNSUPPORTED;
 702                 break;
 703         case AS_SIGNAL_TYPE_XGMI:
 704                 smu_info =  GET_IMAGE(struct atom_smu_info_v3_3,
 705                                       DATA_TABLES(smu_info));
 706                 if (!smu_info)
 707                         return BP_RESULT_BADBIOSTABLE;
 708
 709                 ss_info->spread_spectrum_percentage =
 710                                 smu_info->waflclk_ss_percentage;
 711                 ss_info->spread_spectrum_range =
 712                                 smu_info->gpuclk_ss_rate_10hz * 10;
 713                 if (smu_info->waflclk_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)
 714                         ss_info->type.CENTER_MODE = true;
 715                 break;
 716         default:
 717                 result = BP_RESULT_UNSUPPORTED;
 718         }
 719
 720         return result;
 721 }
 722
 723 static enum bp_result get_ss_info_v4_2(
 724         struct bios_parser *bp,
 725         uint32_t id,
 726         uint32_t index,
 727         struct spread_spectrum_info *ss_info)
 728 {
 729         enum bp_result result = BP_RESULT_OK;
 730         struct atom_display_controller_info_v4_2 *disp_cntl_tbl = NULL;
 731         struct atom_smu_info_v3_1 *smu_info = NULL;
 732
 733         if (!ss_info)
 734                 return BP_RESULT_BADINPUT;
 735
 736         if (!DATA_TABLES(dce_info))
 737                 return BP_RESULT_BADBIOSTABLE;
 738
 739         if (!DATA_TABLES(smu_info))
 740                 return BP_RESULT_BADBIOSTABLE;
 741
 742         disp_cntl_tbl =  GET_IMAGE(struct atom_display_controller_info_v4_2,
 743                                                         DATA_TABLES(dce_info));
 744         if (!disp_cntl_tbl)
 745                 return BP_RESULT_BADBIOSTABLE;
 746
 747         smu_info =  GET_IMAGE(struct atom_smu_info_v3_1, DATA_TABLES(smu_info));
 748         if (!smu_info)
 749                 return BP_RESULT_BADBIOSTABLE;
 750
 751         ss_info->type.STEP_AND_DELAY_INFO = false;
 752         ss_info->spread_percentage_divider = 1000;
 753         /* BIOS no longer uses target clock.  Always enable for now */
 754         ss_info->target_clock_range = 0xffffffff;
 755
 756         switch (id) {
 757         case AS_SIGNAL_TYPE_DVI:
 758                 ss_info->spread_spectrum_percentage =
 759                                 disp_cntl_tbl->dvi_ss_percentage;
 760                 ss_info->spread_spectrum_range =
 761                                 disp_cntl_tbl->dvi_ss_rate_10hz * 10;
 762                 if (disp_cntl_tbl->dvi_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)
 763                         ss_info->type.CENTER_MODE = true;
 764                 break;
 765         case AS_SIGNAL_TYPE_HDMI:
 766                 ss_info->spread_spectrum_percentage =
 767                                 disp_cntl_tbl->hdmi_ss_percentage;
 768                 ss_info->spread_spectrum_range =
 769                                 disp_cntl_tbl->hdmi_ss_rate_10hz * 10;
 770                 if (disp_cntl_tbl->hdmi_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)
 771                         ss_info->type.CENTER_MODE = true;
 772                 break;
 773         /* TODO LVDS not support anymore? */
 774         case AS_SIGNAL_TYPE_DISPLAY_PORT:
 775                 ss_info->spread_spectrum_percentage =
 776                                 smu_info->gpuclk_ss_percentage;
 777                 ss_info->spread_spectrum_range =
 778                                 smu_info->gpuclk_ss_rate_10hz * 10;
 779                 if (smu_info->gpuclk_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)
 780                         ss_info->type.CENTER_MODE = true;
 781                 break;
 782         case AS_SIGNAL_TYPE_GPU_PLL:
 783                 /* atom_firmware: DAL only get data from dce_info table.
 784                  * if data within smu_info is needed for DAL, VBIOS should
 785                  * copy it into dce_info
 786                  */
 787                 result = BP_RESULT_UNSUPPORTED;
 788                 break;
 789         default:
 790                 result = BP_RESULT_UNSUPPORTED;
 791         }
 792
 793         return result;
 794 }
 795
 796 /**
 797  * bios_parser_get_spread_spectrum_info
 798  * Get spread spectrum information from the ASIC_InternalSS_Info(ver 2.1 or
 799  * ver 3.1) or SS_Info table from the VBIOS. Currently ASIC_InternalSS_Info
 800  * ver 2.1 can co-exist with SS_Info table. Expect ASIC_InternalSS_Info
 801  * ver 3.1,
 802  * there is only one entry for each signal /ss id.  However, there is
 803  * no planning of supporting multiple spread Sprectum entry for EverGreen
 804  * @param [in] this
 805  * @param [in] signal, ASSignalType to be converted to info index
 806  * @param [in] index, number of entries that match the converted info index
 807  * @param [out] ss_info, sprectrum information structure,
 808  * @return Bios parser result code
 809  */
 810 static enum bp_result bios_parser_get_spread_spectrum_info(
 811         struct dc_bios *dcb,
 812         enum as_signal_type signal,
 813         uint32_t index,
 814         struct spread_spectrum_info *ss_info)
 815 {
 816         struct bios_parser *bp = BP_FROM_DCB(dcb);
 817         enum bp_result result = BP_RESULT_UNSUPPORTED;
 818         struct atom_common_table_header *header;
 819         struct atom_data_revision tbl_revision;
 820
 821         if (!ss_info) /* check for bad input */
 822                 return BP_RESULT_BADINPUT;
 823
 824         if (!DATA_TABLES(dce_info))
 825                 return BP_RESULT_UNSUPPORTED;
 826
 827         header = GET_IMAGE(struct atom_common_table_header,
 828                                                 DATA_TABLES(dce_info));
 829         get_atom_data_table_revision(header, &tbl_revision);
 830
 831         switch (tbl_revision.major) {
 832         case 4:
 833                 switch (tbl_revision.minor) {
 834                 case 1:
 835                         return get_ss_info_v4_1(bp, signal, index, ss_info);
 836                 case 2:
 837                 case 3:
 838                         return get_ss_info_v4_2(bp, signal, index, ss_info);
 839                 default:
 840                         break;
 841                 }
 842                 break;
 843         default:
 844                 break;
 845         }
 846         /* there can not be more then one entry for SS Info table */
 847         return result;
 848 }
 849
 850 static enum bp_result get_embedded_panel_info_v2_1(
 851                 struct bios_parser *bp,
 852                 struct embedded_panel_info *info)
 853 {
 854         struct lcd_info_v2_1 *lvds;
 855
 856         if (!info)
 857                 return BP_RESULT_BADINPUT;
 858
 859         if (!DATA_TABLES(lcd_info))
 860                 return BP_RESULT_UNSUPPORTED;
 861
 862         lvds = GET_IMAGE(struct lcd_info_v2_1, DATA_TABLES(lcd_info));
 863
 864         if (!lvds)
 865                 return BP_RESULT_BADBIOSTABLE;
 866
 867         /* TODO: previous vv1_3, should v2_1 */
 868         if (!((lvds->table_header.format_revision == 2)
 869                         && (lvds->table_header.content_revision >= 1)))
 870                 return BP_RESULT_UNSUPPORTED;
 871
 872         memset(info, 0, sizeof(struct embedded_panel_info));
 873
 874         /* We need to convert from 10KHz units into KHz units */
 875         info->lcd_timing.pixel_clk = le16_to_cpu(lvds->lcd_timing.pixclk) * 10;
 876         /* usHActive does not include borders, according to VBIOS team */
 877         info->lcd_timing.horizontal_addressable = le16_to_cpu(lvds->lcd_timing.h_active);
 878         /* usHBlanking_Time includes borders, so we should really be
 879          * subtractingborders duing this translation, but LVDS generally
 880          * doesn't have borders, so we should be okay leaving this as is for
 881          * now.  May need to revisit if we ever have LVDS with borders
 882          */
 883         info->lcd_timing.horizontal_blanking_time = le16_to_cpu(lvds->lcd_timing.h_blanking_time);
 884         /* usVActive does not include borders, according to VBIOS team*/
 885         info->lcd_timing.vertical_addressable = le16_to_cpu(lvds->lcd_timing.v_active);
 886         /* usVBlanking_Time includes borders, so we should really be
 887          * subtracting borders duing this translation, but LVDS generally
 888          * doesn't have borders, so we should be okay leaving this as is for
 889          * now. May need to revisit if we ever have LVDS with borders
 890          */
 891         info->lcd_timing.vertical_blanking_time = le16_to_cpu(lvds->lcd_timing.v_blanking_time);
 892         info->lcd_timing.horizontal_sync_offset = le16_to_cpu(lvds->lcd_timing.h_sync_offset);
 893         info->lcd_timing.horizontal_sync_width = le16_to_cpu(lvds->lcd_timing.h_sync_width);
 894         info->lcd_timing.vertical_sync_offset = le16_to_cpu(lvds->lcd_timing.v_sync_offset);
 895         info->lcd_timing.vertical_sync_width = le16_to_cpu(lvds->lcd_timing.v_syncwidth);
 896         info->lcd_timing.horizontal_border = lvds->lcd_timing.h_border;
 897         info->lcd_timing.vertical_border = lvds->lcd_timing.v_border;
 898
 899         /* not provided by VBIOS */
 900         info->lcd_timing.misc_info.HORIZONTAL_CUT_OFF = 0;
 901
 902         info->lcd_timing.misc_info.H_SYNC_POLARITY = ~(uint32_t) (lvds->lcd_timing.miscinfo
 903                         & ATOM_HSYNC_POLARITY);
 904         info->lcd_timing.misc_info.V_SYNC_POLARITY = ~(uint32_t) (lvds->lcd_timing.miscinfo
 905                         & ATOM_VSYNC_POLARITY);
 906
 907         /* not provided by VBIOS */
 908         info->lcd_timing.misc_info.VERTICAL_CUT_OFF = 0;
 909
 910         info->lcd_timing.misc_info.H_REPLICATION_BY2 = !!(lvds->lcd_timing.miscinfo
 911                         & ATOM_H_REPLICATIONBY2);
 912         info->lcd_timing.misc_info.V_REPLICATION_BY2 = !!(lvds->lcd_timing.miscinfo
 913                         & ATOM_V_REPLICATIONBY2);
 914         info->lcd_timing.misc_info.COMPOSITE_SYNC = !!(lvds->lcd_timing.miscinfo
 915                         & ATOM_COMPOSITESYNC);
 916         info->lcd_timing.misc_info.INTERLACE = !!(lvds->lcd_timing.miscinfo & ATOM_INTERLACE);
 917
 918         /* not provided by VBIOS*/
 919         info->lcd_timing.misc_info.DOUBLE_CLOCK = 0;
 920         /* not provided by VBIOS*/
 921         info->ss_id = 0;
 922
 923         info->realtek_eDPToLVDS = !!(lvds->dplvdsrxid == eDP_TO_LVDS_REALTEK_ID);
 924
 925         return BP_RESULT_OK;
 926 }
 927
 928 static enum bp_result bios_parser_get_embedded_panel_info(
 929                 struct dc_bios *dcb,
 930                 struct embedded_panel_info *info)
 931 {
 932         struct bios_parser
 933         *bp = BP_FROM_DCB(dcb);
 934         struct atom_common_table_header *header;
 935         struct atom_data_revision tbl_revision;
 936
 937         if (!DATA_TABLES(lcd_info))
 938                 return BP_RESULT_FAILURE;
 939
 940         header = GET_IMAGE(struct atom_common_table_header, DATA_TABLES(lcd_info));
 941
 942         if (!header)
 943                 return BP_RESULT_BADBIOSTABLE;
 944
 945         get_atom_data_table_revision(header, &tbl_revision);
 946
 947         switch (tbl_revision.major) {
 948         case 2:
 949                 switch (tbl_revision.minor) {
 950                 case 1:
 951                         return get_embedded_panel_info_v2_1(bp, info);
 952                 default:
 953                         break;
 954                 }
 955         default:
 956                 break;
 957         }
 958
 959         return BP_RESULT_FAILURE;
 960 }
 961
 962 static uint32_t get_support_mask_for_device_id(struct device_id device_id)
 963 {
 964         enum dal_device_type device_type = device_id.device_type;
 965         uint32_t enum_id = device_id.enum_id;
 966
 967         switch (device_type) {
 968         case DEVICE_TYPE_LCD:
 969                 switch (enum_id) {
 970                 case 1:
 971                         return ATOM_DISPLAY_LCD1_SUPPORT;
 972                 default:
 973                         break;
 974                 }
 975                 break;
 976         case DEVICE_TYPE_DFP:
 977                 switch (enum_id) {
 978                 case 1:
 979                         return ATOM_DISPLAY_DFP1_SUPPORT;
 980                 case 2:
 981                         return ATOM_DISPLAY_DFP2_SUPPORT;
 982                 case 3:
 983                         return ATOM_DISPLAY_DFP3_SUPPORT;
 984                 case 4:
 985                         return ATOM_DISPLAY_DFP4_SUPPORT;
 986                 case 5:
 987                         return ATOM_DISPLAY_DFP5_SUPPORT;
 988                 case 6:
 989                         return ATOM_DISPLAY_DFP6_SUPPORT;
 990                 default:
 991                         break;
 992                 }
 993                 break;
 994         default:
 995                 break;
 996         }
 997
 998         /* Unidentified device ID, return empty support mask. */
 999         return 0;
1000 }
1001
1002 static bool bios_parser_is_device_id_supported(
1003         struct dc_bios *dcb,
1004         struct device_id id)
1005 {
1006         struct bios_parser *bp = BP_FROM_DCB(dcb);
1007
1008         uint32_t mask = get_support_mask_for_device_id(id);
1009
1010         return (le16_to_cpu(bp->object_info_tbl.v1_4->supporteddevices) &
1011                                                                 mask) != 0;
1012 }
1013
1014 static uint32_t bios_parser_get_ss_entry_number(
1015         struct dc_bios *dcb,
1016         enum as_signal_type signal)
1017 {
1018         /* TODO: DAL2 atomfirmware implementation does not need this.
1019          * why DAL3 need this?
1020          */
1021         return 1;
1022 }
1023
1024 static enum bp_result bios_parser_transmitter_control(
1025         struct dc_bios *dcb,
1026         struct bp_transmitter_control *cntl)
1027 {
1028         struct bios_parser *bp = BP_FROM_DCB(dcb);
1029
1030         if (!bp->cmd_tbl.transmitter_control)
1031                 return BP_RESULT_FAILURE;
1032
1033         return bp->cmd_tbl.transmitter_control(bp, cntl);
1034 }
1035
1036 static enum bp_result bios_parser_encoder_control(
1037         struct dc_bios *dcb,
1038         struct bp_encoder_control *cntl)
1039 {
1040         struct bios_parser *bp = BP_FROM_DCB(dcb);
1041
1042         if (!bp->cmd_tbl.dig_encoder_control)
1043                 return BP_RESULT_FAILURE;
1044
1045         return bp->cmd_tbl.dig_encoder_control(bp, cntl);
1046 }
1047
1048 static enum bp_result bios_parser_set_pixel_clock(
1049         struct dc_bios *dcb,
1050         struct bp_pixel_clock_parameters *bp_params)
1051 {
1052         struct bios_parser *bp = BP_FROM_DCB(dcb);
1053
1054         if (!bp->cmd_tbl.set_pixel_clock)
1055                 return BP_RESULT_FAILURE;
1056
1057         return bp->cmd_tbl.set_pixel_clock(bp, bp_params);
1058 }
1059
1060 static enum bp_result bios_parser_set_dce_clock(
1061         struct dc_bios *dcb,
1062         struct bp_set_dce_clock_parameters *bp_params)
1063 {
1064         struct bios_parser *bp = BP_FROM_DCB(dcb);
1065
1066         if (!bp->cmd_tbl.set_dce_clock)
1067                 return BP_RESULT_FAILURE;
1068
1069         return bp->cmd_tbl.set_dce_clock(bp, bp_params);
1070 }
1071
1072 static enum bp_result bios_parser_program_crtc_timing(
1073         struct dc_bios *dcb,
1074         struct bp_hw_crtc_timing_parameters *bp_params)
1075 {
1076         struct bios_parser *bp = BP_FROM_DCB(dcb);
1077
1078         if (!bp->cmd_tbl.set_crtc_timing)
1079                 return BP_RESULT_FAILURE;
1080
1081         return bp->cmd_tbl.set_crtc_timing(bp, bp_params);
1082 }
1083
1084 static enum bp_result bios_parser_enable_crtc(
1085         struct dc_bios *dcb,
1086         enum controller_id id,
1087         bool enable)
1088 {
1089         struct bios_parser *bp = BP_FROM_DCB(dcb);
1090
1091         if (!bp->cmd_tbl.enable_crtc)
1092                 return BP_RESULT_FAILURE;
1093
1094         return bp->cmd_tbl.enable_crtc(bp, id, enable);
1095 }
1096
1097 static enum bp_result bios_parser_enable_disp_power_gating(
1098         struct dc_bios *dcb,
1099         enum controller_id controller_id,
1100         enum bp_pipe_control_action action)
1101 {
1102         struct bios_parser *bp = BP_FROM_DCB(dcb);
1103
1104         if (!bp->cmd_tbl.enable_disp_power_gating)
1105                 return BP_RESULT_FAILURE;
1106
1107         return bp->cmd_tbl.enable_disp_power_gating(bp, controller_id,
1108                 action);
1109 }
1110
1111 static bool bios_parser_is_accelerated_mode(
1112         struct dc_bios *dcb)
1113 {
1114         return bios_is_accelerated_mode(dcb);
1115 }
1116
1117 /**
1118  * bios_parser_set_scratch_critical_state
1119  *
1120  * @brief
1121  *  update critical state bit in VBIOS scratch register
1122  *
1123  * @param
1124  *  bool - to set or reset state
1125  */
1126 static void bios_parser_set_scratch_critical_state(
1127         struct dc_bios *dcb,
1128         bool state)
1129 {
1130         bios_set_scratch_critical_state(dcb, state);
1131 }
1132
1133 static enum bp_result bios_parser_get_firmware_info(
1134         struct dc_bios *dcb,
1135         struct dc_firmware_info *info)
1136 {
1137         struct bios_parser *bp = BP_FROM_DCB(dcb);
1138         enum bp_result result = BP_RESULT_BADBIOSTABLE;
1139         struct atom_common_table_header *header;
1140
1141         struct atom_data_revision revision;
1142
1143         if (info && DATA_TABLES(firmwareinfo)) {
1144                 header = GET_IMAGE(struct atom_common_table_header,
1145                                 DATA_TABLES(firmwareinfo));
1146                 get_atom_data_table_revision(header, &revision);
1147                 switch (revision.major) {
1148                 case 3:
1149                         switch (revision.minor) {
1150                         case 1:
1151                                 result = get_firmware_info_v3_1(bp, info);
1152                                 break;
1153                         case 2:
1154                                 result = get_firmware_info_v3_2(bp, info);
1155                                 break;
1156                         case 3:
1157 #ifdef CONFIG_DRM_AMD_DC_DCN3_0
1158                         case 4:
1159 #endif
1160                                 result = get_firmware_info_v3_2(bp, info);
1161                                 break;
1162                         default:
1163                                 break;
1164                         }
1165                         break;
1166                 default:
1167                         break;
1168                 }
1169         }
1170
1171         return result;
1172 }
1173
1174 static enum bp_result get_firmware_info_v3_1(
1175         struct bios_parser *bp,
1176         struct dc_firmware_info *info)
1177 {
1178         struct atom_firmware_info_v3_1 *firmware_info;
1179         struct atom_display_controller_info_v4_1 *dce_info = NULL;
1180
1181         if (!info)
1182                 return BP_RESULT_BADINPUT;
1183
1184         firmware_info = GET_IMAGE(struct atom_firmware_info_v3_1,
1185                         DATA_TABLES(firmwareinfo));
1186
1187         dce_info = GET_IMAGE(struct atom_display_controller_info_v4_1,
1188                         DATA_TABLES(dce_info));
1189
1190         if (!firmware_info || !dce_info)
1191                 return BP_RESULT_BADBIOSTABLE;
1192
1193         memset(info, 0, sizeof(*info));
1194
1195         /* Pixel clock pll information. */
1196          /* We need to convert from 10KHz units into KHz units */
1197         info->default_memory_clk = firmware_info->bootup_mclk_in10khz * 10;
1198         info->default_engine_clk = firmware_info->bootup_sclk_in10khz * 10;
1199
1200          /* 27MHz for Vega10: */
1201         info->pll_info.crystal_frequency = dce_info->dce_refclk_10khz * 10;
1202
1203         /* Hardcode frequency if BIOS gives no DCE Ref Clk */
1204         if (info->pll_info.crystal_frequency == 0)
1205                 info->pll_info.crystal_frequency = 27000;
1206         /*dp_phy_ref_clk is not correct for atom_display_controller_info_v4_2, but we don't use it*/
1207         info->dp_phy_ref_clk     = dce_info->dpphy_refclk_10khz * 10;
1208         info->i2c_engine_ref_clk = dce_info->i2c_engine_refclk_10khz * 10;
1209
1210         /* Get GPU PLL VCO Clock */
1211
1212         if (bp->cmd_tbl.get_smu_clock_info != NULL) {
1213                 /* VBIOS gives in 10KHz */
1214                 info->smu_gpu_pll_output_freq =
1215                                 bp->cmd_tbl.get_smu_clock_info(bp, SMU9_SYSPLL0_ID) * 10;
1216         }
1217
1218         info->oem_i2c_present = false;
1219
1220         return BP_RESULT_OK;
1221 }
1222
1223 static enum bp_result get_firmware_info_v3_2(
1224         struct bios_parser *bp,
1225         struct dc_firmware_info *info)
1226 {
1227         struct atom_firmware_info_v3_2 *firmware_info;
1228         struct atom_display_controller_info_v4_1 *dce_info = NULL;
1229         struct atom_common_table_header *header;
1230         struct atom_data_revision revision;
1231         struct atom_smu_info_v3_2 *smu_info_v3_2 = NULL;
1232         struct atom_smu_info_v3_3 *smu_info_v3_3 = NULL;
1233
1234         if (!info)
1235                 return BP_RESULT_BADINPUT;
1236
1237         firmware_info = GET_IMAGE(struct atom_firmware_info_v3_2,
1238                         DATA_TABLES(firmwareinfo));
1239
1240         dce_info = GET_IMAGE(struct atom_display_controller_info_v4_1,
1241                         DATA_TABLES(dce_info));
1242
1243         if (!firmware_info || !dce_info)
1244                 return BP_RESULT_BADBIOSTABLE;
1245
1246         memset(info, 0, sizeof(*info));
1247
1248         header = GET_IMAGE(struct atom_common_table_header,
1249                                         DATA_TABLES(smu_info));
1250         get_atom_data_table_revision(header, &revision);
1251
1252         if (revision.minor == 2) {
1253                 /* Vega12 */
1254                 smu_info_v3_2 = GET_IMAGE(struct atom_smu_info_v3_2,
1255                                                         DATA_TABLES(smu_info));
1256
1257                 if (!smu_info_v3_2)
1258                         return BP_RESULT_BADBIOSTABLE;
1259
1260                 info->default_engine_clk = smu_info_v3_2->bootup_dcefclk_10khz * 10;
1261         } else if (revision.minor == 3) {
1262                 /* Vega20 */
1263                 smu_info_v3_3 = GET_IMAGE(struct atom_smu_info_v3_3,
1264                                                         DATA_TABLES(smu_info));
1265
1266                 if (!smu_info_v3_3)
1267                         return BP_RESULT_BADBIOSTABLE;
1268
1269                 info->default_engine_clk = smu_info_v3_3->bootup_dcefclk_10khz * 10;
1270         }
1271
1272          // We need to convert from 10KHz units into KHz units.
1273         info->default_memory_clk = firmware_info->bootup_mclk_in10khz * 10;
1274
1275          /* 27MHz for Vega10 & Vega12; 100MHz for Vega20 */
1276         info->pll_info.crystal_frequency = dce_info->dce_refclk_10khz * 10;
1277         /* Hardcode frequency if BIOS gives no DCE Ref Clk */
1278         if (info->pll_info.crystal_frequency == 0) {
1279                 if (revision.minor == 2)
1280                         info->pll_info.crystal_frequency = 27000;
1281                 else if (revision.minor == 3)
1282                         info->pll_info.crystal_frequency = 100000;
1283         }
1284         /*dp_phy_ref_clk is not correct for atom_display_controller_info_v4_2, but we don't use it*/
1285         info->dp_phy_ref_clk     = dce_info->dpphy_refclk_10khz * 10;
1286         info->i2c_engine_ref_clk = dce_info->i2c_engine_refclk_10khz * 10;
1287
1288         /* Get GPU PLL VCO Clock */
1289         if (bp->cmd_tbl.get_smu_clock_info != NULL) {
1290                 if (revision.minor == 2)
1291                         info->smu_gpu_pll_output_freq =
1292                                         bp->cmd_tbl.get_smu_clock_info(bp, SMU9_SYSPLL0_ID) * 10;
1293                 else if (revision.minor == 3)
1294                         info->smu_gpu_pll_output_freq =
1295                                         bp->cmd_tbl.get_smu_clock_info(bp, SMU11_SYSPLL3_0_ID) * 10;
1296         }
1297
1298         if (firmware_info->board_i2c_feature_id == 0x2) {
1299                 info->oem_i2c_present = true;
1300                 info->oem_i2c_obj_id = firmware_info->board_i2c_feature_gpio_id;
1301         } else {
1302                 info->oem_i2c_present = false;
1303         }
1304
1305         return BP_RESULT_OK;
1306 }
1307
1308 static enum bp_result bios_parser_get_encoder_cap_info(
1309         struct dc_bios *dcb,
1310         struct graphics_object_id object_id,
1311         struct bp_encoder_cap_info *info)
1312 {
1313         struct bios_parser *bp = BP_FROM_DCB(dcb);
1314         struct atom_display_object_path_v2 *object;
1315         struct atom_encoder_caps_record *record = NULL;
1316
1317         if (!info)
1318                 return BP_RESULT_BADINPUT;
1319
1320         object = get_bios_object(bp, object_id);
1321
1322         if (!object)
1323                 return BP_RESULT_BADINPUT;
1324
1325         record = get_encoder_cap_record(bp, object);
1326         if (!record)
1327                 return BP_RESULT_NORECORD;
1328
1329         info->DP_HBR2_CAP = (record->encodercaps &
1330                         ATOM_ENCODER_CAP_RECORD_HBR2) ? 1 : 0;
1331         info->DP_HBR2_EN = (record->encodercaps &
1332                         ATOM_ENCODER_CAP_RECORD_HBR2_EN) ? 1 : 0;
1333         info->DP_HBR3_EN = (record->encodercaps &
1334                         ATOM_ENCODER_CAP_RECORD_HBR3_EN) ? 1 : 0;
1335         info->HDMI_6GB_EN = (record->encodercaps &
1336                         ATOM_ENCODER_CAP_RECORD_HDMI6Gbps_EN) ? 1 : 0;
1337         info->DP_IS_USB_C = (record->encodercaps &
1338                         ATOM_ENCODER_CAP_RECORD_USB_C_TYPE) ? 1 : 0;
1339
1340         return BP_RESULT_OK;
1341 }
1342
1343
1344 static struct atom_encoder_caps_record *get_encoder_cap_record(
1345         struct bios_parser *bp,
1346         struct atom_display_object_path_v2 *object)
1347 {
1348         struct atom_common_record_header *header;
1349         uint32_t offset;
1350
1351         if (!object) {
1352                 BREAK_TO_DEBUGGER(); /* Invalid object */
1353                 return NULL;
1354         }
1355
1356         offset = object->encoder_recordoffset + bp->object_info_tbl_offset;
1357
1358         for (;;) {
1359                 header = GET_IMAGE(struct atom_common_record_header, offset);
1360
1361                 if (!header)
1362                         return NULL;
1363
1364                 offset += header->record_size;
1365
1366                 if (header->record_type == LAST_RECORD_TYPE ||
1367                                 !header->record_size)
1368                         break;
1369
1370                 if (header->record_type != ATOM_ENCODER_CAP_RECORD_TYPE)
1371                         continue;
1372
1373                 if (sizeof(struct atom_encoder_caps_record) <=
1374                                                         header->record_size)
1375                         return (struct atom_encoder_caps_record *)header;
1376         }
1377
1378         return NULL;
1379 }
1380
1381 static enum bp_result get_vram_info_v23(
1382         struct bios_parser *bp,
1383         struct dc_vram_info *info)
1384 {
1385         struct atom_vram_info_header_v2_3 *info_v23;
1386         enum bp_result result = BP_RESULT_OK;
1387
1388         info_v23 = GET_IMAGE(struct atom_vram_info_header_v2_3,
1389                                                 DATA_TABLES(vram_info));
1390
1391         if (info_v23 == NULL)
1392                 return BP_RESULT_BADBIOSTABLE;
1393
1394         info->num_chans = info_v23->vram_module[0].channel_num;
1395         info->dram_channel_width_bytes = (1 << info_v23->vram_module[0].channel_width) / 8;
1396
1397         return result;
1398 }
1399
1400 static enum bp_result get_vram_info_v24(
1401         struct bios_parser *bp,
1402         struct dc_vram_info *info)
1403 {
1404         struct atom_vram_info_header_v2_4 *info_v24;
1405         enum bp_result result = BP_RESULT_OK;
1406
1407         info_v24 = GET_IMAGE(struct atom_vram_info_header_v2_4,
1408                                                 DATA_TABLES(vram_info));
1409
1410         if (info_v24 == NULL)
1411                 return BP_RESULT_BADBIOSTABLE;
1412
1413         info->num_chans = info_v24->vram_module[0].channel_num;
1414         info->dram_channel_width_bytes = (1 << info_v24->vram_module[0].channel_width) / 8;
1415
1416         return result;
1417 }
1418
1419 static enum bp_result get_vram_info_v25(
1420         struct bios_parser *bp,
1421         struct dc_vram_info *info)
1422 {
1423         struct atom_vram_info_header_v2_5 *info_v25;
1424         enum bp_result result = BP_RESULT_OK;
1425
1426         info_v25 = GET_IMAGE(struct atom_vram_info_header_v2_5,
1427                                                 DATA_TABLES(vram_info));
1428
1429         if (info_v25 == NULL)
1430                 return BP_RESULT_BADBIOSTABLE;
1431
1432         info->num_chans = info_v25->vram_module[0].channel_num;
1433         info->dram_channel_width_bytes = (1 << info_v25->vram_module[0].channel_width) / 8;
1434
1435         return result;
1436 }
1437
1438 /*
1439  * get_integrated_info_v11
1440  *
1441  * @brief
1442  * Get V8 integrated BIOS information
1443  *
1444  * @param
1445  * bios_parser *bp - [in]BIOS parser handler to get master data table
1446  * integrated_info *info - [out] store and output integrated info
1447  *
1448  * @return
1449  * enum bp_result - BP_RESULT_OK if information is available,
1450  *                  BP_RESULT_BADBIOSTABLE otherwise.
1451  */
1452 static enum bp_result get_integrated_info_v11(
1453         struct bios_parser *bp,
1454         struct integrated_info *info)
1455 {
1456         struct atom_integrated_system_info_v1_11 *info_v11;
1457         uint32_t i;
1458
1459         info_v11 = GET_IMAGE(struct atom_integrated_system_info_v1_11,
1460                                         DATA_TABLES(integratedsysteminfo));
1461
1462         if (info_v11 == NULL)
1463                 return BP_RESULT_BADBIOSTABLE;
1464
1465         info->gpu_cap_info =
1466         le32_to_cpu(info_v11->gpucapinfo);
1467         /*
1468         * system_config: Bit[0] = 0 : PCIE power gating disabled
1469         *                       = 1 : PCIE power gating enabled
1470         *                Bit[1] = 0 : DDR-PLL shut down disabled
1471         *                       = 1 : DDR-PLL shut down enabled
1472         *                Bit[2] = 0 : DDR-PLL power down disabled
1473         *                       = 1 : DDR-PLL power down enabled
1474         */
1475         info->system_config = le32_to_cpu(info_v11->system_config);
1476         info->cpu_cap_info = le32_to_cpu(info_v11->cpucapinfo);
1477         info->memory_type = info_v11->memorytype;
1478         info->ma_channel_number = info_v11->umachannelnumber;
1479         info->lvds_ss_percentage =
1480         le16_to_cpu(info_v11->lvds_ss_percentage);
1481         info->dp_ss_control =
1482         le16_to_cpu(info_v11->reserved1);
1483         info->lvds_sspread_rate_in_10hz =
1484         le16_to_cpu(info_v11->lvds_ss_rate_10hz);
1485         info->hdmi_ss_percentage =
1486         le16_to_cpu(info_v11->hdmi_ss_percentage);
1487         info->hdmi_sspread_rate_in_10hz =
1488         le16_to_cpu(info_v11->hdmi_ss_rate_10hz);
1489         info->dvi_ss_percentage =
1490         le16_to_cpu(info_v11->dvi_ss_percentage);
1491         info->dvi_sspread_rate_in_10_hz =
1492         le16_to_cpu(info_v11->dvi_ss_rate_10hz);
1493         info->lvds_misc = info_v11->lvds_misc;
1494         for (i = 0; i < NUMBER_OF_UCHAR_FOR_GUID; ++i) {
1495                 info->ext_disp_conn_info.gu_id[i] =
1496                                 info_v11->extdispconninfo.guid[i];
1497         }
1498
1499         for (i = 0; i < MAX_NUMBER_OF_EXT_DISPLAY_PATH; ++i) {
1500                 info->ext_disp_conn_info.path[i].device_connector_id =
1501                 object_id_from_bios_object_id(
1502                 le16_to_cpu(info_v11->extdispconninfo.path[i].connectorobjid));
1503
1504                 info->ext_disp_conn_info.path[i].ext_encoder_obj_id =
1505                 object_id_from_bios_object_id(
1506                         le16_to_cpu(
1507                         info_v11->extdispconninfo.path[i].ext_encoder_objid));
1508
1509                 info->ext_disp_conn_info.path[i].device_tag =
1510                         le16_to_cpu(
1511                                 info_v11->extdispconninfo.path[i].device_tag);
1512                 info->ext_disp_conn_info.path[i].device_acpi_enum =
1513                 le16_to_cpu(
1514                         info_v11->extdispconninfo.path[i].device_acpi_enum);
1515                 info->ext_disp_conn_info.path[i].ext_aux_ddc_lut_index =
1516                         info_v11->extdispconninfo.path[i].auxddclut_index;
1517                 info->ext_disp_conn_info.path[i].ext_hpd_pin_lut_index =
1518                         info_v11->extdispconninfo.path[i].hpdlut_index;
1519                 info->ext_disp_conn_info.path[i].channel_mapping.raw =
1520                         info_v11->extdispconninfo.path[i].channelmapping;
1521                 info->ext_disp_conn_info.path[i].caps =
1522                                 le16_to_cpu(info_v11->extdispconninfo.path[i].caps);
1523         }
1524         info->ext_disp_conn_info.checksum =
1525         info_v11->extdispconninfo.checksum;
1526
1527         info->dp0_ext_hdmi_slv_addr = info_v11->dp0_retimer_set.HdmiSlvAddr;
1528         info->dp0_ext_hdmi_reg_num = info_v11->dp0_retimer_set.HdmiRegNum;
1529         for (i = 0; i < info->dp0_ext_hdmi_reg_num; i++) {
1530                 info->dp0_ext_hdmi_reg_settings[i].i2c_reg_index =
1531                                 info_v11->dp0_retimer_set.HdmiRegSetting[i].ucI2cRegIndex;
1532                 info->dp0_ext_hdmi_reg_settings[i].i2c_reg_val =
1533                                 info_v11->dp0_retimer_set.HdmiRegSetting[i].ucI2cRegVal;
1534         }
1535         info->dp0_ext_hdmi_6g_reg_num = info_v11->dp0_retimer_set.Hdmi6GRegNum;
1536         for (i = 0; i < info->dp0_ext_hdmi_6g_reg_num; i++) {
1537                 info->dp0_ext_hdmi_6g_reg_settings[i].i2c_reg_index =
1538                                 info_v11->dp0_retimer_set.Hdmi6GhzRegSetting[i].ucI2cRegIndex;
1539                 info->dp0_ext_hdmi_6g_reg_settings[i].i2c_reg_val =
1540                                 info_v11->dp0_retimer_set.Hdmi6GhzRegSetting[i].ucI2cRegVal;
1541         }
1542
1543         info->dp1_ext_hdmi_slv_addr = info_v11->dp1_retimer_set.HdmiSlvAddr;
1544         info->dp1_ext_hdmi_reg_num = info_v11->dp1_retimer_set.HdmiRegNum;
1545         for (i = 0; i < info->dp1_ext_hdmi_reg_num; i++) {
1546                 info->dp1_ext_hdmi_reg_settings[i].i2c_reg_index =
1547                                 info_v11->dp1_retimer_set.HdmiRegSetting[i].ucI2cRegIndex;
1548                 info->dp1_ext_hdmi_reg_settings[i].i2c_reg_val =
1549                                 info_v11->dp1_retimer_set.HdmiRegSetting[i].ucI2cRegVal;
1550         }
1551         info->dp1_ext_hdmi_6g_reg_num = info_v11->dp1_retimer_set.Hdmi6GRegNum;
1552         for (i = 0; i < info->dp1_ext_hdmi_6g_reg_num; i++) {
1553                 info->dp1_ext_hdmi_6g_reg_settings[i].i2c_reg_index =
1554                                 info_v11->dp1_retimer_set.Hdmi6GhzRegSetting[i].ucI2cRegIndex;
1555                 info->dp1_ext_hdmi_6g_reg_settings[i].i2c_reg_val =
1556                                 info_v11->dp1_retimer_set.Hdmi6GhzRegSetting[i].ucI2cRegVal;
1557         }
1558
1559         info->dp2_ext_hdmi_slv_addr = info_v11->dp2_retimer_set.HdmiSlvAddr;
1560         info->dp2_ext_hdmi_reg_num = info_v11->dp2_retimer_set.HdmiRegNum;
1561         for (i = 0; i < info->dp2_ext_hdmi_reg_num; i++) {
1562                 info->dp2_ext_hdmi_reg_settings[i].i2c_reg_index =
1563                                 info_v11->dp2_retimer_set.HdmiRegSetting[i].ucI2cRegIndex;
1564                 info->dp2_ext_hdmi_reg_settings[i].i2c_reg_val =
1565                                 info_v11->dp2_retimer_set.HdmiRegSetting[i].ucI2cRegVal;
1566         }
1567         info->dp2_ext_hdmi_6g_reg_num = info_v11->dp2_retimer_set.Hdmi6GRegNum;
1568         for (i = 0; i < info->dp2_ext_hdmi_6g_reg_num; i++) {
1569                 info->dp2_ext_hdmi_6g_reg_settings[i].i2c_reg_index =
1570                                 info_v11->dp2_retimer_set.Hdmi6GhzRegSetting[i].ucI2cRegIndex;
1571                 info->dp2_ext_hdmi_6g_reg_settings[i].i2c_reg_val =
1572                                 info_v11->dp2_retimer_set.Hdmi6GhzRegSetting[i].ucI2cRegVal;
1573         }
1574
1575         info->dp3_ext_hdmi_slv_addr = info_v11->dp3_retimer_set.HdmiSlvAddr;
1576         info->dp3_ext_hdmi_reg_num = info_v11->dp3_retimer_set.HdmiRegNum;
1577         for (i = 0; i < info->dp3_ext_hdmi_reg_num; i++) {
1578                 info->dp3_ext_hdmi_reg_settings[i].i2c_reg_index =
1579                                 info_v11->dp3_retimer_set.HdmiRegSetting[i].ucI2cRegIndex;
1580                 info->dp3_ext_hdmi_reg_settings[i].i2c_reg_val =
1581                                 info_v11->dp3_retimer_set.HdmiRegSetting[i].ucI2cRegVal;
1582         }
1583         info->dp3_ext_hdmi_6g_reg_num = info_v11->dp3_retimer_set.Hdmi6GRegNum;
1584         for (i = 0; i < info->dp3_ext_hdmi_6g_reg_num; i++) {
1585                 info->dp3_ext_hdmi_6g_reg_settings[i].i2c_reg_index =
1586                                 info_v11->dp3_retimer_set.Hdmi6GhzRegSetting[i].ucI2cRegIndex;
1587                 info->dp3_ext_hdmi_6g_reg_settings[i].i2c_reg_val =
1588                                 info_v11->dp3_retimer_set.Hdmi6GhzRegSetting[i].ucI2cRegVal;
1589         }
1590
1591
1592         /** TODO - review **/
1593         #if 0
1594         info->boot_up_engine_clock = le32_to_cpu(info_v11->ulBootUpEngineClock)
1595                                                                         * 10;
1596         info->dentist_vco_freq = le32_to_cpu(info_v11->ulDentistVCOFreq) * 10;
1597         info->boot_up_uma_clock = le32_to_cpu(info_v8->ulBootUpUMAClock) * 10;
1598
1599         for (i = 0; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
1600                 /* Convert [10KHz] into [KHz] */
1601                 info->disp_clk_voltage[i].max_supported_clk =
1602                 le32_to_cpu(info_v11->sDISPCLK_Voltage[i].
1603                         ulMaximumSupportedCLK) * 10;
1604                 info->disp_clk_voltage[i].voltage_index =
1605                 le32_to_cpu(info_v11->sDISPCLK_Voltage[i].ulVoltageIndex);
1606         }
1607
1608         info->boot_up_req_display_vector =
1609                         le32_to_cpu(info_v11->ulBootUpReqDisplayVector);
1610         info->boot_up_nb_voltage =
1611                         le16_to_cpu(info_v11->usBootUpNBVoltage);
1612         info->ext_disp_conn_info_offset =
1613                         le16_to_cpu(info_v11->usExtDispConnInfoOffset);
1614         info->gmc_restore_reset_time =
1615                         le32_to_cpu(info_v11->ulGMCRestoreResetTime);
1616         info->minimum_n_clk =
1617                         le32_to_cpu(info_v11->ulNbpStateNClkFreq[0]);
1618         for (i = 1; i < 4; ++i)
1619                 info->minimum_n_clk =
1620                                 info->minimum_n_clk <
1621                                 le32_to_cpu(info_v11->ulNbpStateNClkFreq[i]) ?
1622                                 info->minimum_n_clk : le32_to_cpu(
1623                                         info_v11->ulNbpStateNClkFreq[i]);
1624
1625         info->idle_n_clk = le32_to_cpu(info_v11->ulIdleNClk);
1626         info->ddr_dll_power_up_time =
1627             le32_to_cpu(info_v11->ulDDR_DLL_PowerUpTime);
1628         info->ddr_pll_power_up_time =
1629                 le32_to_cpu(info_v11->ulDDR_PLL_PowerUpTime);
1630         info->pcie_clk_ss_type = le16_to_cpu(info_v11->usPCIEClkSSType);
1631         info->max_lvds_pclk_freq_in_single_link =
1632                 le16_to_cpu(info_v11->usMaxLVDSPclkFreqInSingleLink);
1633         info->max_lvds_pclk_freq_in_single_link =
1634                 le16_to_cpu(info_v11->usMaxLVDSPclkFreqInSingleLink);
1635         info->lvds_pwr_on_seq_dig_on_to_de_in_4ms =
1636                 info_v11->ucLVDSPwrOnSeqDIGONtoDE_in4Ms;
1637         info->lvds_pwr_on_seq_de_to_vary_bl_in_4ms =
1638                 info_v11->ucLVDSPwrOnSeqDEtoVARY_BL_in4Ms;
1639         info->lvds_pwr_on_seq_vary_bl_to_blon_in_4ms =
1640                 info_v11->ucLVDSPwrOnSeqVARY_BLtoBLON_in4Ms;
1641         info->lvds_pwr_off_seq_vary_bl_to_de_in4ms =
1642                 info_v11->ucLVDSPwrOffSeqVARY_BLtoDE_in4Ms;
1643         info->lvds_pwr_off_seq_de_to_dig_on_in4ms =
1644                 info_v11->ucLVDSPwrOffSeqDEtoDIGON_in4Ms;
1645         info->lvds_pwr_off_seq_blon_to_vary_bl_in_4ms =
1646                 info_v11->ucLVDSPwrOffSeqBLONtoVARY_BL_in4Ms;
1647         info->lvds_off_to_on_delay_in_4ms =
1648                 info_v11->ucLVDSOffToOnDelay_in4Ms;
1649         info->lvds_bit_depth_control_val =
1650                 le32_to_cpu(info_v11->ulLCDBitDepthControlVal);
1651
1652         for (i = 0; i < NUMBER_OF_AVAILABLE_SCLK; ++i) {
1653                 /* Convert [10KHz] into [KHz] */
1654                 info->avail_s_clk[i].supported_s_clk =
1655                         le32_to_cpu(info_v11->sAvail_SCLK[i].ulSupportedSCLK)
1656                                                                         * 10;
1657                 info->avail_s_clk[i].voltage_index =
1658                         le16_to_cpu(info_v11->sAvail_SCLK[i].usVoltageIndex);
1659                 info->avail_s_clk[i].voltage_id =
1660                         le16_to_cpu(info_v11->sAvail_SCLK[i].usVoltageID);
1661         }
1662         #endif /* TODO*/
1663
1664         return BP_RESULT_OK;
1665 }
1666
1667
1668 /*
1669  * construct_integrated_info
1670  *
1671  * @brief
1672  * Get integrated BIOS information based on table revision
1673  *
1674  * @param
1675  * bios_parser *bp - [in]BIOS parser handler to get master data table
1676  * integrated_info *info - [out] store and output integrated info
1677  *
1678  * @return
1679  * enum bp_result - BP_RESULT_OK if information is available,
1680  *                  BP_RESULT_BADBIOSTABLE otherwise.
1681  */
1682 static enum bp_result construct_integrated_info(
1683         struct bios_parser *bp,
1684         struct integrated_info *info)
1685 {
1686         enum bp_result result = BP_RESULT_BADBIOSTABLE;
1687
1688         struct atom_common_table_header *header;
1689         struct atom_data_revision revision;
1690         uint32_t i;
1691         uint32_t j;
1692
1693         if (info && DATA_TABLES(integratedsysteminfo)) {
1694                 header = GET_IMAGE(struct atom_common_table_header,
1695                                         DATA_TABLES(integratedsysteminfo));
1696
1697                 get_atom_data_table_revision(header, &revision);
1698
1699                 /* Don't need to check major revision as they are all 1 */
1700                 switch (revision.minor) {
1701                 case 11:
1702                 case 12:
1703                         result = get_integrated_info_v11(bp, info);
1704                         break;
1705                 default:
1706                         return result;
1707                 }
1708         }
1709
1710         if (result != BP_RESULT_OK)
1711                 return result;
1712
1713         /* Sort voltage table from low to high*/
1714         for (i = 1; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
1715                 for (j = i; j > 0; --j) {
1716                         if (info->disp_clk_voltage[j].max_supported_clk <
1717                                 info->disp_clk_voltage[j-1].max_supported_clk
1718                                 ) {
1719                                 /* swap j and j - 1*/
1720                                 swap(info->disp_clk_voltage[j - 1],
1721                                      info->disp_clk_voltage[j]);
1722                         }
1723                 }
1724         }
1725
1726         return result;
1727 }
1728
1729 static enum bp_result bios_parser_get_vram_info(
1730                 struct dc_bios *dcb,
1731                 struct dc_vram_info *info)
1732 {
1733         struct bios_parser *bp = BP_FROM_DCB(dcb);
1734         enum bp_result result = BP_RESULT_BADBIOSTABLE;
1735         struct atom_common_table_header *header;
1736         struct atom_data_revision revision;
1737
1738         if (info && DATA_TABLES(vram_info)) {
1739                 header = GET_IMAGE(struct atom_common_table_header,
1740                                         DATA_TABLES(vram_info));
1741
1742                 get_atom_data_table_revision(header, &revision);
1743
1744                 switch (revision.major) {
1745                 case 2:
1746                         switch (revision.minor) {
1747                         case 3:
1748                                 result = get_vram_info_v23(bp, info);
1749                                 break;
1750                         case 4:
1751                                 result = get_vram_info_v24(bp, info);
1752                                 break;
1753                         case 5:
1754                                 result = get_vram_info_v25(bp, info);
1755                                 break;
1756                         default:
1757                                 break;
1758                         }
1759                         break;
1760
1761                 default:
1762                         return result;
1763                 }
1764
1765         }
1766         return result;
1767 }
1768
1769 static struct integrated_info *bios_parser_create_integrated_info(
1770         struct dc_bios *dcb)
1771 {
1772         struct bios_parser *bp = BP_FROM_DCB(dcb);
1773         struct integrated_info *info = NULL;
1774
1775         info = kzalloc(sizeof(struct integrated_info), GFP_KERNEL);
1776
1777         if (info == NULL) {
1778                 ASSERT_CRITICAL(0);
1779                 return NULL;
1780         }
1781
1782         if (construct_integrated_info(bp, info) == BP_RESULT_OK)
1783                 return info;
1784
1785         kfree(info);
1786
1787         return NULL;
1788 }
1789
1790 static enum bp_result update_slot_layout_info(
1791         struct dc_bios *dcb,
1792         unsigned int i,
1793         struct slot_layout_info *slot_layout_info)
1794 {
1795         unsigned int record_offset;
1796         unsigned int j;
1797         struct atom_display_object_path_v2 *object;
1798         struct atom_bracket_layout_record *record;
1799         struct atom_common_record_header *record_header;
1800         enum bp_result result;
1801         struct bios_parser *bp;
1802         struct object_info_table *tbl;
1803         struct display_object_info_table_v1_4 *v1_4;
1804
1805         record = NULL;
1806         record_header = NULL;
1807         result = BP_RESULT_NORECORD;
1808
1809         bp = BP_FROM_DCB(dcb);
1810         tbl = &bp->object_info_tbl;
1811         v1_4 = tbl->v1_4;
1812
1813         object = &v1_4->display_path[i];
1814         record_offset = (unsigned int)
1815                 (object->disp_recordoffset) +
1816                 (unsigned int)(bp->object_info_tbl_offset);
1817
1818         for (;;) {
1819
1820                 record_header = (struct atom_common_record_header *)
1821                         GET_IMAGE(struct atom_common_record_header,
1822                         record_offset);
1823                 if (record_header == NULL) {
1824                         result = BP_RESULT_BADBIOSTABLE;
1825                         break;
1826                 }
1827
1828                 /* the end of the list */
1829                 if (record_header->record_type == 0xff ||
1830                         record_header->record_size == 0)        {
1831                         break;
1832                 }
1833
1834                 if (record_header->record_type ==
1835                         ATOM_BRACKET_LAYOUT_RECORD_TYPE &&
1836                         sizeof(struct atom_bracket_layout_record)
1837                         <= record_header->record_size) {
1838                         record = (struct atom_bracket_layout_record *)
1839                                 (record_header);
1840                         result = BP_RESULT_OK;
1841                         break;
1842                 }
1843
1844                 record_offset += record_header->record_size;
1845         }
1846
1847         /* return if the record not found */
1848         if (result != BP_RESULT_OK)
1849                 return result;
1850
1851         /* get slot sizes */
1852         slot_layout_info->length = record->bracketlen;
1853         slot_layout_info->width = record->bracketwidth;
1854
1855         /* get info for each connector in the slot */
1856         slot_layout_info->num_of_connectors = record->conn_num;
1857         for (j = 0; j < slot_layout_info->num_of_connectors; ++j) {
1858                 slot_layout_info->connectors[j].connector_type =
1859                         (enum connector_layout_type)
1860                         (record->conn_info[j].connector_type);
1861                 switch (record->conn_info[j].connector_type) {
1862                 case CONNECTOR_TYPE_DVI_D:
1863                         slot_layout_info->connectors[j].connector_type =
1864                                 CONNECTOR_LAYOUT_TYPE_DVI_D;
1865                         slot_layout_info->connectors[j].length =
1866                                 CONNECTOR_SIZE_DVI;
1867                         break;
1868
1869                 case CONNECTOR_TYPE_HDMI:
1870                         slot_layout_info->connectors[j].connector_type =
1871                                 CONNECTOR_LAYOUT_TYPE_HDMI;
1872                         slot_layout_info->connectors[j].length =
1873                                 CONNECTOR_SIZE_HDMI;
1874                         break;
1875
1876                 case CONNECTOR_TYPE_DISPLAY_PORT:
1877                         slot_layout_info->connectors[j].connector_type =
1878                                 CONNECTOR_LAYOUT_TYPE_DP;
1879                         slot_layout_info->connectors[j].length =
1880                                 CONNECTOR_SIZE_DP;
1881                         break;
1882
1883                 case CONNECTOR_TYPE_MINI_DISPLAY_PORT:
1884                         slot_layout_info->connectors[j].connector_type =
1885                                 CONNECTOR_LAYOUT_TYPE_MINI_DP;
1886                         slot_layout_info->connectors[j].length =
1887                                 CONNECTOR_SIZE_MINI_DP;
1888                         break;
1889
1890                 default:
1891                         slot_layout_info->connectors[j].connector_type =
1892                                 CONNECTOR_LAYOUT_TYPE_UNKNOWN;
1893                         slot_layout_info->connectors[j].length =
1894                                 CONNECTOR_SIZE_UNKNOWN;
1895                 }
1896
1897                 slot_layout_info->connectors[j].position =
1898                         record->conn_info[j].position;
1899                 slot_layout_info->connectors[j].connector_id =
1900                         object_id_from_bios_object_id(
1901                                 record->conn_info[j].connectorobjid);
1902         }
1903         return result;
1904 }
1905
1906
1907 static enum bp_result get_bracket_layout_record(
1908         struct dc_bios *dcb,
1909         unsigned int bracket_layout_id,
1910         struct slot_layout_info *slot_layout_info)
1911 {
1912         unsigned int i;
1913         struct bios_parser *bp = BP_FROM_DCB(dcb);
1914         enum bp_result result;
1915         struct object_info_table *tbl;
1916         struct display_object_info_table_v1_4 *v1_4;
1917
1918         if (slot_layout_info == NULL) {
1919                 DC_LOG_DETECTION_EDID_PARSER("Invalid slot_layout_info\n");
1920                 return BP_RESULT_BADINPUT;
1921         }
1922         tbl = &bp->object_info_tbl;
1923         v1_4 = tbl->v1_4;
1924
1925         result = BP_RESULT_NORECORD;
1926         for (i = 0; i < v1_4->number_of_path; ++i)      {
1927
1928                 if (bracket_layout_id ==
1929                         v1_4->display_path[i].display_objid) {
1930                         result = update_slot_layout_info(dcb, i,
1931                                 slot_layout_info);
1932                         break;
1933                 }
1934         }
1935         return result;
1936 }
1937
1938 static enum bp_result bios_get_board_layout_info(
1939         struct dc_bios *dcb,
1940         struct board_layout_info *board_layout_info)
1941 {
1942         unsigned int i;
1943         enum bp_result record_result;
1944
1945         const unsigned int slot_index_to_vbios_id[MAX_BOARD_SLOTS] = {
1946                 GENERICOBJECT_BRACKET_LAYOUT_ENUM_ID1,
1947                 GENERICOBJECT_BRACKET_LAYOUT_ENUM_ID2,
1948                 0, 0
1949         };
1950
1951         if (board_layout_info == NULL) {
1952                 DC_LOG_DETECTION_EDID_PARSER("Invalid board_layout_info\n");
1953                 return BP_RESULT_BADINPUT;
1954         }
1955
1956         board_layout_info->num_of_slots = 0;
1957
1958         for (i = 0; i < MAX_BOARD_SLOTS; ++i) {
1959                 record_result = get_bracket_layout_record(dcb,
1960                         slot_index_to_vbios_id[i],
1961                         &board_layout_info->slots[i]);
1962
1963                 if (record_result == BP_RESULT_NORECORD && i > 0)
1964                         break; /* no more slots present in bios */
1965                 else if (record_result != BP_RESULT_OK)
1966                         return record_result;  /* fail */
1967
1968                 ++board_layout_info->num_of_slots;
1969         }
1970
1971         /* all data is valid */
1972         board_layout_info->is_number_of_slots_valid = 1;
1973         board_layout_info->is_slots_size_valid = 1;
1974         board_layout_info->is_connector_offsets_valid = 1;
1975         board_layout_info->is_connector_lengths_valid = 1;
1976
1977         return BP_RESULT_OK;
1978 }
1979
1980
1981 static uint16_t bios_parser_pack_data_tables(
1982         struct dc_bios *dcb,
1983         void *dst)
1984 {
1985 #ifdef PACK_BIOS_DATA
1986         struct bios_parser *bp = BP_FROM_DCB(dcb);
1987         struct atom_rom_header_v2_2 *rom_header = NULL;
1988         struct atom_rom_header_v2_2 *packed_rom_header = NULL;
1989         struct atom_common_table_header *data_tbl_header = NULL;
1990         struct atom_master_list_of_data_tables_v2_1 *data_tbl_list = NULL;
1991         struct atom_master_data_table_v2_1 *packed_master_data_tbl = NULL;
1992         struct atom_data_revision tbl_rev = {0};
1993         uint16_t *rom_header_offset = NULL;
1994         const uint8_t *bios = bp->base.bios;
1995         uint8_t *bios_dst = (uint8_t *)dst;
1996         uint16_t packed_rom_header_offset;
1997         uint16_t packed_masterdatatable_offset;
1998         uint16_t packed_data_tbl_offset;
1999         uint16_t data_tbl_offset;
2000         unsigned int i;
2001
2002         rom_header_offset =
2003                 GET_IMAGE(uint16_t, OFFSET_TO_ATOM_ROM_HEADER_POINTER);
2004
2005         if (!rom_header_offset)
2006                 return 0;
2007
2008         rom_header = GET_IMAGE(struct atom_rom_header_v2_2, *rom_header_offset);
2009
2010         if (!rom_header)
2011                 return 0;
2012
2013         get_atom_data_table_revision(&rom_header->table_header, &tbl_rev);
2014         if (!(tbl_rev.major >= 2 && tbl_rev.minor >= 2))
2015                 return 0;
2016
2017         get_atom_data_table_revision(&bp->master_data_tbl->table_header, &tbl_rev);
2018         if (!(tbl_rev.major >= 2 && tbl_rev.minor >= 1))
2019                 return 0;
2020
2021         packed_rom_header_offset =
2022                 OFFSET_TO_ATOM_ROM_HEADER_POINTER + sizeof(*rom_header_offset);
2023
2024         packed_masterdatatable_offset =
2025                 packed_rom_header_offset + rom_header->table_header.structuresize;
2026
2027         packed_data_tbl_offset =
2028                 packed_masterdatatable_offset +
2029                 bp->master_data_tbl->table_header.structuresize;
2030
2031         packed_rom_header =
2032                 (struct atom_rom_header_v2_2 *)(bios_dst + packed_rom_header_offset);
2033
2034         packed_master_data_tbl =
2035                 (struct atom_master_data_table_v2_1 *)(bios_dst +
2036                 packed_masterdatatable_offset);
2037
2038         memcpy(bios_dst, bios, OFFSET_TO_ATOM_ROM_HEADER_POINTER);
2039
2040         *((uint16_t *)(bios_dst + OFFSET_TO_ATOM_ROM_HEADER_POINTER)) =
2041                 packed_rom_header_offset;
2042
2043         memcpy(bios_dst + packed_rom_header_offset, rom_header,
2044                 rom_header->table_header.structuresize);
2045
2046         packed_rom_header->masterdatatable_offset = packed_masterdatatable_offset;
2047
2048         memcpy(&packed_master_data_tbl->table_header,
2049                 &bp->master_data_tbl->table_header,
2050                 sizeof(bp->master_data_tbl->table_header));
2051
2052         data_tbl_list = &bp->master_data_tbl->listOfdatatables;
2053
2054         /* Each data table offset in data table list is 2 bytes,
2055          * we can use that to iterate through listOfdatatables
2056          * without knowing the name of each member.
2057          */
2058         for (i = 0; i < sizeof(*data_tbl_list)/sizeof(uint16_t); i++) {
2059                 data_tbl_offset = *((uint16_t *)data_tbl_list + i);
2060
2061                 if (data_tbl_offset) {
2062                         data_tbl_header =
2063                                 (struct atom_common_table_header *)(bios + data_tbl_offset);
2064
2065                         memcpy(bios_dst + packed_data_tbl_offset, data_tbl_header,
2066                                 data_tbl_header->structuresize);
2067
2068                         *((uint16_t *)&packed_master_data_tbl->listOfdatatables + i) =
2069                                 packed_data_tbl_offset;
2070
2071                         packed_data_tbl_offset += data_tbl_header->structuresize;
2072                 } else {
2073                         *((uint16_t *)&packed_master_data_tbl->listOfdatatables + i) = 0;
2074                 }
2075         }
2076         return packed_data_tbl_offset;
2077 #endif
2078         // TODO: There is data bytes alignment issue, disable it for now.
2079         return 0;
2080 }
2081
2082 static struct atom_dc_golden_table_v1 *bios_get_golden_table(
2083                 struct bios_parser *bp,
2084                 uint32_t rev_major,
2085                 uint32_t rev_minor,
2086                 uint16_t *dc_golden_table_ver)
2087 {
2088         struct atom_display_controller_info_v4_4 *disp_cntl_tbl_4_4 = NULL;
2089         uint32_t dc_golden_offset = 0;
2090         *dc_golden_table_ver = 0;
2091
2092         if (!DATA_TABLES(dce_info))
2093                 return NULL;
2094
2095         /* ver.4.4 or higher */
2096         switch (rev_major) {
2097         case 4:
2098                 switch (rev_minor) {
2099                 case 4:
2100                         disp_cntl_tbl_4_4 = GET_IMAGE(struct atom_display_controller_info_v4_4,
2101                                                                         DATA_TABLES(dce_info));
2102                         if (!disp_cntl_tbl_4_4)
2103                                 return NULL;
2104                         dc_golden_offset = DATA_TABLES(dce_info) + disp_cntl_tbl_4_4->dc_golden_table_offset;
2105                         *dc_golden_table_ver = disp_cntl_tbl_4_4->dc_golden_table_ver;
2106                         break;
2107                 }
2108                 break;
2109         }
2110
2111         if (!dc_golden_offset)
2112                 return NULL;
2113
2114         if (*dc_golden_table_ver != 1)
2115                 return NULL;
2116
2117         return GET_IMAGE(struct atom_dc_golden_table_v1,
2118                         dc_golden_offset);
2119 }
2120
2121 static enum bp_result bios_get_atom_dc_golden_table(
2122         struct dc_bios *dcb)
2123 {
2124         struct bios_parser *bp = BP_FROM_DCB(dcb);
2125         enum bp_result result = BP_RESULT_OK;
2126         struct atom_dc_golden_table_v1 *atom_dc_golden_table = NULL;
2127         struct atom_common_table_header *header;
2128         struct atom_data_revision tbl_revision;
2129         uint16_t dc_golden_table_ver = 0;
2130
2131         header = GET_IMAGE(struct atom_common_table_header,
2132                                                         DATA_TABLES(dce_info));
2133         if (!header)
2134                 return BP_RESULT_UNSUPPORTED;
2135
2136         get_atom_data_table_revision(header, &tbl_revision);
2137
2138         atom_dc_golden_table = bios_get_golden_table(bp,
2139                         tbl_revision.major,
2140                         tbl_revision.minor,
2141                         &dc_golden_table_ver);
2142
2143         if (!atom_dc_golden_table)
2144                 return BP_RESULT_UNSUPPORTED;
2145
2146         dcb->golden_table.dc_golden_table_ver = dc_golden_table_ver;
2147         dcb->golden_table.aux_dphy_rx_control0_val = atom_dc_golden_table->aux_dphy_rx_control0_val;
2148         dcb->golden_table.aux_dphy_rx_control1_val = atom_dc_golden_table->aux_dphy_rx_control1_val;
2149         dcb->golden_table.aux_dphy_tx_control_val = atom_dc_golden_table->aux_dphy_tx_control_val;
2150         dcb->golden_table.dc_gpio_aux_ctrl_0_val = atom_dc_golden_table->dc_gpio_aux_ctrl_0_val;
2151         dcb->golden_table.dc_gpio_aux_ctrl_1_val = atom_dc_golden_table->dc_gpio_aux_ctrl_1_val;
2152         dcb->golden_table.dc_gpio_aux_ctrl_2_val = atom_dc_golden_table->dc_gpio_aux_ctrl_2_val;
2153         dcb->golden_table.dc_gpio_aux_ctrl_3_val = atom_dc_golden_table->dc_gpio_aux_ctrl_3_val;
2154         dcb->golden_table.dc_gpio_aux_ctrl_4_val = atom_dc_golden_table->dc_gpio_aux_ctrl_4_val;
2155         dcb->golden_table.dc_gpio_aux_ctrl_5_val = atom_dc_golden_table->dc_gpio_aux_ctrl_5_val;
2156
2157         return result;
2158 }
2159
2160
2161 static const struct dc_vbios_funcs vbios_funcs = {
2162         .get_connectors_number = bios_parser_get_connectors_number,
2163
2164         .get_connector_id = bios_parser_get_connector_id,
2165
2166         .get_src_obj = bios_parser_get_src_obj,
2167
2168         .get_i2c_info = bios_parser_get_i2c_info,
2169
2170         .get_hpd_info = bios_parser_get_hpd_info,
2171
2172         .get_device_tag = bios_parser_get_device_tag,
2173
2174         .get_spread_spectrum_info = bios_parser_get_spread_spectrum_info,
2175
2176         .get_ss_entry_number = bios_parser_get_ss_entry_number,
2177
2178         .get_embedded_panel_info = bios_parser_get_embedded_panel_info,
2179
2180         .get_gpio_pin_info = bios_parser_get_gpio_pin_info,
2181
2182         .get_encoder_cap_info = bios_parser_get_encoder_cap_info,
2183
2184         .is_device_id_supported = bios_parser_is_device_id_supported,
2185
2186         .is_accelerated_mode = bios_parser_is_accelerated_mode,
2187
2188         .set_scratch_critical_state = bios_parser_set_scratch_critical_state,
2189
2190
2191 /*       COMMANDS */
2192         .encoder_control = bios_parser_encoder_control,
2193
2194         .transmitter_control = bios_parser_transmitter_control,
2195
2196         .enable_crtc = bios_parser_enable_crtc,
2197
2198         .set_pixel_clock = bios_parser_set_pixel_clock,
2199
2200         .set_dce_clock = bios_parser_set_dce_clock,
2201
2202         .program_crtc_timing = bios_parser_program_crtc_timing,
2203
2204         .enable_disp_power_gating = bios_parser_enable_disp_power_gating,
2205
2206         .bios_parser_destroy = firmware_parser_destroy,
2207
2208         .get_board_layout_info = bios_get_board_layout_info,
2209         .pack_data_tables = bios_parser_pack_data_tables,
2210
2211         .get_atom_dc_golden_table = bios_get_atom_dc_golden_table
2212 };
2213
2214 static bool bios_parser2_construct(
2215         struct bios_parser *bp,
2216         struct bp_init_data *init,
2217         enum dce_version dce_version)
2218 {
2219         uint16_t *rom_header_offset = NULL;
2220         struct atom_rom_header_v2_2 *rom_header = NULL;
2221         struct display_object_info_table_v1_4 *object_info_tbl;
2222         struct atom_data_revision tbl_rev = {0};
2223
2224         if (!init)
2225                 return false;
2226
2227         if (!init->bios)
2228                 return false;
2229
2230         bp->base.funcs = &vbios_funcs;
2231         bp->base.bios = init->bios;
2232         bp->base.bios_size = bp->base.bios[OFFSET_TO_ATOM_ROM_IMAGE_SIZE] * BIOS_IMAGE_SIZE_UNIT;
2233
2234         bp->base.ctx = init->ctx;
2235
2236         bp->base.bios_local_image = NULL;
2237
2238         rom_header_offset =
2239                         GET_IMAGE(uint16_t, OFFSET_TO_ATOM_ROM_HEADER_POINTER);
2240
2241         if (!rom_header_offset)
2242                 return false;
2243
2244         rom_header = GET_IMAGE(struct atom_rom_header_v2_2, *rom_header_offset);
2245
2246         if (!rom_header)
2247                 return false;
2248
2249         get_atom_data_table_revision(&rom_header->table_header, &tbl_rev);
2250         if (!(tbl_rev.major >= 2 && tbl_rev.minor >= 2))
2251                 return false;
2252
2253         bp->master_data_tbl =
2254                 GET_IMAGE(struct atom_master_data_table_v2_1,
2255                                 rom_header->masterdatatable_offset);
2256
2257         if (!bp->master_data_tbl)
2258                 return false;
2259
2260         bp->object_info_tbl_offset = DATA_TABLES(displayobjectinfo);
2261
2262         if (!bp->object_info_tbl_offset)
2263                 return false;
2264
2265         object_info_tbl =
2266                         GET_IMAGE(struct display_object_info_table_v1_4,
2267                                                 bp->object_info_tbl_offset);
2268
2269         if (!object_info_tbl)
2270                 return false;
2271
2272         get_atom_data_table_revision(&object_info_tbl->table_header,
2273                 &bp->object_info_tbl.revision);
2274
2275         if (bp->object_info_tbl.revision.major == 1
2276                 && bp->object_info_tbl.revision.minor >= 4) {
2277                 struct display_object_info_table_v1_4 *tbl_v1_4;
2278
2279                 tbl_v1_4 = GET_IMAGE(struct display_object_info_table_v1_4,
2280                         bp->object_info_tbl_offset);
2281                 if (!tbl_v1_4)
2282                         return false;
2283
2284                 bp->object_info_tbl.v1_4 = tbl_v1_4;
2285         } else
2286                 return false;
2287
2288         dal_firmware_parser_init_cmd_tbl(bp);
2289         dal_bios_parser_init_cmd_tbl_helper2(&bp->cmd_helper, dce_version);
2290
2291         bp->base.integrated_info = bios_parser_create_integrated_info(&bp->base);
2292         bp->base.fw_info_valid = bios_parser_get_firmware_info(&bp->base, &bp->base.fw_info) == BP_RESULT_OK;
2293         bios_parser_get_vram_info(&bp->base, &bp->base.vram_info);
2294
2295         return true;
2296 }
2297
2298 struct dc_bios *firmware_parser_create(
2299         struct bp_init_data *init,
2300         enum dce_version dce_version)
2301 {
2302         struct bios_parser *bp = NULL;
2303
2304         bp = kzalloc(sizeof(struct bios_parser), GFP_KERNEL);
2305         if (!bp)
2306                 return NULL;
2307
2308         if (bios_parser2_construct(bp, init, dce_version))
2309                 return &bp->base;
2310
2311         kfree(bp);
2312         return NULL;
2313 }
2314
2315