drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include <linux/version.h>
  27 #include <drm/drm_atomic_helper.h>
  28 #include "dm_services.h"
  29 #include "amdgpu.h"
  30 #include "amdgpu_dm.h"
  31 #include "amdgpu_dm_mst_types.h"
  32
  33 #include "dc.h"
  34 #include "dm_helpers.h"
  35
  36 #include "dc_link_ddc.h"
  37
  38 #include "i2caux_interface.h"
  39
  40 /* #define TRACE_DPCD */
  41
  42 #ifdef TRACE_DPCD
  43 #define SIDE_BAND_MSG(address) (address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE && address < DP_SINK_COUNT_ESI)
  44
  45 static inline char *side_band_msg_type_to_str(uint32_t address)
  46 {
  47         static char str[10] = {0};
  48
  49         if (address < DP_SIDEBAND_MSG_UP_REP_BASE)
  50                 strcpy(str, "DOWN_REQ");
  51         else if (address < DP_SIDEBAND_MSG_DOWN_REP_BASE)
  52                 strcpy(str, "UP_REP");
  53         else if (address < DP_SIDEBAND_MSG_UP_REQ_BASE)
  54                 strcpy(str, "DOWN_REP");
  55         else
  56                 strcpy(str, "UP_REQ");
  57
  58         return str;
  59 }
  60
  61 static void log_dpcd(uint8_t type,
  62                      uint32_t address,
  63                      uint8_t *data,
  64                      uint32_t size,
  65                      bool res)
  66 {
  67         DRM_DEBUG_KMS("Op: %s, addr: %04x, SideBand Msg: %s, Op res: %s\n",
  68                         (type == DP_AUX_NATIVE_READ) ||
  69                         (type == DP_AUX_I2C_READ) ?
  70                                         "Read" : "Write",
  71                         address,
  72                         SIDE_BAND_MSG(address) ?
  73                                         side_band_msg_type_to_str(address) : "Nop",
  74                         res ? "OK" : "Fail");
  75
  76         if (res) {
  77                 print_hex_dump(KERN_INFO, "Body: ", DUMP_PREFIX_NONE, 16, 1, data, size, false);
  78         }
  79 }
  80 #endif
  81
  82 static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
  83                                   struct drm_dp_aux_msg *msg)
  84 {
  85         ssize_t result = 0;
  86         struct aux_payload payload;
  87         enum aux_channel_operation_result operation_result;
  88
  89         if (WARN_ON(msg->size > 16))
  90                 return -E2BIG;
  91
  92         payload.address = msg->address;
  93         payload.data = msg->buffer;
  94         payload.length = msg->size;
  95         payload.reply = &msg->reply;
  96         payload.i2c_over_aux = (msg->request & DP_AUX_NATIVE_WRITE) == 0;
  97         payload.write = (msg->request & DP_AUX_I2C_READ) == 0;
  98         payload.mot = (msg->request & DP_AUX_I2C_MOT) != 0;
  99         payload.defer_delay = 0;
 100
 101         result = dc_link_aux_transfer_raw(TO_DM_AUX(aux)->ddc_service, &payload,
 102                                       &operation_result);
 103
 104         if (payload.write)
 105                 result = msg->size;
 106
 107         if (result < 0)
 108                 switch (operation_result) {
 109                 case AUX_CHANNEL_OPERATION_SUCCEEDED:
 110                         break;
 111                 case AUX_CHANNEL_OPERATION_FAILED_HPD_DISCON:
 112                 case AUX_CHANNEL_OPERATION_FAILED_REASON_UNKNOWN:
 113                         result = -EIO;
 114                         break;
 115                 case AUX_CHANNEL_OPERATION_FAILED_INVALID_REPLY:
 116                         result = -EBUSY;
 117                         break;
 118                 case AUX_CHANNEL_OPERATION_FAILED_TIMEOUT:
 119                         result = -ETIMEDOUT;
 120                         break;
 121                 }
 122
 123         return result;
 124 }
 125
 126 static enum drm_connector_status
 127 dm_dp_mst_detect(struct drm_connector *connector, bool force)
 128 {
 129         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 130         struct amdgpu_dm_connector *master = aconnector->mst_port;
 131
 132         enum drm_connector_status status =
 133                 drm_dp_mst_detect_port(
 134                         connector,
 135                         &master->mst_mgr,
 136                         aconnector->port);
 137
 138         return status;
 139 }
 140
 141 static void
 142 dm_dp_mst_connector_destroy(struct drm_connector *connector)
 143 {
 144         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 145         struct amdgpu_encoder *amdgpu_encoder = amdgpu_dm_connector->mst_encoder;
 146
 147         if (amdgpu_dm_connector->edid) {
 148                 kfree(amdgpu_dm_connector->edid);
 149                 amdgpu_dm_connector->edid = NULL;
 150         }
 151
 152         drm_encoder_cleanup(&amdgpu_encoder->base);
 153         kfree(amdgpu_encoder);
 154         drm_connector_cleanup(connector);
 155         drm_dp_mst_put_port_malloc(amdgpu_dm_connector->port);
 156         kfree(amdgpu_dm_connector);
 157 }
 158
 159 static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
 160         .detect = dm_dp_mst_detect,
 161         .fill_modes = drm_helper_probe_single_connector_modes,
 162         .destroy = dm_dp_mst_connector_destroy,
 163         .reset = amdgpu_dm_connector_funcs_reset,
 164         .atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
 165         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 166         .atomic_set_property = amdgpu_dm_connector_atomic_set_property,
 167         .atomic_get_property = amdgpu_dm_connector_atomic_get_property
 168 };
 169
 170 static int dm_dp_mst_get_modes(struct drm_connector *connector)
 171 {
 172         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 173         int ret = 0;
 174
 175         if (!aconnector)
 176                 return drm_add_edid_modes(connector, NULL);
 177
 178         if (!aconnector->edid) {
 179                 struct edid *edid;
 180                 edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port);
 181
 182                 if (!edid) {
 183                         drm_connector_update_edid_property(
 184                                 &aconnector->base,
 185                                 NULL);
 186                         return ret;
 187                 }
 188
 189                 aconnector->edid = edid;
 190         }
 191
 192         if (aconnector->dc_sink && aconnector->dc_sink->sink_signal == SIGNAL_TYPE_VIRTUAL) {
 193                 dc_sink_release(aconnector->dc_sink);
 194                 aconnector->dc_sink = NULL;
 195         }
 196
 197         if (!aconnector->dc_sink) {
 198                 struct dc_sink *dc_sink;
 199                 struct dc_sink_init_data init_params = {
 200                                 .link = aconnector->dc_link,
 201                                 .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST };
 202                 dc_sink = dc_link_add_remote_sink(
 203                         aconnector->dc_link,
 204                         (uint8_t *)aconnector->edid,
 205                         (aconnector->edid->extensions + 1) * EDID_LENGTH,
 206                         &init_params);
 207
 208                 dc_sink->priv = aconnector;
 209                 /* dc_link_add_remote_sink returns a new reference */
 210                 aconnector->dc_sink = dc_sink;
 211
 212                 if (aconnector->dc_sink)
 213                         amdgpu_dm_update_freesync_caps(
 214                                         connector, aconnector->edid);
 215
 216         }
 217
 218         drm_connector_update_edid_property(
 219                                         &aconnector->base, aconnector->edid);
 220
 221         ret = drm_add_edid_modes(connector, aconnector->edid);
 222
 223         return ret;
 224 }
 225
 226 static struct drm_encoder *dm_mst_best_encoder(struct drm_connector *connector)
 227 {
 228         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 229
 230         return &amdgpu_dm_connector->mst_encoder->base;
 231 }
 232
 233 static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_funcs = {
 234         .get_modes = dm_dp_mst_get_modes,
 235         .mode_valid = amdgpu_dm_connector_mode_valid,
 236         .best_encoder = dm_mst_best_encoder,
 237 };
 238
 239 static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
 240 {
 241         drm_encoder_cleanup(encoder);
 242         kfree(encoder);
 243 }
 244
 245 static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = {
 246         .destroy = amdgpu_dm_encoder_destroy,
 247 };
 248
 249 static struct amdgpu_encoder *
 250 dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector)
 251 {
 252         struct drm_device *dev = connector->base.dev;
 253         struct amdgpu_device *adev = dev->dev_private;
 254         struct amdgpu_encoder *amdgpu_encoder;
 255         struct drm_encoder *encoder;
 256
 257         amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL);
 258         if (!amdgpu_encoder)
 259                 return NULL;
 260
 261         encoder = &amdgpu_encoder->base;
 262         encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
 263
 264         drm_encoder_init(
 265                 dev,
 266                 &amdgpu_encoder->base,
 267                 &amdgpu_dm_encoder_funcs,
 268                 DRM_MODE_ENCODER_DPMST,
 269                 NULL);
 270
 271         drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
 272
 273         return amdgpu_encoder;
 274 }
 275
 276 static struct drm_connector *
 277 dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 278                         struct drm_dp_mst_port *port,
 279                         const char *pathprop)
 280 {
 281         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 282         struct drm_device *dev = master->base.dev;
 283         struct amdgpu_device *adev = dev->dev_private;
 284         struct amdgpu_dm_connector *aconnector;
 285         struct drm_connector *connector;
 286
 287         aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
 288         if (!aconnector)
 289                 return NULL;
 290
 291         connector = &aconnector->base;
 292         aconnector->port = port;
 293         aconnector->mst_port = master;
 294
 295         if (drm_connector_init(
 296                 dev,
 297                 connector,
 298                 &dm_dp_mst_connector_funcs,
 299                 DRM_MODE_CONNECTOR_DisplayPort)) {
 300                 kfree(aconnector);
 301                 return NULL;
 302         }
 303         drm_connector_helper_add(connector, &dm_dp_mst_connector_helper_funcs);
 304
 305         amdgpu_dm_connector_init_helper(
 306                 &adev->dm,
 307                 aconnector,
 308                 DRM_MODE_CONNECTOR_DisplayPort,
 309                 master->dc_link,
 310                 master->connector_id);
 311
 312         aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master);
 313         drm_connector_attach_encoder(&aconnector->base,
 314                                      &aconnector->mst_encoder->base);
 315
 316         drm_object_attach_property(
 317                 &connector->base,
 318                 dev->mode_config.path_property,
 319                 0);
 320         drm_object_attach_property(
 321                 &connector->base,
 322                 dev->mode_config.tile_property,
 323                 0);
 324
 325         drm_connector_set_path_property(connector, pathprop);
 326
 327         /*
 328          * Initialize connector state before adding the connectror to drm and
 329          * framebuffer lists
 330          */
 331         amdgpu_dm_connector_funcs_reset(connector);
 332
 333         DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
 334                  aconnector, connector->base.id, aconnector->mst_port);
 335
 336         drm_dp_mst_get_port_malloc(port);
 337
 338         DRM_DEBUG_KMS(":%d\n", connector->base.id);
 339
 340         return connector;
 341 }
 342
 343 static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 344                                         struct drm_connector *connector)
 345 {
 346         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 347         struct drm_device *dev = master->base.dev;
 348         struct amdgpu_device *adev = dev->dev_private;
 349         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 350
 351         DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
 352                  aconnector, connector->base.id, aconnector->mst_port);
 353
 354         if (aconnector->dc_sink) {
 355                 amdgpu_dm_update_freesync_caps(connector, NULL);
 356                 dc_link_remove_remote_sink(aconnector->dc_link,
 357                                            aconnector->dc_sink);
 358                 dc_sink_release(aconnector->dc_sink);
 359                 aconnector->dc_sink = NULL;
 360         }
 361
 362         drm_connector_unregister(connector);
 363         if (adev->mode_info.rfbdev)
 364                 drm_fb_helper_remove_one_connector(&adev->mode_info.rfbdev->helper, connector);
 365         drm_connector_put(connector);
 366 }
 367
 368 static void dm_dp_mst_register_connector(struct drm_connector *connector)
 369 {
 370         struct drm_device *dev = connector->dev;
 371         struct amdgpu_device *adev = dev->dev_private;
 372
 373         if (adev->mode_info.rfbdev)
 374                 drm_fb_helper_add_one_connector(&adev->mode_info.rfbdev->helper, connector);
 375         else
 376                 DRM_ERROR("adev->mode_info.rfbdev is NULL\n");
 377
 378         drm_connector_register(connector);
 379 }
 380
 381 static const struct drm_dp_mst_topology_cbs dm_mst_cbs = {
 382         .add_connector = dm_dp_add_mst_connector,
 383         .destroy_connector = dm_dp_destroy_mst_connector,
 384         .register_connector = dm_dp_mst_register_connector
 385 };
 386
 387 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
 388                                        struct amdgpu_dm_connector *aconnector)
 389 {
 390         aconnector->dm_dp_aux.aux.name = "dmdc";
 391         aconnector->dm_dp_aux.aux.dev = dm->adev->dev;
 392         aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
 393         aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
 394
 395         drm_dp_aux_register(&aconnector->dm_dp_aux.aux);
 396         drm_dp_cec_register_connector(&aconnector->dm_dp_aux.aux,
 397                                       aconnector->base.name, dm->adev->dev);
 398         aconnector->mst_mgr.cbs = &dm_mst_cbs;
 399         drm_dp_mst_topology_mgr_init(
 400                 &aconnector->mst_mgr,
 401                 dm->adev->ddev,
 402                 &aconnector->dm_dp_aux.aux,
 403                 16,
 404                 4,
 405                 aconnector->connector_id);
 406 }
 407