2 * Copyright 2012-15 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include <linux/version.h>
27 #include <drm/drm_atomic_helper.h>
28 #include "dm_services.h"
30 #include "amdgpu_dm.h"
31 #include "amdgpu_dm_mst_types.h"
34 #include "dm_helpers.h"
36 #include "dc_link_ddc.h"
38 #include "i2caux_interface.h"
40 /* #define TRACE_DPCD */
43 #define SIDE_BAND_MSG(address) (address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE && address < DP_SINK_COUNT_ESI)
45 static inline char *side_band_msg_type_to_str(uint32_t address)
47 static char str[10] = {0};
49 if (address < DP_SIDEBAND_MSG_UP_REP_BASE)
50 strcpy(str, "DOWN_REQ");
51 else if (address < DP_SIDEBAND_MSG_DOWN_REP_BASE)
52 strcpy(str, "UP_REP");
53 else if (address < DP_SIDEBAND_MSG_UP_REQ_BASE)
54 strcpy(str, "DOWN_REP");
56 strcpy(str, "UP_REQ");
61 static void log_dpcd(uint8_t type,
67 DRM_DEBUG_KMS("Op: %s, addr: %04x, SideBand Msg: %s, Op res: %s\n",
68 (type == DP_AUX_NATIVE_READ) ||
69 (type == DP_AUX_I2C_READ) ?
72 SIDE_BAND_MSG(address) ?
73 side_band_msg_type_to_str(address) : "Nop",
77 print_hex_dump(KERN_INFO, "Body: ", DUMP_PREFIX_NONE, 16, 1, data, size, false);
82 static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
83 struct drm_dp_aux_msg *msg)
86 struct aux_payload payload;
87 enum aux_channel_operation_result operation_result;
89 if (WARN_ON(msg->size > 16))
92 payload.address = msg->address;
93 payload.data = msg->buffer;
94 payload.length = msg->size;
95 payload.reply = &msg->reply;
96 payload.i2c_over_aux = (msg->request & DP_AUX_NATIVE_WRITE) == 0;
97 payload.write = (msg->request & DP_AUX_I2C_READ) == 0;
98 payload.mot = (msg->request & DP_AUX_I2C_MOT) != 0;
99 payload.defer_delay = 0;
101 result = dc_link_aux_transfer_raw(TO_DM_AUX(aux)->ddc_service, &payload,
108 switch (operation_result) {
109 case AUX_CHANNEL_OPERATION_SUCCEEDED:
111 case AUX_CHANNEL_OPERATION_FAILED_HPD_DISCON:
112 case AUX_CHANNEL_OPERATION_FAILED_REASON_UNKNOWN:
115 case AUX_CHANNEL_OPERATION_FAILED_INVALID_REPLY:
118 case AUX_CHANNEL_OPERATION_FAILED_TIMEOUT:
126 static enum drm_connector_status
127 dm_dp_mst_detect(struct drm_connector *connector, bool force)
129 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
130 struct amdgpu_dm_connector *master = aconnector->mst_port;
132 enum drm_connector_status status =
133 drm_dp_mst_detect_port(
142 dm_dp_mst_connector_destroy(struct drm_connector *connector)
144 struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
145 struct amdgpu_encoder *amdgpu_encoder = amdgpu_dm_connector->mst_encoder;
147 kfree(amdgpu_dm_connector->edid);
148 amdgpu_dm_connector->edid = NULL;
150 drm_encoder_cleanup(&amdgpu_encoder->base);
151 kfree(amdgpu_encoder);
152 drm_connector_cleanup(connector);
153 drm_dp_mst_put_port_malloc(amdgpu_dm_connector->port);
154 kfree(amdgpu_dm_connector);
158 amdgpu_dm_mst_connector_late_register(struct drm_connector *connector)
160 struct amdgpu_dm_connector *amdgpu_dm_connector =
161 to_amdgpu_dm_connector(connector);
162 struct drm_dp_mst_port *port = amdgpu_dm_connector->port;
164 return drm_dp_mst_connector_late_register(connector, port);
168 amdgpu_dm_mst_connector_early_unregister(struct drm_connector *connector)
170 struct amdgpu_dm_connector *amdgpu_dm_connector =
171 to_amdgpu_dm_connector(connector);
172 struct drm_dp_mst_port *port = amdgpu_dm_connector->port;
174 drm_dp_mst_connector_early_unregister(connector, port);
177 static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
178 .detect = dm_dp_mst_detect,
179 .fill_modes = drm_helper_probe_single_connector_modes,
180 .destroy = dm_dp_mst_connector_destroy,
181 .reset = amdgpu_dm_connector_funcs_reset,
182 .atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
183 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
184 .atomic_set_property = amdgpu_dm_connector_atomic_set_property,
185 .atomic_get_property = amdgpu_dm_connector_atomic_get_property,
186 .late_register = amdgpu_dm_mst_connector_late_register,
187 .early_unregister = amdgpu_dm_mst_connector_early_unregister,
190 static int dm_dp_mst_get_modes(struct drm_connector *connector)
192 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
196 return drm_add_edid_modes(connector, NULL);
198 if (!aconnector->edid) {
200 edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port);
203 drm_connector_update_edid_property(
209 aconnector->edid = edid;
212 if (aconnector->dc_sink && aconnector->dc_sink->sink_signal == SIGNAL_TYPE_VIRTUAL) {
213 dc_sink_release(aconnector->dc_sink);
214 aconnector->dc_sink = NULL;
217 if (!aconnector->dc_sink) {
218 struct dc_sink *dc_sink;
219 struct dc_sink_init_data init_params = {
220 .link = aconnector->dc_link,
221 .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST };
222 dc_sink = dc_link_add_remote_sink(
224 (uint8_t *)aconnector->edid,
225 (aconnector->edid->extensions + 1) * EDID_LENGTH,
228 dc_sink->priv = aconnector;
229 /* dc_link_add_remote_sink returns a new reference */
230 aconnector->dc_sink = dc_sink;
232 if (aconnector->dc_sink)
233 amdgpu_dm_update_freesync_caps(
234 connector, aconnector->edid);
238 drm_connector_update_edid_property(
239 &aconnector->base, aconnector->edid);
241 ret = drm_add_edid_modes(connector, aconnector->edid);
246 static struct drm_encoder *
247 dm_mst_atomic_best_encoder(struct drm_connector *connector,
248 struct drm_connector_state *connector_state)
250 return &to_amdgpu_dm_connector(connector)->mst_encoder->base;
253 static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_funcs = {
254 .get_modes = dm_dp_mst_get_modes,
255 .mode_valid = amdgpu_dm_connector_mode_valid,
256 .atomic_best_encoder = dm_mst_atomic_best_encoder,
259 static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
261 drm_encoder_cleanup(encoder);
265 static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = {
266 .destroy = amdgpu_dm_encoder_destroy,
269 static struct amdgpu_encoder *
270 dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector)
272 struct drm_device *dev = connector->base.dev;
273 struct amdgpu_device *adev = dev->dev_private;
274 struct amdgpu_encoder *amdgpu_encoder;
275 struct drm_encoder *encoder;
277 amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL);
281 encoder = &amdgpu_encoder->base;
282 encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
286 &amdgpu_encoder->base,
287 &amdgpu_dm_encoder_funcs,
288 DRM_MODE_ENCODER_DPMST,
291 drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
293 return amdgpu_encoder;
296 static struct drm_connector *
297 dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
298 struct drm_dp_mst_port *port,
299 const char *pathprop)
301 struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
302 struct drm_device *dev = master->base.dev;
303 struct amdgpu_device *adev = dev->dev_private;
304 struct amdgpu_dm_connector *aconnector;
305 struct drm_connector *connector;
307 aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
311 connector = &aconnector->base;
312 aconnector->port = port;
313 aconnector->mst_port = master;
315 if (drm_connector_init(
318 &dm_dp_mst_connector_funcs,
319 DRM_MODE_CONNECTOR_DisplayPort)) {
323 drm_connector_helper_add(connector, &dm_dp_mst_connector_helper_funcs);
325 amdgpu_dm_connector_init_helper(
328 DRM_MODE_CONNECTOR_DisplayPort,
330 master->connector_id);
332 aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master);
333 drm_connector_attach_encoder(&aconnector->base,
334 &aconnector->mst_encoder->base);
336 drm_object_attach_property(
338 dev->mode_config.path_property,
340 drm_object_attach_property(
342 dev->mode_config.tile_property,
345 drm_connector_set_path_property(connector, pathprop);
348 * Initialize connector state before adding the connectror to drm and
351 amdgpu_dm_connector_funcs_reset(connector);
353 DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
354 aconnector, connector->base.id, aconnector->mst_port);
356 drm_dp_mst_get_port_malloc(port);
358 DRM_DEBUG_KMS(":%d\n", connector->base.id);
363 static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
364 struct drm_connector *connector)
366 struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
367 struct drm_device *dev = master->base.dev;
368 struct amdgpu_device *adev = dev->dev_private;
369 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
371 DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
372 aconnector, connector->base.id, aconnector->mst_port);
374 if (aconnector->dc_sink) {
375 amdgpu_dm_update_freesync_caps(connector, NULL);
376 dc_link_remove_remote_sink(aconnector->dc_link,
377 aconnector->dc_sink);
378 dc_sink_release(aconnector->dc_sink);
379 aconnector->dc_sink = NULL;
382 drm_connector_unregister(connector);
383 if (adev->mode_info.rfbdev)
384 drm_fb_helper_remove_one_connector(&adev->mode_info.rfbdev->helper, connector);
385 drm_connector_put(connector);
388 static void dm_dp_mst_register_connector(struct drm_connector *connector)
390 struct drm_device *dev = connector->dev;
391 struct amdgpu_device *adev = dev->dev_private;
393 if (adev->mode_info.rfbdev)
394 drm_fb_helper_add_one_connector(&adev->mode_info.rfbdev->helper, connector);
396 DRM_ERROR("adev->mode_info.rfbdev is NULL\n");
398 drm_connector_register(connector);
401 static const struct drm_dp_mst_topology_cbs dm_mst_cbs = {
402 .add_connector = dm_dp_add_mst_connector,
403 .destroy_connector = dm_dp_destroy_mst_connector,
404 .register_connector = dm_dp_mst_register_connector
407 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
408 struct amdgpu_dm_connector *aconnector)
410 aconnector->dm_dp_aux.aux.name = "dmdc";
411 aconnector->dm_dp_aux.aux.dev = aconnector->base.kdev;
412 aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
413 aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
415 drm_dp_aux_register(&aconnector->dm_dp_aux.aux);
416 drm_dp_cec_register_connector(&aconnector->dm_dp_aux.aux,
417 aconnector->base.name, dm->adev->dev);
419 if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
422 aconnector->mst_mgr.cbs = &dm_mst_cbs;
423 drm_dp_mst_topology_mgr_init(
424 &aconnector->mst_mgr,
426 &aconnector->dm_dp_aux.aux,
429 aconnector->connector_id);