2 * Copyright 2014 Advanced Micro Devices, Inc.
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef KFD_PRIV_H_INCLUDED
24 #define KFD_PRIV_H_INCLUDED
26 #include <linux/hashtable.h>
27 #include <linux/mmu_notifier.h>
28 #include <linux/mutex.h>
29 #include <linux/types.h>
30 #include <linux/atomic.h>
31 #include <linux/workqueue.h>
32 #include <linux/spinlock.h>
33 #include <linux/kfd_ioctl.h>
34 #include <linux/idr.h>
35 #include <linux/kfifo.h>
36 #include <linux/seq_file.h>
37 #include <linux/kref.h>
38 #include <linux/sysfs.h>
39 #include <linux/device_cgroup.h>
40 #include <drm/drm_file.h>
41 #include <drm/drm_drv.h>
42 #include <drm/drm_device.h>
43 #include <drm/drm_ioctl.h>
44 #include <kgd_kfd_interface.h>
45 #include <linux/swap.h>
47 #include "amd_shared.h"
50 #define KFD_MAX_RING_ENTRY_SIZE 8
52 #define KFD_SYSFS_FILE_MODE 0444
54 /* GPU ID hash width in bits */
55 #define KFD_GPU_ID_HASH_WIDTH 16
57 /* Use upper bits of mmap offset to store KFD driver specific information.
58 * BITS[63:62] - Encode MMAP type
59 * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to
60 * BITS[45:0] - MMAP offset value
62 * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these
63 * defines are w.r.t to PAGE_SIZE
65 #define KFD_MMAP_TYPE_SHIFT 62
66 #define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT)
67 #define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT)
68 #define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT)
69 #define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT)
70 #define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT)
72 #define KFD_MMAP_GPU_ID_SHIFT 46
73 #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \
74 << KFD_MMAP_GPU_ID_SHIFT)
75 #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\
76 & KFD_MMAP_GPU_ID_MASK)
77 #define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \
78 >> KFD_MMAP_GPU_ID_SHIFT)
81 * When working with cp scheduler we should assign the HIQ manually or via
82 * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot
83 * definitions for Kaveri. In Kaveri only the first ME queues participates
84 * in the cp scheduling taking that in mind we set the HIQ slot in the
87 #define KFD_CIK_HIQ_PIPE 4
88 #define KFD_CIK_HIQ_QUEUE 0
90 /* Macro for allocating structures */
91 #define kfd_alloc_struct(ptr_to_struct) \
92 ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL))
94 #define KFD_MAX_NUM_OF_PROCESSES 512
95 #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024
98 * Size of the per-process TBA+TMA buffer: 2 pages
100 * The first page is the TBA used for the CWSR ISA code. The second
101 * page is used as TMA for user-mode trap handler setup in daisy-chain mode.
103 #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2)
104 #define KFD_CWSR_TMA_OFFSET PAGE_SIZE
106 #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \
107 (KFD_MAX_NUM_OF_PROCESSES * \
108 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS)
110 #define KFD_KERNEL_QUEUE_SIZE 2048
112 #define KFD_UNMAP_LATENCY_MS (4000)
116 * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the
117 * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA.
118 * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC
119 * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in
120 * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE.
122 #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512
125 * enum kfd_ioctl_flags - KFD ioctl flags
126 * Various flags that can be set in &amdkfd_ioctl_desc.flags to control how
127 * userspace can use a given ioctl.
129 enum kfd_ioctl_flags {
131 * @KFD_IOC_FLAG_CHECKPOINT_RESTORE:
132 * Certain KFD ioctls such as AMDKFD_IOC_CRIU_OP can potentially
133 * perform privileged operations and load arbitrary data into MQDs and
134 * eventually HQD registers when the queue is mapped by HWS. In order to
135 * prevent this we should perform additional security checks.
137 * This is equivalent to callers with the CHECKPOINT_RESTORE capability.
139 * Note: Since earlier versions of docker do not support CHECKPOINT_RESTORE,
140 * we also allow ioctls with SYS_ADMIN capability.
142 KFD_IOC_FLAG_CHECKPOINT_RESTORE = BIT(0),
145 * Kernel module parameter to specify maximum number of supported queues per
148 extern int max_num_of_queues_per_device;
151 /* Kernel module parameter to specify the scheduling policy */
152 extern int sched_policy;
155 * Kernel module parameter to specify the maximum process
156 * number per HW scheduler
158 extern int hws_max_conc_proc;
160 extern int cwsr_enable;
163 * Kernel module parameter to specify whether to send sigterm to HSA process on
164 * unhandled exception
166 extern int send_sigterm;
169 * This kernel module is used to simulate large bar machine on non-large bar
172 extern int debug_largebar;
175 * Ignore CRAT table during KFD initialization, can be used to work around
176 * broken CRAT tables on some AMD systems
178 extern int ignore_crat;
180 /* Set sh_mem_config.retry_disable on GFX v9 */
181 extern int amdgpu_noretry;
183 /* Halt if HWS hang is detected */
184 extern int halt_if_hws_hang;
186 /* Whether MEC FW support GWS barriers */
187 extern bool hws_gws_support;
189 /* Queue preemption timeout in ms */
190 extern int queue_preemption_timeout_ms;
193 * Don't evict process queues on vm fault
195 extern int amdgpu_no_queue_eviction_on_vm_fault;
197 /* Enable eviction debug messages */
198 extern bool debug_evictions;
201 cache_policy_coherent,
202 cache_policy_noncoherent
205 #define KFD_GC_VERSION(dev) ((dev)->adev->ip_versions[GC_HWIP][0])
206 #define KFD_IS_SOC15(dev) ((KFD_GC_VERSION(dev)) >= (IP_VERSION(9, 0, 1)))
208 struct kfd_event_interrupt_class {
209 bool (*interrupt_isr)(struct kfd_dev *dev,
210 const uint32_t *ih_ring_entry, uint32_t *patched_ihre,
212 void (*interrupt_wq)(struct kfd_dev *dev,
213 const uint32_t *ih_ring_entry);
216 struct kfd_device_info {
217 uint32_t gfx_target_version;
218 const struct kfd_event_interrupt_class *event_interrupt_class;
219 unsigned int max_pasid_bits;
220 unsigned int max_no_of_hqd;
221 unsigned int doorbell_size;
222 size_t ih_ring_entry_size;
223 uint8_t num_of_watch_points;
224 uint16_t mqd_size_aligned;
226 bool needs_iommu_device;
227 bool needs_pci_atomics;
228 uint32_t no_atomic_fw_version;
229 unsigned int num_sdma_queues_per_engine;
232 unsigned int kfd_get_num_sdma_engines(struct kfd_dev *kdev);
233 unsigned int kfd_get_num_xgmi_sdma_engines(struct kfd_dev *kdev);
236 uint32_t range_start;
243 struct kfd_vmid_info {
244 uint32_t first_vmid_kfd;
245 uint32_t last_vmid_kfd;
246 uint32_t vmid_num_kfd;
250 struct amdgpu_device *adev;
252 struct kfd_device_info device_info;
253 struct pci_dev *pdev;
254 struct drm_device *ddev;
256 unsigned int id; /* topology stub index */
258 phys_addr_t doorbell_base; /* Start of actual doorbells used by
259 * KFD. It is aligned for mapping
262 size_t doorbell_base_dw_offset; /* Offset from the start of the PCI
263 * doorbell BAR to the first KFD
264 * doorbell in dwords. GFX reserves
265 * the segment before this offset.
267 u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells
268 * page used by kernel queue
271 struct kgd2kfd_shared_resources shared_resources;
272 struct kfd_vmid_info vm_info;
274 const struct kfd2kgd_calls *kfd2kgd;
275 struct mutex doorbell_mutex;
276 DECLARE_BITMAP(doorbell_available_index,
277 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS);
280 uint64_t gtt_start_gpu_addr;
281 void *gtt_start_cpu_ptr;
283 struct mutex gtt_sa_lock;
284 unsigned int gtt_sa_chunk_size;
285 unsigned int gtt_sa_num_of_chunks;
288 struct kfifo ih_fifo;
289 struct workqueue_struct *ih_wq;
290 struct work_struct interrupt_work;
291 spinlock_t interrupt_lock;
293 /* QCM Device instance */
294 struct device_queue_manager *dqm;
298 * Interrupts of interest to KFD are copied
299 * from the HW ring into a SW ring.
301 bool interrupts_active;
303 /* Firmware versions */
304 uint16_t mec_fw_version;
305 uint16_t mec2_fw_version;
306 uint16_t sdma_fw_version;
308 /* Maximum process number mapped to HW scheduler */
309 unsigned int max_proc_per_quantum;
313 const void *cwsr_isa;
314 unsigned int cwsr_isa_size;
319 bool pci_atomic_requested;
321 /* Use IOMMU v2 flag */
325 atomic_t sram_ecc_flag;
327 /* Compute Profile ref. count */
328 atomic_t compute_profile;
330 /* Global GWS resource shared between processes */
333 /* Clients watching SMI events */
334 struct list_head smi_clients;
337 uint32_t reset_seq_num;
339 struct ida doorbell_ida;
340 unsigned int max_doorbell_slices;
344 /* HMM page migration MEMORY_DEVICE_PRIVATE mapping */
345 struct dev_pagemap pgmap;
349 KFD_MEMPOOL_SYSTEM_CACHEABLE = 1,
350 KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2,
351 KFD_MEMPOOL_FRAMEBUFFER = 3,
354 /* Character device interface */
355 int kfd_chardev_init(void);
356 void kfd_chardev_exit(void);
357 struct device *kfd_chardev(void);
360 * enum kfd_unmap_queues_filter - Enum for queue filters.
362 * @KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE: Preempts single queue.
364 * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the
365 * running queues list.
367 * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to
371 enum kfd_unmap_queues_filter {
372 KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE,
373 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES,
374 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES,
375 KFD_UNMAP_QUEUES_FILTER_BY_PASID
379 * enum kfd_queue_type - Enum for various queue types.
381 * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type.
383 * @KFD_QUEUE_TYPE_SDMA: SDMA user mode queue type.
385 * @KFD_QUEUE_TYPE_HIQ: HIQ queue type.
387 * @KFD_QUEUE_TYPE_DIQ: DIQ queue type.
389 * @KFD_QUEUE_TYPE_SDMA_XGMI: Special SDMA queue for XGMI interface.
391 enum kfd_queue_type {
392 KFD_QUEUE_TYPE_COMPUTE,
396 KFD_QUEUE_TYPE_SDMA_XGMI
399 enum kfd_queue_format {
400 KFD_QUEUE_FORMAT_PM4,
404 enum KFD_QUEUE_PRIORITY {
405 KFD_QUEUE_PRIORITY_MINIMUM = 0,
406 KFD_QUEUE_PRIORITY_MAXIMUM = 15
410 * struct queue_properties
412 * @type: The queue type.
414 * @queue_id: Queue identifier.
416 * @queue_address: Queue ring buffer address.
418 * @queue_size: Queue ring buffer size.
420 * @priority: Defines the queue priority relative to other queues in the
422 * This is just an indication and HW scheduling may override the priority as
423 * necessary while keeping the relative prioritization.
424 * the priority granularity is from 0 to f which f is the highest priority.
425 * currently all queues are initialized with the highest priority.
427 * @queue_percent: This field is partially implemented and currently a zero in
428 * this field defines that the queue is non active.
430 * @read_ptr: User space address which points to the number of dwords the
431 * cp read from the ring buffer. This field updates automatically by the H/W.
433 * @write_ptr: Defines the number of dwords written to the ring buffer.
435 * @doorbell_ptr: Notifies the H/W of new packet written to the queue ring
436 * buffer. This field should be similar to write_ptr and the user should
437 * update this field after updating the write_ptr.
439 * @doorbell_off: The doorbell offset in the doorbell pci-bar.
441 * @is_interop: Defines if this is a interop queue. Interop queue means that
442 * the queue can access both graphics and compute resources.
444 * @is_evicted: Defines if the queue is evicted. Only active queues
445 * are evicted, rendering them inactive.
447 * @is_active: Defines if the queue is active or not. @is_active and
448 * @is_evicted are protected by the DQM lock.
450 * @is_gws: Defines if the queue has been updated to be GWS-capable or not.
451 * @is_gws should be protected by the DQM lock, since changing it can yield the
452 * possibility of updating DQM state on number of GWS queues.
454 * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid
457 * This structure represents the queue properties for each queue no matter if
458 * it's user mode or kernel mode queue.
462 struct queue_properties {
463 enum kfd_queue_type type;
464 enum kfd_queue_format format;
465 unsigned int queue_id;
466 uint64_t queue_address;
469 uint32_t queue_percent;
472 void __iomem *doorbell_ptr;
473 uint32_t doorbell_off;
478 /* Not relevant for user mode queues in cp scheduling */
480 /* Relevant only for sdma queues*/
481 uint32_t sdma_engine_id;
482 uint32_t sdma_queue_id;
483 uint32_t sdma_vm_addr;
484 /* Relevant only for VI */
485 uint64_t eop_ring_buffer_address;
486 uint32_t eop_ring_buffer_size;
487 uint64_t ctx_save_restore_area_address;
488 uint32_t ctx_save_restore_area_size;
489 uint32_t ctl_stack_size;
494 #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \
495 (q).queue_address != 0 && \
496 (q).queue_percent > 0 && \
499 enum mqd_update_flag {
500 UPDATE_FLAG_CU_MASK = 0,
503 struct mqd_update_info {
506 uint32_t count; /* Must be a multiple of 32 */
510 enum mqd_update_flag update_flag;
516 * @list: Queue linked list.
518 * @mqd: The queue MQD (memory queue descriptor).
520 * @mqd_mem_obj: The MQD local gpu memory object.
522 * @gart_mqd_addr: The MQD gart mc address.
524 * @properties: The queue properties.
526 * @mec: Used only in no cp scheduling mode and identifies to micro engine id
527 * that the queue should be executed on.
529 * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe
532 * @queue: Used only in no cp scheduliong mode and identifies the queue's slot.
534 * @process: The kfd process that created this queue.
536 * @device: The kfd device that created this queue.
538 * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL
541 * This structure represents user mode compute queues.
542 * It contains all the necessary data to handle such queues.
547 struct list_head list;
549 struct kfd_mem_obj *mqd_mem_obj;
550 uint64_t gart_mqd_addr;
551 struct queue_properties properties;
557 unsigned int sdma_id;
558 unsigned int doorbell_id;
560 struct kfd_process *process;
561 struct kfd_dev *device;
569 KFD_MQD_TYPE_HIQ = 0, /* for hiq */
570 KFD_MQD_TYPE_CP, /* for cp queues and diq */
571 KFD_MQD_TYPE_SDMA, /* for sdma queues */
572 KFD_MQD_TYPE_DIQ, /* for diq */
576 enum KFD_PIPE_PRIORITY {
577 KFD_PIPE_PRIORITY_CS_LOW = 0,
578 KFD_PIPE_PRIORITY_CS_MEDIUM,
579 KFD_PIPE_PRIORITY_CS_HIGH
582 struct scheduling_resources {
583 unsigned int vmid_mask;
584 enum kfd_queue_type type;
588 uint32_t gds_heap_base;
589 uint32_t gds_heap_size;
592 struct process_queue_manager {
594 struct kfd_process *process;
595 struct list_head queues;
596 unsigned long *queue_slot_bitmap;
599 struct qcm_process_device {
600 /* The Device Queue Manager that owns this data */
601 struct device_queue_manager *dqm;
602 struct process_queue_manager *pqm;
604 struct list_head queues_list;
605 struct list_head priv_queue_list;
607 unsigned int queue_count;
610 unsigned int evicted; /* eviction counter, 0=active */
612 /* This flag tells if we should reset all wavefronts on
613 * process termination
615 bool reset_wavefronts;
617 /* This flag tells us if this process has a GWS-capable
618 * queue that will be mapped into the runlist. It's
619 * possible to request a GWS BO, but not have the queue
620 * currently mapped, and this changes how the MAP_PROCESS
621 * PM4 packet is configured.
623 bool mapped_gws_queue;
625 /* All the memory management data should be here too */
626 uint64_t gds_context_area;
627 /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */
628 uint64_t page_table_base;
629 uint32_t sh_mem_config;
630 uint32_t sh_mem_bases;
631 uint32_t sh_mem_ape1_base;
632 uint32_t sh_mem_ape1_limit;
636 uint32_t sh_hidden_private_base;
639 struct kgd_mem *cwsr_mem;
646 struct kgd_mem *ib_mem;
650 /* doorbell resources per process per device */
651 unsigned long *doorbell_bitmap;
654 /* KFD Memory Eviction */
656 /* Approx. wait time before attempting to restore evicted BOs */
657 #define PROCESS_RESTORE_TIME_MS 100
658 /* Approx. back off time if restore fails due to lack of memory */
659 #define PROCESS_BACK_OFF_TIME_MS 100
660 /* Approx. time before evicting the process again */
661 #define PROCESS_ACTIVE_TIME_MS 10
663 /* 8 byte handle containing GPU ID in the most significant 4 bytes and
664 * idr_handle in the least significant 4 bytes
666 #define MAKE_HANDLE(gpu_id, idr_handle) \
667 (((uint64_t)(gpu_id) << 32) + idr_handle)
668 #define GET_GPU_ID(handle) (handle >> 32)
669 #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF)
677 #define MAX_SYSFS_FILENAME_LEN 15
680 * SDMA counter runs at 100MHz frequency.
681 * We display SDMA activity in microsecond granularity in sysfs.
682 * As a result, the divisor is 100.
684 #define SDMA_ACTIVITY_DIVISOR 100
686 /* Data that is per-process-per device. */
687 struct kfd_process_device {
688 /* The device that owns this data. */
691 /* The process that owns this kfd_process_device. */
692 struct kfd_process *process;
694 /* per-process-per device QCM data structure */
695 struct qcm_process_device qpd;
701 uint64_t gpuvm_limit;
702 uint64_t scratch_base;
703 uint64_t scratch_limit;
705 /* VM context for GPUVM allocations */
706 struct file *drm_file;
709 /* GPUVM allocations storage */
710 struct idr alloc_idr;
712 /* Flag used to tell the pdd has dequeued from the dqm.
713 * This is used to prevent dev->dqm->ops.process_termination() from
714 * being called twice when it is already called in IOMMU callback
717 bool already_dequeued;
720 /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */
721 enum kfd_pdd_bound bound;
725 struct attribute attr_vram;
726 char vram_filename[MAX_SYSFS_FILENAME_LEN];
728 /* SDMA activity tracking */
729 uint64_t sdma_past_activity_counter;
730 struct attribute attr_sdma;
731 char sdma_filename[MAX_SYSFS_FILENAME_LEN];
733 /* Eviction activity tracking */
734 uint64_t last_evict_timestamp;
735 atomic64_t evict_duration_counter;
736 struct attribute attr_evict;
738 struct kobject *kobj_stats;
739 unsigned int doorbell_index;
742 * @cu_occupancy: Reports occupancy of Compute Units (CU) of a process
743 * that is associated with device encoded by "this" struct instance. The
744 * value reflects CU usage by all of the waves launched by this process
745 * on this device. A very important property of occupancy parameter is
746 * that its value is a snapshot of current use.
748 * Following is to be noted regarding how this parameter is reported:
750 * The number of waves that a CU can launch is limited by couple of
751 * parameters. These are encoded by struct amdgpu_cu_info instance
752 * that is part of every device definition. For GFX9 devices this
753 * translates to 40 waves (simd_per_cu * max_waves_per_simd) when waves
754 * do not use scratch memory and 32 waves (max_scratch_slots_per_cu)
755 * when they do use scratch memory. This could change for future
756 * devices and therefore this example should be considered as a guide.
758 * All CU's of a device are available for the process. This may not be true
759 * under certain conditions - e.g. CU masking.
761 * Finally number of CU's that are occupied by a process is affected by both
762 * number of CU's a device has along with number of other competing processes
764 struct attribute attr_cu_occupancy;
766 /* sysfs counters for GPU retry fault and page migration tracking */
767 struct kobject *kobj_counters;
768 struct attribute attr_faults;
769 struct attribute attr_page_in;
770 struct attribute attr_page_out;
775 * If this process has been checkpointed before, then the user
776 * application will use the original gpu_id on the
777 * checkpointed node to refer to this device.
779 uint32_t user_gpu_id;
782 #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd)
784 struct svm_range_list {
786 struct rb_root_cached objects;
787 struct list_head list;
788 struct work_struct deferred_list_work;
789 struct list_head deferred_range_list;
790 struct list_head criu_svm_metadata_list;
791 spinlock_t deferred_list_lock;
792 atomic_t evicted_ranges;
793 atomic_t drain_pagefaults;
794 struct delayed_work restore_work;
795 DECLARE_BITMAP(bitmap_supported, MAX_GPU_INSTANCE);
796 struct task_struct *faulting_task;
802 * kfd_process are stored in an mm_struct*->kfd_process*
803 * hash table (kfd_processes in kfd_process.c)
805 struct hlist_node kfd_processes;
808 * Opaque pointer to mm_struct. We don't hold a reference to
809 * it so it should never be dereferenced from here. This is
810 * only used for looking up processes by their mm.
815 struct work_struct release_work;
820 * In any process, the thread that started main() is the lead
821 * thread and outlives the rest.
822 * It is here because amd_iommu_bind_pasid wants a task_struct.
823 * It can also be used for safely getting a reference to the
824 * mm_struct of the process.
826 struct task_struct *lead_thread;
828 /* We want to receive a notification when the mm_struct is destroyed */
829 struct mmu_notifier mmu_notifier;
834 * Array of kfd_process_device pointers,
835 * one for each device the process is using.
837 struct kfd_process_device *pdds[MAX_GPU_INSTANCE];
840 struct process_queue_manager pqm;
842 /*Is the user space process 32 bit?*/
843 bool is_32bit_user_mode;
845 /* Event-related data */
846 struct mutex event_mutex;
847 /* Event ID allocator and lookup */
848 struct idr event_idr;
851 struct kfd_signal_page *signal_page;
852 size_t signal_mapped_size;
853 size_t signal_event_count;
854 bool signal_event_limit_reached;
856 /* Information used for memory eviction */
857 void *kgd_process_info;
858 /* Eviction fence that is attached to all the BOs of this process. The
859 * fence will be triggered during eviction and new one will be created
862 struct dma_fence *ef;
864 /* Work items for evicting and restoring BOs */
865 struct delayed_work eviction_work;
866 struct delayed_work restore_work;
867 /* seqno of the last scheduled eviction */
868 unsigned int last_eviction_seqno;
869 /* Approx. the last timestamp (in jiffies) when the process was
870 * restored after an eviction
872 unsigned long last_restore_timestamp;
874 /* Kobj for our procfs */
875 struct kobject *kobj;
876 struct kobject *kobj_queues;
877 struct attribute attr_pasid;
879 /* shared virtual memory registered by this process */
880 struct svm_range_list svms;
885 /* Queues are in paused stated because we are in the process of doing a CRIU checkpoint */
889 #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */
890 extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE);
891 extern struct srcu_struct kfd_processes_srcu;
894 * typedef amdkfd_ioctl_t - typedef for ioctl function pointer.
896 * @filep: pointer to file structure.
897 * @p: amdkfd process pointer.
898 * @data: pointer to arg that was copied from user.
900 * Return: returns ioctl completion code.
902 typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p,
905 struct amdkfd_ioctl_desc {
908 amdkfd_ioctl_t *func;
909 unsigned int cmd_drv;
912 bool kfd_dev_is_large_bar(struct kfd_dev *dev);
914 int kfd_process_create_wq(void);
915 void kfd_process_destroy_wq(void);
916 struct kfd_process *kfd_create_process(struct file *filep);
917 struct kfd_process *kfd_get_process(const struct task_struct *);
918 struct kfd_process *kfd_lookup_process_by_pasid(u32 pasid);
919 struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm);
921 int kfd_process_gpuidx_from_gpuid(struct kfd_process *p, uint32_t gpu_id);
922 int kfd_process_gpuid_from_adev(struct kfd_process *p,
923 struct amdgpu_device *adev, uint32_t *gpuid,
925 static inline int kfd_process_gpuid_from_gpuidx(struct kfd_process *p,
926 uint32_t gpuidx, uint32_t *gpuid) {
927 return gpuidx < p->n_pdds ? p->pdds[gpuidx]->dev->id : -EINVAL;
929 static inline struct kfd_process_device *kfd_process_device_from_gpuidx(
930 struct kfd_process *p, uint32_t gpuidx) {
931 return gpuidx < p->n_pdds ? p->pdds[gpuidx] : NULL;
934 void kfd_unref_process(struct kfd_process *p);
935 int kfd_process_evict_queues(struct kfd_process *p);
936 int kfd_process_restore_queues(struct kfd_process *p);
937 void kfd_suspend_all_processes(void);
938 int kfd_resume_all_processes(void);
940 struct kfd_process_device *kfd_process_device_data_by_id(struct kfd_process *process,
943 int kfd_process_get_user_gpu_id(struct kfd_process *p, uint32_t actual_gpu_id);
945 int kfd_process_device_init_vm(struct kfd_process_device *pdd,
946 struct file *drm_file);
947 struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev,
948 struct kfd_process *p);
949 struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev,
950 struct kfd_process *p);
951 struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev,
952 struct kfd_process *p);
954 bool kfd_process_xnack_mode(struct kfd_process *p, bool supported);
956 int kfd_reserved_mem_mmap(struct kfd_dev *dev, struct kfd_process *process,
957 struct vm_area_struct *vma);
959 /* KFD process API for creating and translating handles */
960 int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd,
962 void *kfd_process_device_translate_handle(struct kfd_process_device *p,
964 void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd,
966 struct kfd_process *kfd_lookup_process_by_pid(struct pid *pid);
969 int kfd_pasid_init(void);
970 void kfd_pasid_exit(void);
971 bool kfd_set_pasid_limit(unsigned int new_limit);
972 unsigned int kfd_get_pasid_limit(void);
973 u32 kfd_pasid_alloc(void);
974 void kfd_pasid_free(u32 pasid);
977 size_t kfd_doorbell_process_slice(struct kfd_dev *kfd);
978 int kfd_doorbell_init(struct kfd_dev *kfd);
979 void kfd_doorbell_fini(struct kfd_dev *kfd);
980 int kfd_doorbell_mmap(struct kfd_dev *dev, struct kfd_process *process,
981 struct vm_area_struct *vma);
982 void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd,
983 unsigned int *doorbell_off);
984 void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr);
985 u32 read_kernel_doorbell(u32 __iomem *db);
986 void write_kernel_doorbell(void __iomem *db, u32 value);
987 void write_kernel_doorbell64(void __iomem *db, u64 value);
988 unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev *kfd,
989 struct kfd_process_device *pdd,
990 unsigned int doorbell_id);
991 phys_addr_t kfd_get_process_doorbells(struct kfd_process_device *pdd);
992 int kfd_alloc_process_doorbells(struct kfd_dev *kfd,
993 unsigned int *doorbell_index);
994 void kfd_free_process_doorbells(struct kfd_dev *kfd,
995 unsigned int doorbell_index);
996 /* GTT Sub-Allocator */
998 int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
999 struct kfd_mem_obj **mem_obj);
1001 int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj);
1003 extern struct device *kfd_device;
1006 void kfd_procfs_init(void);
1007 void kfd_procfs_shutdown(void);
1008 int kfd_procfs_add_queue(struct queue *q);
1009 void kfd_procfs_del_queue(struct queue *q);
1012 int kfd_topology_init(void);
1013 void kfd_topology_shutdown(void);
1014 int kfd_topology_add_device(struct kfd_dev *gpu);
1015 int kfd_topology_remove_device(struct kfd_dev *gpu);
1016 struct kfd_topology_device *kfd_topology_device_by_proximity_domain(
1017 uint32_t proximity_domain);
1018 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id);
1019 struct kfd_dev *kfd_device_by_id(uint32_t gpu_id);
1020 struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev);
1021 struct kfd_dev *kfd_device_by_adev(const struct amdgpu_device *adev);
1022 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev);
1023 int kfd_numa_node_to_apic_id(int numa_node_id);
1024 void kfd_double_confirm_iommu_support(struct kfd_dev *gpu);
1027 int kfd_interrupt_init(struct kfd_dev *dev);
1028 void kfd_interrupt_exit(struct kfd_dev *dev);
1029 bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry);
1030 bool interrupt_is_wanted(struct kfd_dev *dev,
1031 const uint32_t *ih_ring_entry,
1032 uint32_t *patched_ihre, bool *flag);
1034 /* amdkfd Apertures */
1035 int kfd_init_apertures(struct kfd_process *process);
1037 void kfd_process_set_trap_handler(struct qcm_process_device *qpd,
1043 * Need to increment KFD_CRIU_PRIV_VERSION each time a change is made to any of the CRIU private
1045 * kfd_criu_process_priv_data
1046 * kfd_criu_device_priv_data
1047 * kfd_criu_bo_priv_data
1048 * kfd_criu_queue_priv_data
1049 * kfd_criu_event_priv_data
1050 * kfd_criu_svm_range_priv_data
1053 #define KFD_CRIU_PRIV_VERSION 1
1055 struct kfd_criu_process_priv_data {
1057 uint32_t xnack_mode;
1060 struct kfd_criu_device_priv_data {
1061 /* For future use */
1065 struct kfd_criu_bo_priv_data {
1067 uint32_t idr_handle;
1068 uint32_t mapped_gpuids[MAX_GPU_INSTANCE];
1072 * The first 4 bytes of kfd_criu_queue_priv_data, kfd_criu_event_priv_data,
1073 * kfd_criu_svm_range_priv_data is the object type
1075 enum kfd_criu_object_type {
1076 KFD_CRIU_OBJECT_TYPE_QUEUE,
1077 KFD_CRIU_OBJECT_TYPE_EVENT,
1078 KFD_CRIU_OBJECT_TYPE_SVM_RANGE,
1081 struct kfd_criu_svm_range_priv_data {
1082 uint32_t object_type;
1083 uint64_t start_addr;
1085 /* Variable length array of attributes */
1086 struct kfd_ioctl_svm_attribute attrs[0];
1089 struct kfd_criu_queue_priv_data {
1090 uint32_t object_type;
1093 uint64_t read_ptr_addr;
1094 uint64_t write_ptr_addr;
1095 uint64_t doorbell_off;
1096 uint64_t eop_ring_buffer_address;
1097 uint64_t ctx_save_restore_area_address;
1104 uint32_t doorbell_id;
1107 uint32_t eop_ring_buffer_size;
1108 uint32_t ctx_save_restore_area_size;
1109 uint32_t ctl_stack_size;
1113 struct kfd_criu_event_priv_data {
1114 uint32_t object_type;
1115 uint64_t user_handle;
1117 uint32_t auto_reset;
1122 struct kfd_hsa_memory_exception_data memory_exception_data;
1123 struct kfd_hsa_hw_exception_data hw_exception_data;
1127 int kfd_process_get_queue_info(struct kfd_process *p,
1128 uint32_t *num_queues,
1129 uint64_t *priv_data_sizes);
1131 int kfd_criu_checkpoint_queues(struct kfd_process *p,
1132 uint8_t __user *user_priv_data,
1133 uint64_t *priv_data_offset);
1135 int kfd_criu_restore_queue(struct kfd_process *p,
1136 uint8_t __user *user_priv_data,
1137 uint64_t *priv_data_offset,
1138 uint64_t max_priv_data_size);
1140 int kfd_criu_checkpoint_events(struct kfd_process *p,
1141 uint8_t __user *user_priv_data,
1142 uint64_t *priv_data_offset);
1144 int kfd_criu_restore_event(struct file *devkfd,
1145 struct kfd_process *p,
1146 uint8_t __user *user_priv_data,
1147 uint64_t *priv_data_offset,
1148 uint64_t max_priv_data_size);
1151 /* Queue Context Management */
1152 int init_queue(struct queue **q, const struct queue_properties *properties);
1153 void uninit_queue(struct queue *q);
1154 void print_queue_properties(struct queue_properties *q);
1155 void print_queue(struct queue *q);
1157 struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type,
1158 struct kfd_dev *dev);
1159 struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type,
1160 struct kfd_dev *dev);
1161 struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type,
1162 struct kfd_dev *dev);
1163 struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type,
1164 struct kfd_dev *dev);
1165 struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type,
1166 struct kfd_dev *dev);
1167 struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type,
1168 struct kfd_dev *dev);
1169 struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev);
1170 void device_queue_manager_uninit(struct device_queue_manager *dqm);
1171 struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
1172 enum kfd_queue_type type);
1173 void kernel_queue_uninit(struct kernel_queue *kq, bool hanging);
1174 int kfd_dqm_evict_pasid(struct device_queue_manager *dqm, u32 pasid);
1176 /* Process Queue Manager */
1177 struct process_queue_node {
1179 struct kernel_queue *kq;
1180 struct list_head process_queue_list;
1183 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd);
1184 void kfd_process_dequeue_from_all_devices(struct kfd_process *p);
1185 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p);
1186 void pqm_uninit(struct process_queue_manager *pqm);
1187 int pqm_create_queue(struct process_queue_manager *pqm,
1188 struct kfd_dev *dev,
1190 struct queue_properties *properties,
1192 const struct kfd_criu_queue_priv_data *q_data,
1193 const void *restore_mqd,
1194 const void *restore_ctl_stack,
1195 uint32_t *p_doorbell_offset_in_process);
1196 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid);
1197 int pqm_update_queue_properties(struct process_queue_manager *pqm, unsigned int qid,
1198 struct queue_properties *p);
1199 int pqm_update_mqd(struct process_queue_manager *pqm, unsigned int qid,
1200 struct mqd_update_info *minfo);
1201 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid,
1203 struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm,
1205 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm,
1207 int pqm_get_wave_state(struct process_queue_manager *pqm,
1209 void __user *ctl_stack,
1210 u32 *ctl_stack_used_size,
1211 u32 *save_area_used_size);
1213 int amdkfd_fence_wait_timeout(uint64_t *fence_addr,
1214 uint64_t fence_value,
1215 unsigned int timeout_ms);
1217 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm,
1220 u32 *ctl_stack_size);
1221 /* Packet Manager */
1223 #define KFD_FENCE_COMPLETED (100)
1224 #define KFD_FENCE_INIT (10)
1226 struct packet_manager {
1227 struct device_queue_manager *dqm;
1228 struct kernel_queue *priv_queue;
1231 struct kfd_mem_obj *ib_buffer_obj;
1232 unsigned int ib_size_bytes;
1233 bool is_over_subscription;
1235 const struct packet_manager_funcs *pmf;
1238 struct packet_manager_funcs {
1239 /* Support ASIC-specific packet formats for PM4 packets */
1240 int (*map_process)(struct packet_manager *pm, uint32_t *buffer,
1241 struct qcm_process_device *qpd);
1242 int (*runlist)(struct packet_manager *pm, uint32_t *buffer,
1243 uint64_t ib, size_t ib_size_in_dwords, bool chain);
1244 int (*set_resources)(struct packet_manager *pm, uint32_t *buffer,
1245 struct scheduling_resources *res);
1246 int (*map_queues)(struct packet_manager *pm, uint32_t *buffer,
1247 struct queue *q, bool is_static);
1248 int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer,
1249 enum kfd_queue_type type,
1250 enum kfd_unmap_queues_filter mode,
1251 uint32_t filter_param, bool reset,
1252 unsigned int sdma_engine);
1253 int (*query_status)(struct packet_manager *pm, uint32_t *buffer,
1254 uint64_t fence_address, uint64_t fence_value);
1255 int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer);
1258 int map_process_size;
1260 int set_resources_size;
1261 int map_queues_size;
1262 int unmap_queues_size;
1263 int query_status_size;
1264 int release_mem_size;
1267 extern const struct packet_manager_funcs kfd_vi_pm_funcs;
1268 extern const struct packet_manager_funcs kfd_v9_pm_funcs;
1269 extern const struct packet_manager_funcs kfd_aldebaran_pm_funcs;
1271 int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm);
1272 void pm_uninit(struct packet_manager *pm, bool hanging);
1273 int pm_send_set_resources(struct packet_manager *pm,
1274 struct scheduling_resources *res);
1275 int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues);
1276 int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address,
1277 uint64_t fence_value);
1279 int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type,
1280 enum kfd_unmap_queues_filter mode,
1281 uint32_t filter_param, bool reset,
1282 unsigned int sdma_engine);
1284 void pm_release_ib(struct packet_manager *pm);
1286 /* Following PM funcs can be shared among VI and AI */
1287 unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size);
1289 uint64_t kfd_get_number_elems(struct kfd_dev *kfd);
1292 extern const struct kfd_event_interrupt_class event_interrupt_class_cik;
1293 extern const struct kfd_event_interrupt_class event_interrupt_class_v9;
1295 extern const struct kfd_device_global_init_class device_global_init_class_cik;
1297 void kfd_event_init_process(struct kfd_process *p);
1298 void kfd_event_free_process(struct kfd_process *p);
1299 int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma);
1300 int kfd_wait_on_events(struct kfd_process *p,
1301 uint32_t num_events, void __user *data,
1302 bool all, uint32_t user_timeout_ms,
1303 uint32_t *wait_result);
1304 void kfd_signal_event_interrupt(u32 pasid, uint32_t partial_id,
1305 uint32_t valid_id_bits);
1306 void kfd_signal_iommu_event(struct kfd_dev *dev,
1307 u32 pasid, unsigned long address,
1308 bool is_write_requested, bool is_execute_requested);
1309 void kfd_signal_hw_exception_event(u32 pasid);
1310 int kfd_set_event(struct kfd_process *p, uint32_t event_id);
1311 int kfd_reset_event(struct kfd_process *p, uint32_t event_id);
1312 int kfd_kmap_event_page(struct kfd_process *p, uint64_t event_page_offset);
1314 int kfd_event_create(struct file *devkfd, struct kfd_process *p,
1315 uint32_t event_type, bool auto_reset, uint32_t node_id,
1316 uint32_t *event_id, uint32_t *event_trigger_data,
1317 uint64_t *event_page_offset, uint32_t *event_slot_index);
1319 int kfd_get_num_events(struct kfd_process *p);
1320 int kfd_event_destroy(struct kfd_process *p, uint32_t event_id);
1322 void kfd_signal_vm_fault_event(struct kfd_dev *dev, u32 pasid,
1323 struct kfd_vm_fault_info *info);
1325 void kfd_signal_reset_event(struct kfd_dev *dev);
1327 void kfd_signal_poison_consumed_event(struct kfd_dev *dev, u32 pasid);
1329 void kfd_flush_tlb(struct kfd_process_device *pdd, enum TLB_FLUSH_TYPE type);
1331 bool kfd_is_locked(void);
1333 /* Compute profile */
1334 void kfd_inc_compute_active(struct kfd_dev *dev);
1335 void kfd_dec_compute_active(struct kfd_dev *dev);
1337 /* Cgroup Support */
1338 /* Check with device cgroup if @kfd device is accessible */
1339 static inline int kfd_devcgroup_check_permission(struct kfd_dev *kfd)
1341 #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF)
1342 struct drm_device *ddev = kfd->ddev;
1344 return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR,
1345 ddev->render->index,
1346 DEVCG_ACC_WRITE | DEVCG_ACC_READ);
1353 #if defined(CONFIG_DEBUG_FS)
1355 void kfd_debugfs_init(void);
1356 void kfd_debugfs_fini(void);
1357 int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data);
1358 int pqm_debugfs_mqds(struct seq_file *m, void *data);
1359 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data);
1360 int dqm_debugfs_hqds(struct seq_file *m, void *data);
1361 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data);
1362 int pm_debugfs_runlist(struct seq_file *m, void *data);
1364 int kfd_debugfs_hang_hws(struct kfd_dev *dev);
1365 int pm_debugfs_hang_hws(struct packet_manager *pm);
1366 int dqm_debugfs_hang_hws(struct device_queue_manager *dqm);
1370 static inline void kfd_debugfs_init(void) {}
1371 static inline void kfd_debugfs_fini(void) {}