2 * Copyright 2015-2017 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include <linux/pci.h>
24 #include <linux/acpi.h>
27 #include "kfd_topology.h"
28 #include "kfd_iommu.h"
30 /* GPU Processor ID base for dGPUs for which VCRAT needs to be created.
31 * GPU processor ID are expressed with Bit[31]=1.
32 * The base is set to 0x8000_0000 + 0x1000 to avoid collision with GPU IDs
35 static uint32_t gpu_processor_id_low = 0x80001000;
37 /* Return the next available gpu_processor_id and increment it for next GPU
38 * @total_cu_count - Total CUs present in the GPU including ones
41 static inline unsigned int get_and_inc_gpu_processor_id(
42 unsigned int total_cu_count)
44 int current_id = gpu_processor_id_low;
46 gpu_processor_id_low += total_cu_count;
50 /* Static table to describe GPU Cache information */
51 struct kfd_gpu_cache_info {
55 /* Indicates how many Compute Units share this cache
56 * Value = 1 indicates the cache is not shared
58 uint32_t num_cu_shared;
61 static struct kfd_gpu_cache_info kaveri_cache_info[] = {
63 /* TCP L1 Cache per CU */
66 .flags = (CRAT_CACHE_FLAGS_ENABLED |
67 CRAT_CACHE_FLAGS_DATA_CACHE |
68 CRAT_CACHE_FLAGS_SIMD_CACHE),
73 /* Scalar L1 Instruction Cache (in SQC module) per bank */
76 .flags = (CRAT_CACHE_FLAGS_ENABLED |
77 CRAT_CACHE_FLAGS_INST_CACHE |
78 CRAT_CACHE_FLAGS_SIMD_CACHE),
82 /* Scalar L1 Data Cache (in SQC module) per bank */
85 .flags = (CRAT_CACHE_FLAGS_ENABLED |
86 CRAT_CACHE_FLAGS_DATA_CACHE |
87 CRAT_CACHE_FLAGS_SIMD_CACHE),
91 /* TODO: Add L2 Cache information */
95 static struct kfd_gpu_cache_info carrizo_cache_info[] = {
97 /* TCP L1 Cache per CU */
100 .flags = (CRAT_CACHE_FLAGS_ENABLED |
101 CRAT_CACHE_FLAGS_DATA_CACHE |
102 CRAT_CACHE_FLAGS_SIMD_CACHE),
106 /* Scalar L1 Instruction Cache (in SQC module) per bank */
109 .flags = (CRAT_CACHE_FLAGS_ENABLED |
110 CRAT_CACHE_FLAGS_INST_CACHE |
111 CRAT_CACHE_FLAGS_SIMD_CACHE),
115 /* Scalar L1 Data Cache (in SQC module) per bank. */
118 .flags = (CRAT_CACHE_FLAGS_ENABLED |
119 CRAT_CACHE_FLAGS_DATA_CACHE |
120 CRAT_CACHE_FLAGS_SIMD_CACHE),
124 /* TODO: Add L2 Cache information */
127 /* NOTE: In future if more information is added to struct kfd_gpu_cache_info
128 * the following ASICs may need a separate table.
130 #define hawaii_cache_info kaveri_cache_info
131 #define tonga_cache_info carrizo_cache_info
132 #define fiji_cache_info carrizo_cache_info
133 #define polaris10_cache_info carrizo_cache_info
134 #define polaris11_cache_info carrizo_cache_info
135 /* TODO - check & update Vega10 cache details */
136 #define vega10_cache_info carrizo_cache_info
137 #define raven_cache_info carrizo_cache_info
139 static void kfd_populated_cu_info_cpu(struct kfd_topology_device *dev,
140 struct crat_subtype_computeunit *cu)
142 dev->node_props.cpu_cores_count = cu->num_cpu_cores;
143 dev->node_props.cpu_core_id_base = cu->processor_id_low;
144 if (cu->hsa_capability & CRAT_CU_FLAGS_IOMMU_PRESENT)
145 dev->node_props.capability |= HSA_CAP_ATS_PRESENT;
147 pr_debug("CU CPU: cores=%d id_base=%d\n", cu->num_cpu_cores,
148 cu->processor_id_low);
151 static void kfd_populated_cu_info_gpu(struct kfd_topology_device *dev,
152 struct crat_subtype_computeunit *cu)
154 dev->node_props.simd_id_base = cu->processor_id_low;
155 dev->node_props.simd_count = cu->num_simd_cores;
156 dev->node_props.lds_size_in_kb = cu->lds_size_in_kb;
157 dev->node_props.max_waves_per_simd = cu->max_waves_simd;
158 dev->node_props.wave_front_size = cu->wave_front_size;
159 dev->node_props.array_count = cu->array_count;
160 dev->node_props.cu_per_simd_array = cu->num_cu_per_array;
161 dev->node_props.simd_per_cu = cu->num_simd_per_cu;
162 dev->node_props.max_slots_scratch_cu = cu->max_slots_scatch_cu;
163 if (cu->hsa_capability & CRAT_CU_FLAGS_HOT_PLUGGABLE)
164 dev->node_props.capability |= HSA_CAP_HOT_PLUGGABLE;
165 pr_debug("CU GPU: id_base=%d\n", cu->processor_id_low);
168 /* kfd_parse_subtype_cu - parse compute unit subtypes and attach it to correct
169 * topology device present in the device_list
171 static int kfd_parse_subtype_cu(struct crat_subtype_computeunit *cu,
172 struct list_head *device_list)
174 struct kfd_topology_device *dev;
176 pr_debug("Found CU entry in CRAT table with proximity_domain=%d caps=%x\n",
177 cu->proximity_domain, cu->hsa_capability);
178 list_for_each_entry(dev, device_list, list) {
179 if (cu->proximity_domain == dev->proximity_domain) {
180 if (cu->flags & CRAT_CU_FLAGS_CPU_PRESENT)
181 kfd_populated_cu_info_cpu(dev, cu);
183 if (cu->flags & CRAT_CU_FLAGS_GPU_PRESENT)
184 kfd_populated_cu_info_gpu(dev, cu);
192 /* kfd_parse_subtype_mem - parse memory subtypes and attach it to correct
193 * topology device present in the device_list
195 static int kfd_parse_subtype_mem(struct crat_subtype_memory *mem,
196 struct list_head *device_list)
198 struct kfd_mem_properties *props;
199 struct kfd_topology_device *dev;
201 pr_debug("Found memory entry in CRAT table with proximity_domain=%d\n",
202 mem->proximity_domain);
203 list_for_each_entry(dev, device_list, list) {
204 if (mem->proximity_domain == dev->proximity_domain) {
205 props = kfd_alloc_struct(props);
209 /* We're on GPU node */
210 if (dev->node_props.cpu_cores_count == 0) {
212 if (mem->visibility_type == 0)
214 HSA_MEM_HEAP_TYPE_FB_PRIVATE;
217 props->heap_type = mem->visibility_type;
219 props->heap_type = HSA_MEM_HEAP_TYPE_SYSTEM;
221 if (mem->flags & CRAT_MEM_FLAGS_HOT_PLUGGABLE)
222 props->flags |= HSA_MEM_FLAGS_HOT_PLUGGABLE;
223 if (mem->flags & CRAT_MEM_FLAGS_NON_VOLATILE)
224 props->flags |= HSA_MEM_FLAGS_NON_VOLATILE;
226 props->size_in_bytes =
227 ((uint64_t)mem->length_high << 32) +
229 props->width = mem->width;
231 dev->node_props.mem_banks_count++;
232 list_add_tail(&props->list, &dev->mem_props);
241 /* kfd_parse_subtype_cache - parse cache subtypes and attach it to correct
242 * topology device present in the device_list
244 static int kfd_parse_subtype_cache(struct crat_subtype_cache *cache,
245 struct list_head *device_list)
247 struct kfd_cache_properties *props;
248 struct kfd_topology_device *dev;
250 uint32_t total_num_of_cu;
252 id = cache->processor_id_low;
254 pr_debug("Found cache entry in CRAT table with processor_id=%d\n", id);
255 list_for_each_entry(dev, device_list, list) {
256 total_num_of_cu = (dev->node_props.array_count *
257 dev->node_props.cu_per_simd_array);
259 /* Cache infomration in CRAT doesn't have proximity_domain
260 * information as it is associated with a CPU core or GPU
261 * Compute Unit. So map the cache using CPU core Id or SIMD
263 * TODO: This works because currently we can safely assume that
264 * Compute Units are parsed before caches are parsed. In
265 * future, remove this dependency
267 if ((id >= dev->node_props.cpu_core_id_base &&
268 id <= dev->node_props.cpu_core_id_base +
269 dev->node_props.cpu_cores_count) ||
270 (id >= dev->node_props.simd_id_base &&
271 id < dev->node_props.simd_id_base +
273 props = kfd_alloc_struct(props);
277 props->processor_id_low = id;
278 props->cache_level = cache->cache_level;
279 props->cache_size = cache->cache_size;
280 props->cacheline_size = cache->cache_line_size;
281 props->cachelines_per_tag = cache->lines_per_tag;
282 props->cache_assoc = cache->associativity;
283 props->cache_latency = cache->cache_latency;
284 memcpy(props->sibling_map, cache->sibling_map,
285 sizeof(props->sibling_map));
287 if (cache->flags & CRAT_CACHE_FLAGS_DATA_CACHE)
288 props->cache_type |= HSA_CACHE_TYPE_DATA;
289 if (cache->flags & CRAT_CACHE_FLAGS_INST_CACHE)
290 props->cache_type |= HSA_CACHE_TYPE_INSTRUCTION;
291 if (cache->flags & CRAT_CACHE_FLAGS_CPU_CACHE)
292 props->cache_type |= HSA_CACHE_TYPE_CPU;
293 if (cache->flags & CRAT_CACHE_FLAGS_SIMD_CACHE)
294 props->cache_type |= HSA_CACHE_TYPE_HSACU;
297 dev->node_props.caches_count++;
298 list_add_tail(&props->list, &dev->cache_props);
307 /* kfd_parse_subtype_iolink - parse iolink subtypes and attach it to correct
308 * topology device present in the device_list
310 static int kfd_parse_subtype_iolink(struct crat_subtype_iolink *iolink,
311 struct list_head *device_list)
313 struct kfd_iolink_properties *props = NULL, *props2;
314 struct kfd_topology_device *dev, *cpu_dev;
318 id_from = iolink->proximity_domain_from;
319 id_to = iolink->proximity_domain_to;
321 pr_debug("Found IO link entry in CRAT table with id_from=%d\n",
323 list_for_each_entry(dev, device_list, list) {
324 if (id_from == dev->proximity_domain) {
325 props = kfd_alloc_struct(props);
329 props->node_from = id_from;
330 props->node_to = id_to;
331 props->ver_maj = iolink->version_major;
332 props->ver_min = iolink->version_minor;
333 props->iolink_type = iolink->io_interface_type;
335 if (props->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS)
338 props->weight = node_distance(id_from, id_to);
340 props->min_latency = iolink->minimum_latency;
341 props->max_latency = iolink->maximum_latency;
342 props->min_bandwidth = iolink->minimum_bandwidth_mbs;
343 props->max_bandwidth = iolink->maximum_bandwidth_mbs;
344 props->rec_transfer_size =
345 iolink->recommended_transfer_size;
347 dev->io_link_count++;
348 dev->node_props.io_links_count++;
349 list_add_tail(&props->list, &dev->io_link_props);
354 /* CPU topology is created before GPUs are detected, so CPU->GPU
355 * links are not built at that time. If a PCIe type is discovered, it
356 * means a GPU is detected and we are adding GPU->CPU to the topology.
357 * At this time, also add the corresponded CPU->GPU link.
359 if (props && props->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS) {
360 cpu_dev = kfd_topology_device_by_proximity_domain(id_to);
363 /* same everything but the other direction */
364 props2 = kmemdup(props, sizeof(*props2), GFP_KERNEL);
365 props2->node_from = id_to;
366 props2->node_to = id_from;
368 cpu_dev->io_link_count++;
369 cpu_dev->node_props.io_links_count++;
370 list_add_tail(&props2->list, &cpu_dev->io_link_props);
376 /* kfd_parse_subtype - parse subtypes and attach it to correct topology device
377 * present in the device_list
378 * @sub_type_hdr - subtype section of crat_image
379 * @device_list - list of topology devices present in this crat_image
381 static int kfd_parse_subtype(struct crat_subtype_generic *sub_type_hdr,
382 struct list_head *device_list)
384 struct crat_subtype_computeunit *cu;
385 struct crat_subtype_memory *mem;
386 struct crat_subtype_cache *cache;
387 struct crat_subtype_iolink *iolink;
390 switch (sub_type_hdr->type) {
391 case CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY:
392 cu = (struct crat_subtype_computeunit *)sub_type_hdr;
393 ret = kfd_parse_subtype_cu(cu, device_list);
395 case CRAT_SUBTYPE_MEMORY_AFFINITY:
396 mem = (struct crat_subtype_memory *)sub_type_hdr;
397 ret = kfd_parse_subtype_mem(mem, device_list);
399 case CRAT_SUBTYPE_CACHE_AFFINITY:
400 cache = (struct crat_subtype_cache *)sub_type_hdr;
401 ret = kfd_parse_subtype_cache(cache, device_list);
403 case CRAT_SUBTYPE_TLB_AFFINITY:
405 * For now, nothing to do here
407 pr_debug("Found TLB entry in CRAT table (not processing)\n");
409 case CRAT_SUBTYPE_CCOMPUTE_AFFINITY:
411 * For now, nothing to do here
413 pr_debug("Found CCOMPUTE entry in CRAT table (not processing)\n");
415 case CRAT_SUBTYPE_IOLINK_AFFINITY:
416 iolink = (struct crat_subtype_iolink *)sub_type_hdr;
417 ret = kfd_parse_subtype_iolink(iolink, device_list);
420 pr_warn("Unknown subtype %d in CRAT\n",
427 /* kfd_parse_crat_table - parse CRAT table. For each node present in CRAT
428 * create a kfd_topology_device and add in to device_list. Also parse
429 * CRAT subtypes and attach it to appropriate kfd_topology_device
430 * @crat_image - input image containing CRAT
431 * @device_list - [OUT] list of kfd_topology_device generated after
433 * @proximity_domain - Proximity domain of the first device in the table
435 * Return - 0 if successful else -ve value
437 int kfd_parse_crat_table(void *crat_image, struct list_head *device_list,
438 uint32_t proximity_domain)
440 struct kfd_topology_device *top_dev = NULL;
441 struct crat_subtype_generic *sub_type_hdr;
444 struct crat_header *crat_table = (struct crat_header *)crat_image;
451 if (!list_empty(device_list)) {
452 pr_warn("Error device list should be empty\n");
456 num_nodes = crat_table->num_domains;
457 image_len = crat_table->length;
459 pr_info("Parsing CRAT table with %d nodes\n", num_nodes);
461 for (node_id = 0; node_id < num_nodes; node_id++) {
462 top_dev = kfd_create_topology_device(device_list);
465 top_dev->proximity_domain = proximity_domain++;
473 memcpy(top_dev->oem_id, crat_table->oem_id, CRAT_OEMID_LENGTH);
474 memcpy(top_dev->oem_table_id, crat_table->oem_table_id,
475 CRAT_OEMTABLEID_LENGTH);
476 top_dev->oem_revision = crat_table->oem_revision;
478 sub_type_hdr = (struct crat_subtype_generic *)(crat_table+1);
479 while ((char *)sub_type_hdr + sizeof(struct crat_subtype_generic) <
480 ((char *)crat_image) + image_len) {
481 if (sub_type_hdr->flags & CRAT_SUBTYPE_FLAGS_ENABLED) {
482 ret = kfd_parse_subtype(sub_type_hdr, device_list);
487 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
488 sub_type_hdr->length);
493 kfd_release_topology_device_list(device_list);
498 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */
499 static int fill_in_pcache(struct crat_subtype_cache *pcache,
500 struct kfd_gpu_cache_info *pcache_info,
501 struct kfd_cu_info *cu_info,
504 int cache_type, unsigned int cu_processor_id,
507 unsigned int cu_sibling_map_mask;
510 /* First check if enough memory is available */
511 if (sizeof(struct crat_subtype_cache) > mem_available)
514 cu_sibling_map_mask = cu_bitmask;
515 cu_sibling_map_mask >>= cu_block;
516 cu_sibling_map_mask &=
517 ((1 << pcache_info[cache_type].num_cu_shared) - 1);
518 first_active_cu = ffs(cu_sibling_map_mask);
520 /* CU could be inactive. In case of shared cache find the first active
521 * CU. and incase of non-shared cache check if the CU is inactive. If
522 * inactive active skip it
524 if (first_active_cu) {
525 memset(pcache, 0, sizeof(struct crat_subtype_cache));
526 pcache->type = CRAT_SUBTYPE_CACHE_AFFINITY;
527 pcache->length = sizeof(struct crat_subtype_cache);
528 pcache->flags = pcache_info[cache_type].flags;
529 pcache->processor_id_low = cu_processor_id
530 + (first_active_cu - 1);
531 pcache->cache_level = pcache_info[cache_type].cache_level;
532 pcache->cache_size = pcache_info[cache_type].cache_size;
534 /* Sibling map is w.r.t processor_id_low, so shift out
537 cu_sibling_map_mask =
538 cu_sibling_map_mask >> (first_active_cu - 1);
540 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF);
541 pcache->sibling_map[1] =
542 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF);
543 pcache->sibling_map[2] =
544 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF);
545 pcache->sibling_map[3] =
546 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF);
552 /* kfd_fill_gpu_cache_info - Fill GPU cache info using kfd_gpu_cache_info
555 * @kdev - [IN] GPU device
556 * @gpu_processor_id - [IN] GPU processor ID to which these caches
558 * @available_size - [IN] Amount of memory available in pcache
559 * @cu_info - [IN] Compute Unit info obtained from KGD
560 * @pcache - [OUT] memory into which cache data is to be filled in.
561 * @size_filled - [OUT] amount of data used up in pcache.
562 * @num_of_entries - [OUT] number of caches added
564 static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
565 int gpu_processor_id,
567 struct kfd_cu_info *cu_info,
568 struct crat_subtype_cache *pcache,
572 struct kfd_gpu_cache_info *pcache_info;
573 int num_of_cache_types = 0;
576 int mem_available = available_size;
577 unsigned int cu_processor_id;
580 switch (kdev->device_info->asic_family) {
582 pcache_info = kaveri_cache_info;
583 num_of_cache_types = ARRAY_SIZE(kaveri_cache_info);
586 pcache_info = hawaii_cache_info;
587 num_of_cache_types = ARRAY_SIZE(hawaii_cache_info);
590 pcache_info = carrizo_cache_info;
591 num_of_cache_types = ARRAY_SIZE(carrizo_cache_info);
594 pcache_info = tonga_cache_info;
595 num_of_cache_types = ARRAY_SIZE(tonga_cache_info);
598 pcache_info = fiji_cache_info;
599 num_of_cache_types = ARRAY_SIZE(fiji_cache_info);
602 pcache_info = polaris10_cache_info;
603 num_of_cache_types = ARRAY_SIZE(polaris10_cache_info);
606 pcache_info = polaris11_cache_info;
607 num_of_cache_types = ARRAY_SIZE(polaris11_cache_info);
610 pcache_info = vega10_cache_info;
611 num_of_cache_types = ARRAY_SIZE(vega10_cache_info);
614 pcache_info = raven_cache_info;
615 num_of_cache_types = ARRAY_SIZE(raven_cache_info);
624 /* For each type of cache listed in the kfd_gpu_cache_info table,
625 * go through all available Compute Units.
626 * The [i,j,k] loop will
627 * if kfd_gpu_cache_info.num_cu_shared = 1
628 * will parse through all available CU
629 * If (kfd_gpu_cache_info.num_cu_shared != 1)
630 * then it will consider only one CU from
634 for (ct = 0; ct < num_of_cache_types; ct++) {
635 cu_processor_id = gpu_processor_id;
636 for (i = 0; i < cu_info->num_shader_engines; i++) {
637 for (j = 0; j < cu_info->num_shader_arrays_per_engine;
639 for (k = 0; k < cu_info->num_cu_per_sh;
640 k += pcache_info[ct].num_cu_shared) {
642 ret = fill_in_pcache(pcache,
646 cu_info->cu_bitmap[i][j],
663 /* Move to next CU block */
665 pcache_info[ct].num_cu_shared;
671 pr_debug("Added [%d] GPU cache entries\n", *num_of_entries);
677 * kfd_create_crat_image_acpi - Allocates memory for CRAT image and
678 * copies CRAT from ACPI (if available).
679 * NOTE: Call kfd_destroy_crat_image to free CRAT image memory
681 * @crat_image: CRAT read from ACPI. If no CRAT in ACPI then
682 * crat_image will be NULL
683 * @size: [OUT] size of crat_image
685 * Return 0 if successful else return error code
687 int kfd_create_crat_image_acpi(void **crat_image, size_t *size)
689 struct acpi_table_header *crat_table;
698 /* Fetch the CRAT table from ACPI */
699 status = acpi_get_table(CRAT_SIGNATURE, 0, &crat_table);
700 if (status == AE_NOT_FOUND) {
701 pr_warn("CRAT table not found\n");
703 } else if (ACPI_FAILURE(status)) {
704 const char *err = acpi_format_exception(status);
706 pr_err("CRAT table error: %s\n", err);
711 pr_info("CRAT table disabled by module option\n");
715 pcrat_image = kmalloc(crat_table->length, GFP_KERNEL);
719 memcpy(pcrat_image, crat_table, crat_table->length);
721 *crat_image = pcrat_image;
722 *size = crat_table->length;
727 /* Memory required to create Virtual CRAT.
728 * Since there is no easy way to predict the amount of memory required, the
729 * following amount are allocated for CPU and GPU Virtual CRAT. This is
730 * expected to cover all known conditions. But to be safe additional check
731 * is put in the code to ensure we don't overwrite.
733 #define VCRAT_SIZE_FOR_CPU (2 * PAGE_SIZE)
734 #define VCRAT_SIZE_FOR_GPU (3 * PAGE_SIZE)
736 /* kfd_fill_cu_for_cpu - Fill in Compute info for the given CPU NUMA node
738 * @numa_node_id: CPU NUMA node id
739 * @avail_size: Available size in the memory
740 * @sub_type_hdr: Memory into which compute info will be filled in
742 * Return 0 if successful else return -ve value
744 static int kfd_fill_cu_for_cpu(int numa_node_id, int *avail_size,
745 int proximity_domain,
746 struct crat_subtype_computeunit *sub_type_hdr)
748 const struct cpumask *cpumask;
750 *avail_size -= sizeof(struct crat_subtype_computeunit);
754 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_computeunit));
756 /* Fill in subtype header data */
757 sub_type_hdr->type = CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY;
758 sub_type_hdr->length = sizeof(struct crat_subtype_computeunit);
759 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED;
761 cpumask = cpumask_of_node(numa_node_id);
763 /* Fill in CU data */
764 sub_type_hdr->flags |= CRAT_CU_FLAGS_CPU_PRESENT;
765 sub_type_hdr->proximity_domain = proximity_domain;
766 sub_type_hdr->processor_id_low = kfd_numa_node_to_apic_id(numa_node_id);
767 if (sub_type_hdr->processor_id_low == -1)
770 sub_type_hdr->num_cpu_cores = cpumask_weight(cpumask);
775 /* kfd_fill_mem_info_for_cpu - Fill in Memory info for the given CPU NUMA node
777 * @numa_node_id: CPU NUMA node id
778 * @avail_size: Available size in the memory
779 * @sub_type_hdr: Memory into which compute info will be filled in
781 * Return 0 if successful else return -ve value
783 static int kfd_fill_mem_info_for_cpu(int numa_node_id, int *avail_size,
784 int proximity_domain,
785 struct crat_subtype_memory *sub_type_hdr)
787 uint64_t mem_in_bytes = 0;
791 *avail_size -= sizeof(struct crat_subtype_memory);
795 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_memory));
797 /* Fill in subtype header data */
798 sub_type_hdr->type = CRAT_SUBTYPE_MEMORY_AFFINITY;
799 sub_type_hdr->length = sizeof(struct crat_subtype_memory);
800 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED;
802 /* Fill in Memory Subunit data */
804 /* Unlike si_meminfo, si_meminfo_node is not exported. So
805 * the following lines are duplicated from si_meminfo_node
808 pgdat = NODE_DATA(numa_node_id);
809 for (zone_type = 0; zone_type < MAX_NR_ZONES; zone_type++)
810 mem_in_bytes += pgdat->node_zones[zone_type].managed_pages;
811 mem_in_bytes <<= PAGE_SHIFT;
813 sub_type_hdr->length_low = lower_32_bits(mem_in_bytes);
814 sub_type_hdr->length_high = upper_32_bits(mem_in_bytes);
815 sub_type_hdr->proximity_domain = proximity_domain;
820 static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size,
821 uint32_t *num_entries,
822 struct crat_subtype_iolink *sub_type_hdr)
825 struct cpuinfo_x86 *c = &cpu_data(0);
828 if (c->x86_vendor == X86_VENDOR_AMD)
829 link_type = CRAT_IOLINK_TYPE_HYPERTRANSPORT;
831 link_type = CRAT_IOLINK_TYPE_QPI_1_1;
835 /* Create IO links from this node to other CPU nodes */
836 for_each_online_node(nid) {
837 if (nid == numa_node_id) /* node itself */
840 *avail_size -= sizeof(struct crat_subtype_iolink);
844 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_iolink));
846 /* Fill in subtype header data */
847 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY;
848 sub_type_hdr->length = sizeof(struct crat_subtype_iolink);
849 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED;
851 /* Fill in IO link data */
852 sub_type_hdr->proximity_domain_from = numa_node_id;
853 sub_type_hdr->proximity_domain_to = nid;
854 sub_type_hdr->io_interface_type = link_type;
863 /* kfd_create_vcrat_image_cpu - Create Virtual CRAT for CPU
865 * @pcrat_image: Fill in VCRAT for CPU
866 * @size: [IN] allocated size of crat_image.
867 * [OUT] actual size of data filled in crat_image
869 static int kfd_create_vcrat_image_cpu(void *pcrat_image, size_t *size)
871 struct crat_header *crat_table = (struct crat_header *)pcrat_image;
872 struct acpi_table_header *acpi_table;
874 struct crat_subtype_generic *sub_type_hdr;
875 int avail_size = *size;
877 uint32_t entries = 0;
880 if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_CPU)
883 /* Fill in CRAT Header.
884 * Modify length and total_entries as subunits are added.
886 avail_size -= sizeof(struct crat_header);
890 memset(crat_table, 0, sizeof(struct crat_header));
891 memcpy(&crat_table->signature, CRAT_SIGNATURE,
892 sizeof(crat_table->signature));
893 crat_table->length = sizeof(struct crat_header);
895 status = acpi_get_table("DSDT", 0, &acpi_table);
897 pr_warn("DSDT table not found for OEM information\n");
899 crat_table->oem_revision = acpi_table->revision;
900 memcpy(crat_table->oem_id, acpi_table->oem_id,
902 memcpy(crat_table->oem_table_id, acpi_table->oem_table_id,
903 CRAT_OEMTABLEID_LENGTH);
905 crat_table->total_entries = 0;
906 crat_table->num_domains = 0;
908 sub_type_hdr = (struct crat_subtype_generic *)(crat_table+1);
910 for_each_online_node(numa_node_id) {
911 if (kfd_numa_node_to_apic_id(numa_node_id) == -1)
914 /* Fill in Subtype: Compute Unit */
915 ret = kfd_fill_cu_for_cpu(numa_node_id, &avail_size,
916 crat_table->num_domains,
917 (struct crat_subtype_computeunit *)sub_type_hdr);
920 crat_table->length += sub_type_hdr->length;
921 crat_table->total_entries++;
923 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
924 sub_type_hdr->length);
926 /* Fill in Subtype: Memory */
927 ret = kfd_fill_mem_info_for_cpu(numa_node_id, &avail_size,
928 crat_table->num_domains,
929 (struct crat_subtype_memory *)sub_type_hdr);
932 crat_table->length += sub_type_hdr->length;
933 crat_table->total_entries++;
935 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
936 sub_type_hdr->length);
938 /* Fill in Subtype: IO Link */
939 ret = kfd_fill_iolink_info_for_cpu(numa_node_id, &avail_size,
941 (struct crat_subtype_iolink *)sub_type_hdr);
944 crat_table->length += (sub_type_hdr->length * entries);
945 crat_table->total_entries += entries;
947 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
948 sub_type_hdr->length * entries);
950 crat_table->num_domains++;
953 /* TODO: Add cache Subtype for CPU.
954 * Currently, CPU cache information is available in function
955 * detect_cache_attributes(cpu) defined in the file
956 * ./arch/x86/kernel/cpu/intel_cacheinfo.c. This function is not
957 * exported and to get the same information the code needs to be
961 *size = crat_table->length;
962 pr_info("Virtual CRAT table created for CPU\n");
967 static int kfd_fill_gpu_memory_affinity(int *avail_size,
968 struct kfd_dev *kdev, uint8_t type, uint64_t size,
969 struct crat_subtype_memory *sub_type_hdr,
970 uint32_t proximity_domain,
971 const struct kfd_local_mem_info *local_mem_info)
973 *avail_size -= sizeof(struct crat_subtype_memory);
977 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_memory));
978 sub_type_hdr->type = CRAT_SUBTYPE_MEMORY_AFFINITY;
979 sub_type_hdr->length = sizeof(struct crat_subtype_memory);
980 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED;
982 sub_type_hdr->proximity_domain = proximity_domain;
984 pr_debug("Fill gpu memory affinity - type 0x%x size 0x%llx\n",
987 sub_type_hdr->length_low = lower_32_bits(size);
988 sub_type_hdr->length_high = upper_32_bits(size);
990 sub_type_hdr->width = local_mem_info->vram_width;
991 sub_type_hdr->visibility_type = type;
996 /* kfd_fill_gpu_direct_io_link - Fill in direct io link from GPU
998 * @avail_size: Available size in the memory
999 * @kdev - [IN] GPU device
1000 * @sub_type_hdr: Memory into which io link info will be filled in
1001 * @proximity_domain - proximity domain of the GPU node
1003 * Return 0 if successful else return -ve value
1005 static int kfd_fill_gpu_direct_io_link(int *avail_size,
1006 struct kfd_dev *kdev,
1007 struct crat_subtype_iolink *sub_type_hdr,
1008 uint32_t proximity_domain)
1010 *avail_size -= sizeof(struct crat_subtype_iolink);
1011 if (*avail_size < 0)
1014 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_iolink));
1016 /* Fill in subtype header data */
1017 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY;
1018 sub_type_hdr->length = sizeof(struct crat_subtype_iolink);
1019 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED;
1021 /* Fill in IOLINK subtype.
1022 * TODO: Fill-in other fields of iolink subtype
1024 sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_PCIEXPRESS;
1025 sub_type_hdr->proximity_domain_from = proximity_domain;
1027 if (kdev->pdev->dev.numa_node == NUMA_NO_NODE)
1028 sub_type_hdr->proximity_domain_to = 0;
1030 sub_type_hdr->proximity_domain_to = kdev->pdev->dev.numa_node;
1032 sub_type_hdr->proximity_domain_to = 0;
1037 /* kfd_create_vcrat_image_gpu - Create Virtual CRAT for CPU
1039 * @pcrat_image: Fill in VCRAT for GPU
1040 * @size: [IN] allocated size of crat_image.
1041 * [OUT] actual size of data filled in crat_image
1043 static int kfd_create_vcrat_image_gpu(void *pcrat_image,
1044 size_t *size, struct kfd_dev *kdev,
1045 uint32_t proximity_domain)
1047 struct crat_header *crat_table = (struct crat_header *)pcrat_image;
1048 struct crat_subtype_generic *sub_type_hdr;
1049 struct crat_subtype_computeunit *cu;
1050 struct kfd_cu_info cu_info;
1051 int avail_size = *size;
1052 uint32_t total_num_of_cu;
1053 int num_of_cache_entries = 0;
1054 int cache_mem_filled = 0;
1056 struct kfd_local_mem_info local_mem_info;
1058 if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_GPU)
1061 /* Fill the CRAT Header.
1062 * Modify length and total_entries as subunits are added.
1064 avail_size -= sizeof(struct crat_header);
1068 memset(crat_table, 0, sizeof(struct crat_header));
1070 memcpy(&crat_table->signature, CRAT_SIGNATURE,
1071 sizeof(crat_table->signature));
1072 /* Change length as we add more subtypes*/
1073 crat_table->length = sizeof(struct crat_header);
1074 crat_table->num_domains = 1;
1075 crat_table->total_entries = 0;
1077 /* Fill in Subtype: Compute Unit
1078 * First fill in the sub type header and then sub type data
1080 avail_size -= sizeof(struct crat_subtype_computeunit);
1084 sub_type_hdr = (struct crat_subtype_generic *)(crat_table + 1);
1085 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_computeunit));
1087 sub_type_hdr->type = CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY;
1088 sub_type_hdr->length = sizeof(struct crat_subtype_computeunit);
1089 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED;
1091 /* Fill CU subtype data */
1092 cu = (struct crat_subtype_computeunit *)sub_type_hdr;
1093 cu->flags |= CRAT_CU_FLAGS_GPU_PRESENT;
1094 cu->proximity_domain = proximity_domain;
1096 kdev->kfd2kgd->get_cu_info(kdev->kgd, &cu_info);
1097 cu->num_simd_per_cu = cu_info.simd_per_cu;
1098 cu->num_simd_cores = cu_info.simd_per_cu * cu_info.cu_active_number;
1099 cu->max_waves_simd = cu_info.max_waves_per_simd;
1101 cu->wave_front_size = cu_info.wave_front_size;
1102 cu->array_count = cu_info.num_shader_arrays_per_engine *
1103 cu_info.num_shader_engines;
1104 total_num_of_cu = (cu->array_count * cu_info.num_cu_per_sh);
1105 cu->processor_id_low = get_and_inc_gpu_processor_id(total_num_of_cu);
1106 cu->num_cu_per_array = cu_info.num_cu_per_sh;
1107 cu->max_slots_scatch_cu = cu_info.max_scratch_slots_per_cu;
1108 cu->num_banks = cu_info.num_shader_engines;
1109 cu->lds_size_in_kb = cu_info.lds_size;
1111 cu->hsa_capability = 0;
1113 /* Check if this node supports IOMMU. During parsing this flag will
1114 * translate to HSA_CAP_ATS_PRESENT
1116 if (!kfd_iommu_check_device(kdev))
1117 cu->hsa_capability |= CRAT_CU_FLAGS_IOMMU_PRESENT;
1119 crat_table->length += sub_type_hdr->length;
1120 crat_table->total_entries++;
1122 /* Fill in Subtype: Memory. Only on systems with large BAR (no
1123 * private FB), report memory as public. On other systems
1124 * report the total FB size (public+private) as a single
1127 kdev->kfd2kgd->get_local_mem_info(kdev->kgd, &local_mem_info);
1128 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
1129 sub_type_hdr->length);
1132 local_mem_info.local_mem_size_private = 0;
1134 if (local_mem_info.local_mem_size_private == 0)
1135 ret = kfd_fill_gpu_memory_affinity(&avail_size,
1136 kdev, HSA_MEM_HEAP_TYPE_FB_PUBLIC,
1137 local_mem_info.local_mem_size_public,
1138 (struct crat_subtype_memory *)sub_type_hdr,
1142 ret = kfd_fill_gpu_memory_affinity(&avail_size,
1143 kdev, HSA_MEM_HEAP_TYPE_FB_PRIVATE,
1144 local_mem_info.local_mem_size_public +
1145 local_mem_info.local_mem_size_private,
1146 (struct crat_subtype_memory *)sub_type_hdr,
1152 crat_table->length += sizeof(struct crat_subtype_memory);
1153 crat_table->total_entries++;
1155 /* TODO: Fill in cache information. This information is NOT readily
1158 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
1159 sub_type_hdr->length);
1160 ret = kfd_fill_gpu_cache_info(kdev, cu->processor_id_low,
1163 (struct crat_subtype_cache *)sub_type_hdr,
1165 &num_of_cache_entries);
1170 crat_table->length += cache_mem_filled;
1171 crat_table->total_entries += num_of_cache_entries;
1172 avail_size -= cache_mem_filled;
1174 /* Fill in Subtype: IO_LINKS
1175 * Only direct links are added here which is Link from GPU to
1176 * to its NUMA node. Indirect links are added by userspace.
1178 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
1180 ret = kfd_fill_gpu_direct_io_link(&avail_size, kdev,
1181 (struct crat_subtype_iolink *)sub_type_hdr, proximity_domain);
1186 crat_table->length += sub_type_hdr->length;
1187 crat_table->total_entries++;
1189 *size = crat_table->length;
1190 pr_info("Virtual CRAT table created for GPU\n");
1195 /* kfd_create_crat_image_virtual - Allocates memory for CRAT image and
1196 * creates a Virtual CRAT (VCRAT) image
1198 * NOTE: Call kfd_destroy_crat_image to free CRAT image memory
1200 * @crat_image: VCRAT image created because ACPI does not have a
1201 * CRAT for this device
1202 * @size: [OUT] size of virtual crat_image
1203 * @flags: COMPUTE_UNIT_CPU - Create VCRAT for CPU device
1204 * COMPUTE_UNIT_GPU - Create VCRAT for GPU
1205 * (COMPUTE_UNIT_CPU | COMPUTE_UNIT_GPU) - Create VCRAT for APU
1206 * -- this option is not currently implemented.
1207 * The assumption is that all AMD APUs will have CRAT
1208 * @kdev: Valid kfd_device required if flags contain COMPUTE_UNIT_GPU
1210 * Return 0 if successful else return -ve value
1212 int kfd_create_crat_image_virtual(void **crat_image, size_t *size,
1213 int flags, struct kfd_dev *kdev,
1214 uint32_t proximity_domain)
1216 void *pcrat_image = NULL;
1224 /* Allocate one VCRAT_SIZE_FOR_CPU for CPU virtual CRAT image and
1225 * VCRAT_SIZE_FOR_GPU for GPU virtual CRAT image. This should cover
1226 * all the current conditions. A check is put not to overwrite beyond
1230 case COMPUTE_UNIT_CPU:
1231 pcrat_image = kmalloc(VCRAT_SIZE_FOR_CPU, GFP_KERNEL);
1234 *size = VCRAT_SIZE_FOR_CPU;
1235 ret = kfd_create_vcrat_image_cpu(pcrat_image, size);
1237 case COMPUTE_UNIT_GPU:
1240 pcrat_image = kmalloc(VCRAT_SIZE_FOR_GPU, GFP_KERNEL);
1243 *size = VCRAT_SIZE_FOR_GPU;
1244 ret = kfd_create_vcrat_image_gpu(pcrat_image, size, kdev,
1247 case (COMPUTE_UNIT_CPU | COMPUTE_UNIT_GPU):
1250 pr_err("VCRAT not implemented for APU\n");
1257 *crat_image = pcrat_image;
1265 /* kfd_destroy_crat_image
1267 * @crat_image: [IN] - crat_image from kfd_create_crat_image_xxx(..)
1270 void kfd_destroy_crat_image(void *crat_image)