2 * Copyright 2016 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
24 #ifndef __AMDGPU_TTM_H__
25 #define __AMDGPU_TTM_H__
27 #include <linux/dma-direction.h>
28 #include <drm/gpu_scheduler.h>
31 #define AMDGPU_PL_GDS (TTM_PL_PRIV + 0)
32 #define AMDGPU_PL_GWS (TTM_PL_PRIV + 1)
33 #define AMDGPU_PL_OA (TTM_PL_PRIV + 2)
35 #define AMDGPU_GTT_MAX_TRANSFER_SIZE 512
36 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
38 #define AMDGPU_POISON 0xd0bed0be
40 struct amdgpu_vram_reservation {
41 struct list_head node;
42 struct drm_mm_node mm_node;
45 struct amdgpu_vram_mgr {
46 struct ttm_resource_manager manager;
49 struct list_head reservations_pending;
50 struct list_head reserved_pages;
55 struct amdgpu_gtt_mgr {
56 struct ttm_resource_manager manager;
63 struct ttm_bo_device bdev;
65 void __iomem *aper_base_kaddr;
67 #if defined(CONFIG_DEBUG_FS)
68 struct dentry *debugfs_entries[8];
72 const struct amdgpu_buffer_funcs *buffer_funcs;
73 struct amdgpu_ring *buffer_funcs_ring;
74 bool buffer_funcs_enabled;
76 struct mutex gtt_window_lock;
77 /* Scheduler entity for buffer moves */
78 struct drm_sched_entity entity;
80 struct amdgpu_vram_mgr vram_mgr;
81 struct amdgpu_gtt_mgr gtt_mgr;
83 uint64_t stolen_vga_size;
84 struct amdgpu_bo *stolen_vga_memory;
85 uint64_t stolen_extended_size;
86 struct amdgpu_bo *stolen_extended_memory;
87 bool keep_stolen_vga_memory;
90 uint8_t *discovery_bin;
91 uint32_t discovery_tmr_size;
92 struct amdgpu_bo *discovery_memory;
94 /* firmware VRAM reservation */
95 u64 fw_vram_usage_start_offset;
96 u64 fw_vram_usage_size;
97 struct amdgpu_bo *fw_vram_usage_reserved_bo;
98 void *fw_vram_usage_va;
101 struct amdgpu_copy_mem {
102 struct ttm_buffer_object *bo;
103 struct ttm_resource *mem;
104 unsigned long offset;
107 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
108 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
109 int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
110 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
112 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
113 uint64_t amdgpu_gtt_mgr_usage(struct ttm_resource_manager *man);
114 int amdgpu_gtt_mgr_recover(struct ttm_resource_manager *man);
116 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
117 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
118 struct ttm_resource *mem,
120 enum dma_data_direction dir,
121 struct sg_table **sgt);
122 void amdgpu_vram_mgr_free_sgt(struct amdgpu_device *adev,
124 enum dma_data_direction dir,
125 struct sg_table *sgt);
126 uint64_t amdgpu_vram_mgr_usage(struct ttm_resource_manager *man);
127 uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_resource_manager *man);
128 int amdgpu_vram_mgr_reserve_range(struct ttm_resource_manager *man,
129 uint64_t start, uint64_t size);
130 int amdgpu_vram_mgr_query_page_status(struct ttm_resource_manager *man,
133 int amdgpu_ttm_init(struct amdgpu_device *adev);
134 void amdgpu_ttm_fini(struct amdgpu_device *adev);
135 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
138 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
139 uint64_t dst_offset, uint32_t byte_count,
140 struct dma_resv *resv,
141 struct dma_fence **fence, bool direct_submit,
142 bool vm_needs_flush, bool tmz);
143 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
144 const struct amdgpu_copy_mem *src,
145 const struct amdgpu_copy_mem *dst,
146 uint64_t size, bool tmz,
147 struct dma_resv *resv,
148 struct dma_fence **f);
149 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
151 struct dma_resv *resv,
152 struct dma_fence **fence);
154 int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma);
155 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
156 int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
157 uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type);
159 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
160 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages);
161 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm);
163 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo,
168 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm)
174 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages);
175 int amdgpu_ttm_tt_set_userptr(struct ttm_buffer_object *bo,
176 uint64_t addr, uint32_t flags);
177 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm);
178 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm);
179 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
181 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
182 int *last_invalidated);
183 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm);
184 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
185 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem);
186 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
187 struct ttm_resource *mem);
189 int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);