drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

   1 /*
   2  * Copyright 2016 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #ifndef __AMDGPU_TTM_H__
  25 #define __AMDGPU_TTM_H__
  26
  27 #include <linux/dma-direction.h>
  28 #include <drm/gpu_scheduler.h>
  29 #include "amdgpu.h"
  30
  31 #define AMDGPU_PL_GDS           (TTM_PL_PRIV + 0)
  32 #define AMDGPU_PL_GWS           (TTM_PL_PRIV + 1)
  33 #define AMDGPU_PL_OA            (TTM_PL_PRIV + 2)
  34 #define AMDGPU_PL_PREEMPT       (TTM_PL_PRIV + 3)
  35
  36 #define AMDGPU_GTT_MAX_TRANSFER_SIZE    512
  37 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
  38
  39 #define AMDGPU_POISON   0xd0bed0be
  40
  41 struct amdgpu_vram_mgr {
  42         struct ttm_resource_manager manager;
  43         struct drm_mm mm;
  44         spinlock_t lock;
  45         struct list_head reservations_pending;
  46         struct list_head reserved_pages;
  47         atomic64_t vis_usage;
  48 };
  49
  50 struct amdgpu_gtt_mgr {
  51         struct ttm_resource_manager manager;
  52         struct drm_mm mm;
  53         spinlock_t lock;
  54 };
  55
  56 struct amdgpu_mman {
  57         struct ttm_device               bdev;
  58         bool                            initialized;
  59         void __iomem                    *aper_base_kaddr;
  60
  61         /* buffer handling */
  62         const struct amdgpu_buffer_funcs        *buffer_funcs;
  63         struct amdgpu_ring                      *buffer_funcs_ring;
  64         bool                                    buffer_funcs_enabled;
  65
  66         struct mutex                            gtt_window_lock;
  67         /* Scheduler entity for buffer moves */
  68         struct drm_sched_entity                 entity;
  69
  70         struct amdgpu_vram_mgr vram_mgr;
  71         struct amdgpu_gtt_mgr gtt_mgr;
  72         struct ttm_resource_manager preempt_mgr;
  73
  74         uint64_t                stolen_vga_size;
  75         struct amdgpu_bo        *stolen_vga_memory;
  76         uint64_t                stolen_extended_size;
  77         struct amdgpu_bo        *stolen_extended_memory;
  78         bool                    keep_stolen_vga_memory;
  79
  80         struct amdgpu_bo        *stolen_reserved_memory;
  81         uint64_t                stolen_reserved_offset;
  82         uint64_t                stolen_reserved_size;
  83
  84         /* discovery */
  85         uint8_t                         *discovery_bin;
  86         uint32_t                        discovery_tmr_size;
  87         struct amdgpu_bo                *discovery_memory;
  88
  89         /* firmware VRAM reservation */
  90         u64             fw_vram_usage_start_offset;
  91         u64             fw_vram_usage_size;
  92         struct amdgpu_bo        *fw_vram_usage_reserved_bo;
  93         void            *fw_vram_usage_va;
  94
  95         /* PAGE_SIZE'd BO for process memory r/w over SDMA. */
  96         struct amdgpu_bo        *sdma_access_bo;
  97         void                    *sdma_access_ptr;
  98 };
  99
 100 struct amdgpu_copy_mem {
 101         struct ttm_buffer_object        *bo;
 102         struct ttm_resource             *mem;
 103         unsigned long                   offset;
 104 };
 105
 106 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
 107 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
 108 int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
 109 void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
 110 int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
 111 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
 112
 113 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
 114 void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr);
 115
 116 uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager *man);
 117
 118 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
 119 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
 120                               struct ttm_resource *mem,
 121                               u64 offset, u64 size,
 122                               struct device *dev,
 123                               enum dma_data_direction dir,
 124                               struct sg_table **sgt);
 125 void amdgpu_vram_mgr_free_sgt(struct device *dev,
 126                               enum dma_data_direction dir,
 127                               struct sg_table *sgt);
 128 uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr);
 129 int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
 130                                   uint64_t start, uint64_t size);
 131 int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
 132                                       uint64_t start);
 133
 134 int amdgpu_ttm_init(struct amdgpu_device *adev);
 135 void amdgpu_ttm_fini(struct amdgpu_device *adev);
 136 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
 137                                         bool enable);
 138
 139 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
 140                        uint64_t dst_offset, uint32_t byte_count,
 141                        struct dma_resv *resv,
 142                        struct dma_fence **fence, bool direct_submit,
 143                        bool vm_needs_flush, bool tmz);
 144 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 145                                const struct amdgpu_copy_mem *src,
 146                                const struct amdgpu_copy_mem *dst,
 147                                uint64_t size, bool tmz,
 148                                struct dma_resv *resv,
 149                                struct dma_fence **f);
 150 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
 151                         uint32_t src_data,
 152                         struct dma_resv *resv,
 153                         struct dma_fence **fence);
 154
 155 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
 156 void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
 157 uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type);
 158
 159 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
 160 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages);
 161 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm);
 162 #else
 163 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo,
 164                                                struct page **pages)
 165 {
 166         return -EPERM;
 167 }
 168 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm)
 169 {
 170         return false;
 171 }
 172 #endif
 173
 174 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages);
 175 int amdgpu_ttm_tt_get_userptr(const struct ttm_buffer_object *tbo,
 176                               uint64_t *user_addr);
 177 int amdgpu_ttm_tt_set_userptr(struct ttm_buffer_object *bo,
 178                               uint64_t addr, uint32_t flags);
 179 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm);
 180 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm);
 181 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
 182                                   unsigned long end, unsigned long *userptr);
 183 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
 184                                        int *last_invalidated);
 185 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm);
 186 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
 187 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem);
 188 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
 189                                  struct ttm_resource *mem);
 190 int amdgpu_ttm_evict_resources(struct amdgpu_device *adev, int mem_type);
 191
 192 void amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
 193
 194 #endif