2 * Copyright (C) 2019 Advanced Micro Devices, Inc.
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23 #include "amdgpu_ras.h"
25 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev)
28 struct ras_ih_if ih_info = {
31 struct ras_fs_if fs_info = {
32 .sysfs_name = "pcie_bif_err_count",
33 .debugfs_name = "pcie_bif_err_inject",
36 if (!adev->nbio.ras_if) {
37 adev->nbio.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
38 if (!adev->nbio.ras_if)
40 adev->nbio.ras_if->block = AMDGPU_RAS_BLOCK__PCIE_BIF;
41 adev->nbio.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
42 adev->nbio.ras_if->sub_block_index = 0;
43 strcpy(adev->nbio.ras_if->name, "pcie_bif");
45 ih_info.head = fs_info.head = *adev->nbio.ras_if;
46 r = amdgpu_ras_late_init(adev, adev->nbio.ras_if,
51 if (amdgpu_ras_is_supported(adev, adev->nbio.ras_if->block)) {
52 r = amdgpu_irq_get(adev, &adev->nbio.ras_controller_irq, 0);
55 r = amdgpu_irq_get(adev, &adev->nbio.ras_err_event_athub_irq, 0);
65 amdgpu_ras_late_fini(adev, adev->nbio.ras_if, &ih_info);
67 kfree(adev->nbio.ras_if);
68 adev->nbio.ras_if = NULL;
72 void amdgpu_nbio_ras_fini(struct amdgpu_device *adev)
74 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__PCIE_BIF) &&
76 struct ras_common_if *ras_if = adev->nbio.ras_if;
77 struct ras_ih_if ih_info = {
81 amdgpu_ras_late_fini(adev, ras_if, &ih_info);