Merge branch 'next' into for-linus
[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_fb.c
1 /*
2  * Copyright © 2007 David Airlie
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *     David Airlie
25  */
26
27 #include <linux/module.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/slab.h>
30 #include <linux/vga_switcheroo.h>
31
32 #include <drm/amdgpu_drm.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_crtc_helper.h>
35 #include <drm/drm_fb_helper.h>
36 #include <drm/drm_fourcc.h>
37
38 #include "amdgpu.h"
39 #include "cikd.h"
40 #include "amdgpu_gem.h"
41
42 #include "amdgpu_display.h"
43
44 /* object hierarchy -
45    this contains a helper + a amdgpu fb
46    the helper contains a pointer to amdgpu framebuffer baseclass.
47 */
48
49 static int
50 amdgpufb_open(struct fb_info *info, int user)
51 {
52         struct drm_fb_helper *fb_helper = info->par;
53         int ret = pm_runtime_get_sync(fb_helper->dev->dev);
54         if (ret < 0 && ret != -EACCES) {
55                 pm_runtime_mark_last_busy(fb_helper->dev->dev);
56                 pm_runtime_put_autosuspend(fb_helper->dev->dev);
57                 return ret;
58         }
59         return 0;
60 }
61
62 static int
63 amdgpufb_release(struct fb_info *info, int user)
64 {
65         struct drm_fb_helper *fb_helper = info->par;
66
67         pm_runtime_mark_last_busy(fb_helper->dev->dev);
68         pm_runtime_put_autosuspend(fb_helper->dev->dev);
69         return 0;
70 }
71
72 static const struct fb_ops amdgpufb_ops = {
73         .owner = THIS_MODULE,
74         DRM_FB_HELPER_DEFAULT_OPS,
75         .fb_open = amdgpufb_open,
76         .fb_release = amdgpufb_release,
77         .fb_fillrect = drm_fb_helper_cfb_fillrect,
78         .fb_copyarea = drm_fb_helper_cfb_copyarea,
79         .fb_imageblit = drm_fb_helper_cfb_imageblit,
80 };
81
82
83 int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int cpp, bool tiled)
84 {
85         int aligned = width;
86         int pitch_mask = 0;
87
88         switch (cpp) {
89         case 1:
90                 pitch_mask = 255;
91                 break;
92         case 2:
93                 pitch_mask = 127;
94                 break;
95         case 3:
96         case 4:
97                 pitch_mask = 63;
98                 break;
99         }
100
101         aligned += pitch_mask;
102         aligned &= ~pitch_mask;
103         return aligned * cpp;
104 }
105
106 static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj)
107 {
108         struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj);
109         int ret;
110
111         ret = amdgpu_bo_reserve(abo, true);
112         if (likely(ret == 0)) {
113                 amdgpu_bo_kunmap(abo);
114                 amdgpu_bo_unpin(abo);
115                 amdgpu_bo_unreserve(abo);
116         }
117         drm_gem_object_put(gobj);
118 }
119
120 static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
121                                          struct drm_mode_fb_cmd2 *mode_cmd,
122                                          struct drm_gem_object **gobj_p)
123 {
124         const struct drm_format_info *info;
125         struct amdgpu_device *adev = rfbdev->adev;
126         struct drm_gem_object *gobj = NULL;
127         struct amdgpu_bo *abo = NULL;
128         bool fb_tiled = false; /* useful for testing */
129         u32 tiling_flags = 0, domain;
130         int ret;
131         int aligned_size, size;
132         int height = mode_cmd->height;
133         u32 cpp;
134         u64 flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
135                                AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS     |
136                                AMDGPU_GEM_CREATE_VRAM_CLEARED;
137
138         info = drm_get_format_info(adev_to_drm(adev), mode_cmd);
139         cpp = info->cpp[0];
140
141         /* need to align pitch with crtc limits */
142         mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
143                                                   fb_tiled);
144         domain = amdgpu_display_supported_domains(adev, flags);
145         height = ALIGN(mode_cmd->height, 8);
146         size = mode_cmd->pitches[0] * height;
147         aligned_size = ALIGN(size, PAGE_SIZE);
148         ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain, flags,
149                                        ttm_bo_type_device, NULL, &gobj);
150         if (ret) {
151                 pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
152                 return -ENOMEM;
153         }
154         abo = gem_to_amdgpu_bo(gobj);
155
156         if (fb_tiled)
157                 tiling_flags = AMDGPU_TILING_SET(ARRAY_MODE, GRPH_ARRAY_2D_TILED_THIN1);
158
159         ret = amdgpu_bo_reserve(abo, false);
160         if (unlikely(ret != 0))
161                 goto out_unref;
162
163         if (tiling_flags) {
164                 ret = amdgpu_bo_set_tiling_flags(abo,
165                                                  tiling_flags);
166                 if (ret)
167                         dev_err(adev->dev, "FB failed to set tiling flags\n");
168         }
169
170         ret = amdgpu_bo_pin(abo, domain);
171         if (ret) {
172                 amdgpu_bo_unreserve(abo);
173                 goto out_unref;
174         }
175
176         ret = amdgpu_ttm_alloc_gart(&abo->tbo);
177         if (ret) {
178                 amdgpu_bo_unreserve(abo);
179                 dev_err(adev->dev, "%p bind failed\n", abo);
180                 goto out_unref;
181         }
182
183         ret = amdgpu_bo_kmap(abo, NULL);
184         amdgpu_bo_unreserve(abo);
185         if (ret) {
186                 goto out_unref;
187         }
188
189         *gobj_p = gobj;
190         return 0;
191 out_unref:
192         amdgpufb_destroy_pinned_object(gobj);
193         *gobj_p = NULL;
194         return ret;
195 }
196
197 static int amdgpufb_create(struct drm_fb_helper *helper,
198                            struct drm_fb_helper_surface_size *sizes)
199 {
200         struct amdgpu_fbdev *rfbdev = (struct amdgpu_fbdev *)helper;
201         struct amdgpu_device *adev = rfbdev->adev;
202         struct fb_info *info;
203         struct drm_framebuffer *fb = NULL;
204         struct drm_mode_fb_cmd2 mode_cmd;
205         struct drm_gem_object *gobj = NULL;
206         struct amdgpu_bo *abo = NULL;
207         int ret;
208         unsigned long tmp;
209
210         memset(&mode_cmd, 0, sizeof(mode_cmd));
211         mode_cmd.width = sizes->surface_width;
212         mode_cmd.height = sizes->surface_height;
213
214         if (sizes->surface_bpp == 24)
215                 sizes->surface_bpp = 32;
216
217         mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
218                                                           sizes->surface_depth);
219
220         ret = amdgpufb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
221         if (ret) {
222                 DRM_ERROR("failed to create fbcon object %d\n", ret);
223                 return ret;
224         }
225
226         abo = gem_to_amdgpu_bo(gobj);
227
228         /* okay we have an object now allocate the framebuffer */
229         info = drm_fb_helper_alloc_fbi(helper);
230         if (IS_ERR(info)) {
231                 ret = PTR_ERR(info);
232                 goto out;
233         }
234
235         ret = amdgpu_display_framebuffer_init(adev_to_drm(adev), &rfbdev->rfb,
236                                               &mode_cmd, gobj);
237         if (ret) {
238                 DRM_ERROR("failed to initialize framebuffer %d\n", ret);
239                 goto out;
240         }
241
242         fb = &rfbdev->rfb.base;
243
244         /* setup helper */
245         rfbdev->helper.fb = fb;
246
247         info->fbops = &amdgpufb_ops;
248
249         tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start;
250         info->fix.smem_start = adev->gmc.aper_base + tmp;
251         info->fix.smem_len = amdgpu_bo_size(abo);
252         info->screen_base = amdgpu_bo_kptr(abo);
253         info->screen_size = amdgpu_bo_size(abo);
254
255         drm_fb_helper_fill_info(info, &rfbdev->helper, sizes);
256
257         /* setup aperture base/size for vesafb takeover */
258         info->apertures->ranges[0].base = adev_to_drm(adev)->mode_config.fb_base;
259         info->apertures->ranges[0].size = adev->gmc.aper_size;
260
261         /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
262
263         if (info->screen_base == NULL) {
264                 ret = -ENOSPC;
265                 goto out;
266         }
267
268         DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
269         DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)adev->gmc.aper_base);
270         DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(abo));
271         DRM_INFO("fb depth is %d\n", fb->format->depth);
272         DRM_INFO("   pitch is %d\n", fb->pitches[0]);
273
274         vga_switcheroo_client_fb_set(adev->pdev, info);
275         return 0;
276
277 out:
278         if (abo) {
279
280         }
281         if (fb && ret) {
282                 drm_gem_object_put(gobj);
283                 drm_framebuffer_unregister_private(fb);
284                 drm_framebuffer_cleanup(fb);
285                 kfree(fb);
286         }
287         return ret;
288 }
289
290 static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfbdev)
291 {
292         struct amdgpu_framebuffer *rfb = &rfbdev->rfb;
293
294         drm_fb_helper_unregister_fbi(&rfbdev->helper);
295
296         if (rfb->base.obj[0]) {
297                 amdgpufb_destroy_pinned_object(rfb->base.obj[0]);
298                 rfb->base.obj[0] = NULL;
299                 drm_framebuffer_unregister_private(&rfb->base);
300                 drm_framebuffer_cleanup(&rfb->base);
301         }
302         drm_fb_helper_fini(&rfbdev->helper);
303
304         return 0;
305 }
306
307 static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = {
308         .fb_probe = amdgpufb_create,
309 };
310
311 int amdgpu_fbdev_init(struct amdgpu_device *adev)
312 {
313         struct amdgpu_fbdev *rfbdev;
314         int bpp_sel = 32;
315         int ret;
316
317         /* don't init fbdev on hw without DCE */
318         if (!adev->mode_info.mode_config_initialized)
319                 return 0;
320
321         /* don't init fbdev if there are no connectors */
322         if (list_empty(&adev_to_drm(adev)->mode_config.connector_list))
323                 return 0;
324
325         /* select 8 bpp console on low vram cards */
326         if (adev->gmc.real_vram_size <= (32*1024*1024))
327                 bpp_sel = 8;
328
329         rfbdev = kzalloc(sizeof(struct amdgpu_fbdev), GFP_KERNEL);
330         if (!rfbdev)
331                 return -ENOMEM;
332
333         rfbdev->adev = adev;
334         adev->mode_info.rfbdev = rfbdev;
335
336         drm_fb_helper_prepare(adev_to_drm(adev), &rfbdev->helper,
337                               &amdgpu_fb_helper_funcs);
338
339         ret = drm_fb_helper_init(adev_to_drm(adev), &rfbdev->helper);
340         if (ret) {
341                 kfree(rfbdev);
342                 return ret;
343         }
344
345         /* disable all the possible outputs/crtcs before entering KMS mode */
346         if (!amdgpu_device_has_dc_support(adev))
347                 drm_helper_disable_unused_functions(adev_to_drm(adev));
348
349         drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
350         return 0;
351 }
352
353 void amdgpu_fbdev_fini(struct amdgpu_device *adev)
354 {
355         if (!adev->mode_info.rfbdev)
356                 return;
357
358         amdgpu_fbdev_destroy(adev_to_drm(adev), adev->mode_info.rfbdev);
359         kfree(adev->mode_info.rfbdev);
360         adev->mode_info.rfbdev = NULL;
361 }
362
363 void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state)
364 {
365         if (adev->mode_info.rfbdev)
366                 drm_fb_helper_set_suspend_unlocked(&adev->mode_info.rfbdev->helper,
367                                                    state);
368 }
369
370 int amdgpu_fbdev_total_size(struct amdgpu_device *adev)
371 {
372         struct amdgpu_bo *robj;
373         int size = 0;
374
375         if (!adev->mode_info.rfbdev)
376                 return 0;
377
378         robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0]);
379         size += amdgpu_bo_size(robj);
380         return size;
381 }
382
383 bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj)
384 {
385         if (!adev->mode_info.rfbdev)
386                 return false;
387         if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0]))
388                 return true;
389         return false;
390 }