Merge tag 'pci-v4.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaa...
[linux-2.6-microblaze.git] / drivers / gpio / gpio-zx.c
1 /*
2  * ZTE ZX296702 GPIO driver
3  *
4  * Author: Jun Nie <jun.nie@linaro.org>
5  *
6  * Copyright (C) 2015 Linaro Ltd.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 #include <linux/bitops.h>
13 #include <linux/device.h>
14 #include <linux/errno.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/irqchip/chained_irq.h>
17 #include <linux/init.h>
18 #include <linux/of.h>
19 #include <linux/pinctrl/consumer.h>
20 #include <linux/platform_device.h>
21 #include <linux/pm.h>
22 #include <linux/slab.h>
23 #include <linux/spinlock.h>
24
25 #define ZX_GPIO_DIR     0x00
26 #define ZX_GPIO_IVE     0x04
27 #define ZX_GPIO_IV      0x08
28 #define ZX_GPIO_IEP     0x0C
29 #define ZX_GPIO_IEN     0x10
30 #define ZX_GPIO_DI      0x14
31 #define ZX_GPIO_DO1     0x18
32 #define ZX_GPIO_DO0     0x1C
33 #define ZX_GPIO_DO      0x20
34
35 #define ZX_GPIO_IM      0x28
36 #define ZX_GPIO_IE      0x2C
37
38 #define ZX_GPIO_MIS     0x30
39 #define ZX_GPIO_IC      0x34
40
41 #define ZX_GPIO_NR      16
42
43 struct zx_gpio {
44         raw_spinlock_t          lock;
45
46         void __iomem            *base;
47         struct gpio_chip        gc;
48 };
49
50 static int zx_direction_input(struct gpio_chip *gc, unsigned offset)
51 {
52         struct zx_gpio *chip = gpiochip_get_data(gc);
53         unsigned long flags;
54         u16 gpiodir;
55
56         if (offset >= gc->ngpio)
57                 return -EINVAL;
58
59         raw_spin_lock_irqsave(&chip->lock, flags);
60         gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);
61         gpiodir &= ~BIT(offset);
62         writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);
63         raw_spin_unlock_irqrestore(&chip->lock, flags);
64
65         return 0;
66 }
67
68 static int zx_direction_output(struct gpio_chip *gc, unsigned offset,
69                 int value)
70 {
71         struct zx_gpio *chip = gpiochip_get_data(gc);
72         unsigned long flags;
73         u16 gpiodir;
74
75         if (offset >= gc->ngpio)
76                 return -EINVAL;
77
78         raw_spin_lock_irqsave(&chip->lock, flags);
79         gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);
80         gpiodir |= BIT(offset);
81         writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);
82
83         if (value)
84                 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);
85         else
86                 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);
87         raw_spin_unlock_irqrestore(&chip->lock, flags);
88
89         return 0;
90 }
91
92 static int zx_get_value(struct gpio_chip *gc, unsigned offset)
93 {
94         struct zx_gpio *chip = gpiochip_get_data(gc);
95
96         return !!(readw_relaxed(chip->base + ZX_GPIO_DI) & BIT(offset));
97 }
98
99 static void zx_set_value(struct gpio_chip *gc, unsigned offset, int value)
100 {
101         struct zx_gpio *chip = gpiochip_get_data(gc);
102
103         if (value)
104                 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);
105         else
106                 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);
107 }
108
109 static int zx_irq_type(struct irq_data *d, unsigned trigger)
110 {
111         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
112         struct zx_gpio *chip = gpiochip_get_data(gc);
113         int offset = irqd_to_hwirq(d);
114         unsigned long flags;
115         u16 gpiois, gpioi_epos, gpioi_eneg, gpioiev;
116         u16 bit = BIT(offset);
117
118         if (offset < 0 || offset >= ZX_GPIO_NR)
119                 return -EINVAL;
120
121         raw_spin_lock_irqsave(&chip->lock, flags);
122
123         gpioiev = readw_relaxed(chip->base + ZX_GPIO_IV);
124         gpiois = readw_relaxed(chip->base + ZX_GPIO_IVE);
125         gpioi_epos = readw_relaxed(chip->base + ZX_GPIO_IEP);
126         gpioi_eneg = readw_relaxed(chip->base + ZX_GPIO_IEN);
127
128         if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
129                 gpiois |= bit;
130                 if (trigger & IRQ_TYPE_LEVEL_HIGH)
131                         gpioiev |= bit;
132                 else
133                         gpioiev &= ~bit;
134         } else
135                 gpiois &= ~bit;
136
137         if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
138                 gpioi_epos |= bit;
139                 gpioi_eneg |= bit;
140         } else {
141                 if (trigger & IRQ_TYPE_EDGE_RISING) {
142                         gpioi_epos |= bit;
143                         gpioi_eneg &= ~bit;
144                 } else if (trigger & IRQ_TYPE_EDGE_FALLING) {
145                         gpioi_eneg |= bit;
146                         gpioi_epos &= ~bit;
147                 }
148         }
149
150         writew_relaxed(gpiois, chip->base + ZX_GPIO_IVE);
151         writew_relaxed(gpioi_epos, chip->base + ZX_GPIO_IEP);
152         writew_relaxed(gpioi_eneg, chip->base + ZX_GPIO_IEN);
153         writew_relaxed(gpioiev, chip->base + ZX_GPIO_IV);
154         raw_spin_unlock_irqrestore(&chip->lock, flags);
155
156         return 0;
157 }
158
159 static void zx_irq_handler(struct irq_desc *desc)
160 {
161         unsigned long pending;
162         int offset;
163         struct gpio_chip *gc = irq_desc_get_handler_data(desc);
164         struct zx_gpio *chip = gpiochip_get_data(gc);
165         struct irq_chip *irqchip = irq_desc_get_chip(desc);
166
167         chained_irq_enter(irqchip, desc);
168
169         pending = readw_relaxed(chip->base + ZX_GPIO_MIS);
170         writew_relaxed(pending, chip->base + ZX_GPIO_IC);
171         if (pending) {
172                 for_each_set_bit(offset, &pending, ZX_GPIO_NR)
173                         generic_handle_irq(irq_find_mapping(gc->irq.domain,
174                                                             offset));
175         }
176
177         chained_irq_exit(irqchip, desc);
178 }
179
180 static void zx_irq_mask(struct irq_data *d)
181 {
182         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
183         struct zx_gpio *chip = gpiochip_get_data(gc);
184         u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR);
185         u16 gpioie;
186
187         raw_spin_lock(&chip->lock);
188         gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) | mask;
189         writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);
190         gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) & ~mask;
191         writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);
192         raw_spin_unlock(&chip->lock);
193 }
194
195 static void zx_irq_unmask(struct irq_data *d)
196 {
197         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
198         struct zx_gpio *chip = gpiochip_get_data(gc);
199         u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR);
200         u16 gpioie;
201
202         raw_spin_lock(&chip->lock);
203         gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) & ~mask;
204         writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);
205         gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) | mask;
206         writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);
207         raw_spin_unlock(&chip->lock);
208 }
209
210 static struct irq_chip zx_irqchip = {
211         .name           = "zx-gpio",
212         .irq_mask       = zx_irq_mask,
213         .irq_unmask     = zx_irq_unmask,
214         .irq_set_type   = zx_irq_type,
215 };
216
217 static int zx_gpio_probe(struct platform_device *pdev)
218 {
219         struct device *dev = &pdev->dev;
220         struct zx_gpio *chip;
221         struct resource *res;
222         int irq, id, ret;
223
224         chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
225         if (!chip)
226                 return -ENOMEM;
227
228         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
229         chip->base = devm_ioremap_resource(dev, res);
230         if (IS_ERR(chip->base))
231                 return PTR_ERR(chip->base);
232
233         raw_spin_lock_init(&chip->lock);
234         if (of_property_read_bool(dev->of_node, "gpio-ranges")) {
235                 chip->gc.request = gpiochip_generic_request;
236                 chip->gc.free = gpiochip_generic_free;
237         }
238
239         id = of_alias_get_id(dev->of_node, "gpio");
240         chip->gc.direction_input = zx_direction_input;
241         chip->gc.direction_output = zx_direction_output;
242         chip->gc.get = zx_get_value;
243         chip->gc.set = zx_set_value;
244         chip->gc.base = ZX_GPIO_NR * id;
245         chip->gc.ngpio = ZX_GPIO_NR;
246         chip->gc.label = dev_name(dev);
247         chip->gc.parent = dev;
248         chip->gc.owner = THIS_MODULE;
249
250         ret = gpiochip_add_data(&chip->gc, chip);
251         if (ret)
252                 return ret;
253
254         /*
255          * irq_chip support
256          */
257         writew_relaxed(0xffff, chip->base + ZX_GPIO_IM);
258         writew_relaxed(0, chip->base + ZX_GPIO_IE);
259         irq = platform_get_irq(pdev, 0);
260         if (irq < 0) {
261                 dev_err(dev, "invalid IRQ\n");
262                 gpiochip_remove(&chip->gc);
263                 return -ENODEV;
264         }
265
266         ret = gpiochip_irqchip_add(&chip->gc, &zx_irqchip,
267                                    0, handle_simple_irq,
268                                    IRQ_TYPE_NONE);
269         if (ret) {
270                 dev_err(dev, "could not add irqchip\n");
271                 gpiochip_remove(&chip->gc);
272                 return ret;
273         }
274         gpiochip_set_chained_irqchip(&chip->gc, &zx_irqchip,
275                                      irq, zx_irq_handler);
276
277         platform_set_drvdata(pdev, chip);
278         dev_info(dev, "ZX GPIO chip registered\n");
279
280         return 0;
281 }
282
283 static const struct of_device_id zx_gpio_match[] = {
284         {
285                 .compatible = "zte,zx296702-gpio",
286         },
287         { },
288 };
289
290 static struct platform_driver zx_gpio_driver = {
291         .probe          = zx_gpio_probe,
292         .driver = {
293                 .name   = "zx_gpio",
294                 .of_match_table = of_match_ptr(zx_gpio_match),
295         },
296 };
297 builtin_platform_driver(zx_gpio_driver)