2 * STMicroelectronics ConneXt (STA2X11) GPIO driver
4 * Copyright 2012 ST Microelectronics (Alessandro Rubini)
5 * Based on gpio-ml-ioh.c, Copyright 2010 OKI Semiconductors Ltd.
6 * Also based on previous sta2x11 work, Copyright 2011 Wind River Systems, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
15 * See the GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/init.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include <linux/gpio/driver.h>
27 #include <linux/bitops.h>
28 #include <linux/interrupt.h>
29 #include <linux/irq.h>
30 #include <linux/pci.h>
31 #include <linux/platform_device.h>
32 #include <linux/mfd/sta2x11-mfd.h>
43 u32 afsela; /* 0x20 */
54 void __iomem *reg_base;
55 struct gsta_regs __iomem *regs[GSTA_NR_BLOCKS];
56 struct gpio_chip gpio;
58 /* FIXME: save the whole config here (AF, ...) */
59 unsigned irq_type[GSTA_NR_GPIO];
62 static inline struct gsta_regs __iomem *__regs(struct gsta_gpio *chip, int nr)
64 return chip->regs[nr / GSTA_GPIO_PER_BLOCK];
71 static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
73 struct gsta_gpio *chip = gpiochip_get_data(gpio);
74 struct gsta_regs __iomem *regs = __regs(chip, nr);
75 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
78 writel(bit, ®s->dats);
80 writel(bit, ®s->datc);
83 static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr)
85 struct gsta_gpio *chip = gpiochip_get_data(gpio);
86 struct gsta_regs __iomem *regs = __regs(chip, nr);
87 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
89 return !!(readl(®s->dat) & bit);
92 static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
95 struct gsta_gpio *chip = gpiochip_get_data(gpio);
96 struct gsta_regs __iomem *regs = __regs(chip, nr);
97 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
99 writel(bit, ®s->dirs);
100 /* Data register after direction, otherwise pullup/down is selected */
102 writel(bit, ®s->dats);
104 writel(bit, ®s->datc);
108 static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
110 struct gsta_gpio *chip = gpiochip_get_data(gpio);
111 struct gsta_regs __iomem *regs = __regs(chip, nr);
112 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
114 writel(bit, ®s->dirc);
118 static int gsta_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)
120 struct gsta_gpio *chip = gpiochip_get_data(gpio);
121 return chip->irq_base + offset;
124 static void gsta_gpio_setup(struct gsta_gpio *chip) /* called from probe */
126 struct gpio_chip *gpio = &chip->gpio;
129 * ARCH_NR_GPIOS is currently 256 and dynamic allocation starts
130 * from the end. However, for compatibility, we need the first
131 * ConneXt device to start from gpio 0: it's the main chipset
132 * on most boards so documents and drivers assume gpio0..gpio127
134 static int gpio_base;
136 gpio->label = dev_name(chip->dev);
137 gpio->owner = THIS_MODULE;
138 gpio->direction_input = gsta_gpio_direction_input;
139 gpio->get = gsta_gpio_get;
140 gpio->direction_output = gsta_gpio_direction_output;
141 gpio->set = gsta_gpio_set;
142 gpio->dbg_show = NULL;
143 gpio->base = gpio_base;
144 gpio->ngpio = GSTA_NR_GPIO;
145 gpio->can_sleep = false;
146 gpio->to_irq = gsta_gpio_to_irq;
149 * After the first device, turn to dynamic gpio numbers.
150 * For example, with ARCH_NR_GPIOS = 256 we can fit two cards
157 * Special method: alternate functions and pullup/pulldown. This is only
158 * invoked on startup to configure gpio's according to platform data.
159 * FIXME : this functionality shall be managed (and exported to other drivers)
160 * via the pin control subsystem.
162 static void gsta_set_config(struct gsta_gpio *chip, int nr, unsigned cfg)
164 struct gsta_regs __iomem *regs = __regs(chip, nr);
166 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
170 pr_info("%s: %p %i %i\n", __func__, chip, nr, cfg);
172 if (cfg == PINMUX_TYPE_NONE)
175 /* Alternate function or not? */
176 spin_lock_irqsave(&chip->lock, flags);
177 val = readl(®s->afsela);
178 if (cfg == PINMUX_TYPE_FUNCTION)
182 writel(val | bit, ®s->afsela);
183 if (cfg == PINMUX_TYPE_FUNCTION) {
184 spin_unlock_irqrestore(&chip->lock, flags);
188 /* not alternate function: set details */
190 case PINMUX_TYPE_OUTPUT_LOW:
191 writel(bit, ®s->dirs);
192 writel(bit, ®s->datc);
194 case PINMUX_TYPE_OUTPUT_HIGH:
195 writel(bit, ®s->dirs);
196 writel(bit, ®s->dats);
198 case PINMUX_TYPE_INPUT:
199 writel(bit, ®s->dirc);
200 val = readl(®s->pdis) | bit;
201 writel(val, ®s->pdis);
203 case PINMUX_TYPE_INPUT_PULLUP:
204 writel(bit, ®s->dirc);
205 val = readl(®s->pdis) & ~bit;
206 writel(val, ®s->pdis);
207 writel(bit, ®s->dats);
209 case PINMUX_TYPE_INPUT_PULLDOWN:
210 writel(bit, ®s->dirc);
211 val = readl(®s->pdis) & ~bit;
212 writel(val, ®s->pdis);
213 writel(bit, ®s->datc);
218 spin_unlock_irqrestore(&chip->lock, flags);
220 pr_err("%s: chip %p, pin %i, cfg %i is invalid\n",
221 __func__, chip, nr, cfg);
228 static void gsta_irq_disable(struct irq_data *data)
230 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
231 struct gsta_gpio *chip = gc->private;
232 int nr = data->irq - chip->irq_base;
233 struct gsta_regs __iomem *regs = __regs(chip, nr);
234 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
238 spin_lock_irqsave(&chip->lock, flags);
239 if (chip->irq_type[nr] & IRQ_TYPE_EDGE_RISING) {
240 val = readl(®s->rimsc) & ~bit;
241 writel(val, ®s->rimsc);
243 if (chip->irq_type[nr] & IRQ_TYPE_EDGE_FALLING) {
244 val = readl(®s->fimsc) & ~bit;
245 writel(val, ®s->fimsc);
247 spin_unlock_irqrestore(&chip->lock, flags);
251 static void gsta_irq_enable(struct irq_data *data)
253 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
254 struct gsta_gpio *chip = gc->private;
255 int nr = data->irq - chip->irq_base;
256 struct gsta_regs __iomem *regs = __regs(chip, nr);
257 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
262 type = chip->irq_type[nr];
264 spin_lock_irqsave(&chip->lock, flags);
265 val = readl(®s->rimsc);
266 if (type & IRQ_TYPE_EDGE_RISING)
267 writel(val | bit, ®s->rimsc);
269 writel(val & ~bit, ®s->rimsc);
270 val = readl(®s->rimsc);
271 if (type & IRQ_TYPE_EDGE_FALLING)
272 writel(val | bit, ®s->fimsc);
274 writel(val & ~bit, ®s->fimsc);
275 spin_unlock_irqrestore(&chip->lock, flags);
279 static int gsta_irq_type(struct irq_data *d, unsigned int type)
281 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
282 struct gsta_gpio *chip = gc->private;
283 int nr = d->irq - chip->irq_base;
285 /* We only support edge interrupts */
286 if (!(type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))) {
287 pr_debug("%s: unsupported type 0x%x\n", __func__, type);
291 chip->irq_type[nr] = type; /* used for enable/disable */
297 static irqreturn_t gsta_gpio_handler(int irq, void *dev_id)
299 struct gsta_gpio *chip = dev_id;
300 struct gsta_regs __iomem *regs;
303 irqreturn_t ret = IRQ_NONE;
305 for (i = 0; i < GSTA_NR_BLOCKS; i++) {
306 regs = chip->regs[i];
307 base = chip->irq_base + i * GSTA_GPIO_PER_BLOCK;
308 while ((is = readl(®s->is))) {
311 generic_handle_irq(irq);
312 writel(1 << nr, ®s->ic);
319 static int gsta_alloc_irq_chip(struct gsta_gpio *chip)
321 struct irq_chip_generic *gc;
322 struct irq_chip_type *ct;
325 gc = devm_irq_alloc_generic_chip(chip->dev, KBUILD_MODNAME, 1,
327 chip->reg_base, handle_simple_irq);
334 ct->chip.irq_set_type = gsta_irq_type;
335 ct->chip.irq_disable = gsta_irq_disable;
336 ct->chip.irq_enable = gsta_irq_enable;
338 /* FIXME: this makes at most 32 interrupts. Request 0 by now */
339 rv = devm_irq_setup_generic_chip(chip->dev, gc,
340 0 /* IRQ_MSK(GSTA_GPIO_PER_BLOCK) */,
341 0, IRQ_NOREQUEST | IRQ_NOPROBE, 0);
345 /* Set up all all 128 interrupts: code from setup_generic_chip */
347 struct irq_chip_type *ct = gc->chip_types;
349 for (j = 0; j < GSTA_NR_GPIO; j++) {
350 i = chip->irq_base + j;
351 irq_set_chip_and_handler(i, &ct->chip, ct->handler);
352 irq_set_chip_data(i, gc);
353 irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
355 gc->irq_cnt = i - gc->irq_base;
361 /* The platform device used here is instantiated by the MFD device */
362 static int gsta_probe(struct platform_device *dev)
365 struct pci_dev *pdev;
366 struct sta2x11_gpio_pdata *gpio_pdata;
367 struct gsta_gpio *chip;
368 struct resource *res;
370 pdev = *(struct pci_dev **)dev_get_platdata(&dev->dev);
371 gpio_pdata = dev_get_platdata(&pdev->dev);
373 if (gpio_pdata == NULL)
374 dev_err(&dev->dev, "no gpio config\n");
375 pr_debug("gpio config: %p\n", gpio_pdata);
377 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
379 chip = devm_kzalloc(&dev->dev, sizeof(*chip), GFP_KERNEL);
382 chip->dev = &dev->dev;
383 chip->reg_base = devm_ioremap_resource(&dev->dev, res);
384 if (IS_ERR(chip->reg_base))
385 return PTR_ERR(chip->reg_base);
387 for (i = 0; i < GSTA_NR_BLOCKS; i++) {
388 chip->regs[i] = chip->reg_base + i * 4096;
389 /* disable all irqs */
390 writel(0, &chip->regs[i]->rimsc);
391 writel(0, &chip->regs[i]->fimsc);
392 writel(~0, &chip->regs[i]->ic);
394 spin_lock_init(&chip->lock);
395 gsta_gpio_setup(chip);
397 for (i = 0; i < GSTA_NR_GPIO; i++)
398 gsta_set_config(chip, i, gpio_pdata->pinconfig[i]);
400 /* 384 was used in previous code: be compatible for other drivers */
401 err = devm_irq_alloc_descs(&dev->dev, -1, 384,
402 GSTA_NR_GPIO, NUMA_NO_NODE);
404 dev_warn(&dev->dev, "sta2x11 gpio: Can't get irq base (%i)\n",
408 chip->irq_base = err;
410 err = gsta_alloc_irq_chip(chip);
414 err = devm_request_irq(&dev->dev, pdev->irq, gsta_gpio_handler,
415 IRQF_SHARED, KBUILD_MODNAME, chip);
417 dev_err(&dev->dev, "sta2x11 gpio: Can't request irq (%i)\n",
422 err = devm_gpiochip_add_data(&dev->dev, &chip->gpio, chip);
424 dev_err(&dev->dev, "sta2x11 gpio: Can't register (%i)\n",
429 platform_set_drvdata(dev, chip);
433 static struct platform_driver sta2x11_gpio_platform_driver = {
435 .name = "sta2x11-gpio",
436 .suppress_bind_attrs = true,
440 builtin_platform_driver(sta2x11_gpio_platform_driver);