drivers/gpio/gpio-pca953x.c

   1 /*
   2  *  PCA953x 4/8/16/24/40 bit I/O ports
   3  *
   4  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
   5  *  Copyright (C) 2007 Marvell International Ltd.
   6  *
   7  *  Derived from drivers/i2c/chips/pca9539.c
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; version 2 of the License.
  12  */
  13
  14 #include <linux/acpi.h>
  15 #include <linux/gpio/driver.h>
  16 #include <linux/gpio/consumer.h>
  17 #include <linux/i2c.h>
  18 #include <linux/init.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/module.h>
  21 #include <linux/of_platform.h>
  22 #include <linux/platform_data/pca953x.h>
  23 #include <linux/regmap.h>
  24 #include <linux/regulator/consumer.h>
  25 #include <linux/slab.h>
  26
  27 #include <asm/unaligned.h>
  28
  29 #define PCA953X_INPUT           0x00
  30 #define PCA953X_OUTPUT          0x01
  31 #define PCA953X_INVERT          0x02
  32 #define PCA953X_DIRECTION       0x03
  33
  34 #define REG_ADDR_MASK           0x3f
  35 #define REG_ADDR_EXT            0x40
  36 #define REG_ADDR_AI             0x80
  37
  38 #define PCA957X_IN              0x00
  39 #define PCA957X_INVRT           0x01
  40 #define PCA957X_BKEN            0x02
  41 #define PCA957X_PUPD            0x03
  42 #define PCA957X_CFG             0x04
  43 #define PCA957X_OUT             0x05
  44 #define PCA957X_MSK             0x06
  45 #define PCA957X_INTS            0x07
  46
  47 #define PCAL953X_OUT_STRENGTH   0x20
  48 #define PCAL953X_IN_LATCH       0x22
  49 #define PCAL953X_PULL_EN        0x23
  50 #define PCAL953X_PULL_SEL       0x24
  51 #define PCAL953X_INT_MASK       0x25
  52 #define PCAL953X_INT_STAT       0x26
  53 #define PCAL953X_OUT_CONF       0x27
  54
  55 #define PCAL6524_INT_EDGE       0x28
  56 #define PCAL6524_INT_CLR        0x2a
  57 #define PCAL6524_IN_STATUS      0x2b
  58 #define PCAL6524_OUT_INDCONF    0x2c
  59 #define PCAL6524_DEBOUNCE       0x2d
  60
  61 #define PCA_GPIO_MASK           0x00FF
  62
  63 #define PCAL_GPIO_MASK          0x1f
  64 #define PCAL_PINCTRL_MASK       0x60
  65
  66 #define PCA_INT                 0x0100
  67 #define PCA_PCAL                0x0200
  68 #define PCA_LATCH_INT           (PCA_PCAL | PCA_INT)
  69 #define PCA953X_TYPE            0x1000
  70 #define PCA957X_TYPE            0x2000
  71 #define PCA_TYPE_MASK           0xF000
  72
  73 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
  74
  75 static const struct i2c_device_id pca953x_id[] = {
  76         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
  77         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
  78         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  79         { "pca9536", 4  | PCA953X_TYPE, },
  80         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
  81         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
  82         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  83         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
  84         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  85         { "pca9556", 8  | PCA953X_TYPE, },
  86         { "pca9557", 8  | PCA953X_TYPE, },
  87         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
  88         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  89         { "pca9698", 40 | PCA953X_TYPE, },
  90
  91         { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  92         { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
  93         { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  94
  95         { "max7310", 8  | PCA953X_TYPE, },
  96         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
  97         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
  98         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
  99         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
 100         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
 101         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
 102         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
 103         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
 104         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
 105         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
 106         { "xra1202", 8  | PCA953X_TYPE },
 107         { }
 108 };
 109 MODULE_DEVICE_TABLE(i2c, pca953x_id);
 110
 111 static const struct acpi_device_id pca953x_acpi_ids[] = {
 112         { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
 113         { }
 114 };
 115 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
 116
 117 #define MAX_BANK 5
 118 #define BANK_SZ 8
 119
 120 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
 121
 122 struct pca953x_reg_config {
 123         int direction;
 124         int output;
 125         int input;
 126         int invert;
 127 };
 128
 129 static const struct pca953x_reg_config pca953x_regs = {
 130         .direction = PCA953X_DIRECTION,
 131         .output = PCA953X_OUTPUT,
 132         .input = PCA953X_INPUT,
 133         .invert = PCA953X_INVERT,
 134 };
 135
 136 static const struct pca953x_reg_config pca957x_regs = {
 137         .direction = PCA957X_CFG,
 138         .output = PCA957X_OUT,
 139         .input = PCA957X_IN,
 140         .invert = PCA957X_INVRT,
 141 };
 142
 143 struct pca953x_chip {
 144         unsigned gpio_start;
 145         struct mutex i2c_lock;
 146         struct regmap *regmap;
 147
 148 #ifdef CONFIG_GPIO_PCA953X_IRQ
 149         struct mutex irq_lock;
 150         u8 irq_mask[MAX_BANK];
 151         u8 irq_stat[MAX_BANK];
 152         u8 irq_trig_raise[MAX_BANK];
 153         u8 irq_trig_fall[MAX_BANK];
 154         struct irq_chip irq_chip;
 155 #endif
 156
 157         struct i2c_client *client;
 158         struct gpio_chip gpio_chip;
 159         const char *const *names;
 160         unsigned long driver_data;
 161         struct regulator *regulator;
 162
 163         const struct pca953x_reg_config *regs;
 164 };
 165
 166 static int pca953x_bank_shift(struct pca953x_chip *chip)
 167 {
 168         return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 169 }
 170
 171 #define PCA953x_BANK_INPUT      BIT(0)
 172 #define PCA953x_BANK_OUTPUT     BIT(1)
 173 #define PCA953x_BANK_POLARITY   BIT(2)
 174 #define PCA953x_BANK_CONFIG     BIT(3)
 175
 176 #define PCA957x_BANK_INPUT      BIT(0)
 177 #define PCA957x_BANK_POLARITY   BIT(1)
 178 #define PCA957x_BANK_BUSHOLD    BIT(2)
 179 #define PCA957x_BANK_CONFIG     BIT(4)
 180 #define PCA957x_BANK_OUTPUT     BIT(5)
 181
 182 #define PCAL9xxx_BANK_IN_LATCH  BIT(8 + 2)
 183 #define PCAL9xxx_BANK_PULL_EN   BIT(8 + 3)
 184 #define PCAL9xxx_BANK_PULL_SEL  BIT(8 + 4)
 185 #define PCAL9xxx_BANK_IRQ_MASK  BIT(8 + 5)
 186 #define PCAL9xxx_BANK_IRQ_STAT  BIT(8 + 6)
 187
 188 /*
 189  * We care about the following registers:
 190  * - Standard set, below 0x40, each port can be replicated up to 8 times
 191  *   - PCA953x standard
 192  *     Input port                       0x00 + 0 * bank_size    R
 193  *     Output port                      0x00 + 1 * bank_size    RW
 194  *     Polarity Inversion port          0x00 + 2 * bank_size    RW
 195  *     Configuration port               0x00 + 3 * bank_size    RW
 196  *   - PCA957x with mixed up registers
 197  *     Input port                       0x00 + 0 * bank_size    R
 198  *     Polarity Inversion port          0x00 + 1 * bank_size    RW
 199  *     Bus hold port                    0x00 + 2 * bank_size    RW
 200  *     Configuration port               0x00 + 4 * bank_size    RW
 201  *     Output port                      0x00 + 5 * bank_size    RW
 202  *
 203  * - Extended set, above 0x40, often chip specific.
 204  *   - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
 205  *     Input latch register             0x40 + 2 * bank_size    RW
 206  *     Pull-up/pull-down enable reg     0x40 + 3 * bank_size    RW
 207  *     Pull-up/pull-down select reg     0x40 + 4 * bank_size    RW
 208  *     Interrupt mask register          0x40 + 5 * bank_size    RW
 209  *     Interrupt status register        0x40 + 6 * bank_size    R
 210  *
 211  * - Registers with bit 0x80 set, the AI bit
 212  *   The bit is cleared and the registers fall into one of the
 213  *   categories above.
 214  */
 215
 216 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
 217                                    u32 checkbank)
 218 {
 219         int bank_shift = pca953x_bank_shift(chip);
 220         int bank = (reg & REG_ADDR_MASK) >> bank_shift;
 221         int offset = reg & (BIT(bank_shift) - 1);
 222
 223         /* Special PCAL extended register check. */
 224         if (reg & REG_ADDR_EXT) {
 225                 if (!(chip->driver_data & PCA_PCAL))
 226                         return false;
 227                 bank += 8;
 228         }
 229
 230         /* Register is not in the matching bank. */
 231         if (!(BIT(bank) & checkbank))
 232                 return false;
 233
 234         /* Register is not within allowed range of bank. */
 235         if (offset >= NBANK(chip))
 236                 return false;
 237
 238         return true;
 239 }
 240
 241 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
 242 {
 243         struct pca953x_chip *chip = dev_get_drvdata(dev);
 244         u32 bank;
 245
 246         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 247                 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
 248                        PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
 249         } else {
 250                 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
 251                        PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
 252                        PCA957x_BANK_BUSHOLD;
 253         }
 254
 255         if (chip->driver_data & PCA_PCAL) {
 256                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 257                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
 258                         PCAL9xxx_BANK_IRQ_STAT;
 259         }
 260
 261         return pca953x_check_register(chip, reg, bank);
 262 }
 263
 264 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
 265 {
 266         struct pca953x_chip *chip = dev_get_drvdata(dev);
 267         u32 bank;
 268
 269         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 270                 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
 271                         PCA953x_BANK_CONFIG;
 272         } else {
 273                 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
 274                         PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
 275         }
 276
 277         if (chip->driver_data & PCA_PCAL)
 278                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 279                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
 280
 281         return pca953x_check_register(chip, reg, bank);
 282 }
 283
 284 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
 285 {
 286         struct pca953x_chip *chip = dev_get_drvdata(dev);
 287         u32 bank;
 288
 289         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
 290                 bank = PCA953x_BANK_INPUT;
 291         else
 292                 bank = PCA957x_BANK_INPUT;
 293
 294         if (chip->driver_data & PCA_PCAL)
 295                 bank |= PCAL9xxx_BANK_IRQ_STAT;
 296
 297         return pca953x_check_register(chip, reg, bank);
 298 }
 299
 300 static const struct regmap_config pca953x_i2c_regmap = {
 301         .reg_bits = 8,
 302         .val_bits = 8,
 303
 304         .readable_reg = pca953x_readable_register,
 305         .writeable_reg = pca953x_writeable_register,
 306         .volatile_reg = pca953x_volatile_register,
 307
 308         .cache_type = REGCACHE_RBTREE,
 309         .max_register = 0x7f,
 310 };
 311
 312 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
 313                               bool write, bool addrinc)
 314 {
 315         int bank_shift = pca953x_bank_shift(chip);
 316         int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
 317         int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 318         u8 regaddr = pinctrl | addr | (off / BANK_SZ);
 319
 320         /* Single byte read doesn't need AI bit set. */
 321         if (!addrinc)
 322                 return regaddr;
 323
 324         /* Chips with 24 and more GPIOs always support Auto Increment */
 325         if (write && NBANK(chip) > 2)
 326                 regaddr |= REG_ADDR_AI;
 327
 328         /* PCA9575 needs address-increment on multi-byte writes */
 329         if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
 330                 regaddr |= REG_ADDR_AI;
 331
 332         return regaddr;
 333 }
 334
 335 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
 336 {
 337         u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
 338         int ret;
 339
 340         ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip));
 341         if (ret < 0) {
 342                 dev_err(&chip->client->dev, "failed writing register\n");
 343                 return ret;
 344         }
 345
 346         return 0;
 347 }
 348
 349 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
 350 {
 351         u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
 352         int ret;
 353
 354         ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip));
 355         if (ret < 0) {
 356                 dev_err(&chip->client->dev, "failed reading register\n");
 357                 return ret;
 358         }
 359
 360         return 0;
 361 }
 362
 363 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
 364 {
 365         struct pca953x_chip *chip = gpiochip_get_data(gc);
 366         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
 367                                         true, false);
 368         u8 bit = BIT(off % BANK_SZ);
 369         int ret;
 370
 371         mutex_lock(&chip->i2c_lock);
 372         ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
 373         mutex_unlock(&chip->i2c_lock);
 374         return ret;
 375 }
 376
 377 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
 378                 unsigned off, int val)
 379 {
 380         struct pca953x_chip *chip = gpiochip_get_data(gc);
 381         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
 382                                         true, false);
 383         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
 384                                         true, false);
 385         u8 bit = BIT(off % BANK_SZ);
 386         int ret;
 387
 388         mutex_lock(&chip->i2c_lock);
 389         /* set output level */
 390         ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 391         if (ret)
 392                 goto exit;
 393
 394         /* then direction */
 395         ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
 396 exit:
 397         mutex_unlock(&chip->i2c_lock);
 398         return ret;
 399 }
 400
 401 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
 402 {
 403         struct pca953x_chip *chip = gpiochip_get_data(gc);
 404         u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
 405                                        true, false);
 406         u8 bit = BIT(off % BANK_SZ);
 407         u32 reg_val;
 408         int ret;
 409
 410         mutex_lock(&chip->i2c_lock);
 411         ret = regmap_read(chip->regmap, inreg, &reg_val);
 412         mutex_unlock(&chip->i2c_lock);
 413         if (ret < 0) {
 414                 /* NOTE:  diagnostic already emitted; that's all we should
 415                  * do unless gpio_*_value_cansleep() calls become different
 416                  * from their nonsleeping siblings (and report faults).
 417                  */
 418                 return 0;
 419         }
 420
 421         return !!(reg_val & bit);
 422 }
 423
 424 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
 425 {
 426         struct pca953x_chip *chip = gpiochip_get_data(gc);
 427         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
 428                                         true, false);
 429         u8 bit = BIT(off % BANK_SZ);
 430
 431         mutex_lock(&chip->i2c_lock);
 432         regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 433         mutex_unlock(&chip->i2c_lock);
 434 }
 435
 436 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
 437 {
 438         struct pca953x_chip *chip = gpiochip_get_data(gc);
 439         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
 440                                         true, false);
 441         u8 bit = BIT(off % BANK_SZ);
 442         u32 reg_val;
 443         int ret;
 444
 445         mutex_lock(&chip->i2c_lock);
 446         ret = regmap_read(chip->regmap, dirreg, &reg_val);
 447         mutex_unlock(&chip->i2c_lock);
 448         if (ret < 0)
 449                 return ret;
 450
 451         return !!(reg_val & bit);
 452 }
 453
 454 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
 455                                       unsigned long *mask, unsigned long *bits)
 456 {
 457         struct pca953x_chip *chip = gpiochip_get_data(gc);
 458         unsigned int bank_mask, bank_val;
 459         int bank;
 460         u8 reg_val[MAX_BANK];
 461         int ret;
 462
 463         mutex_lock(&chip->i2c_lock);
 464         ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
 465         if (ret)
 466                 goto exit;
 467
 468         for (bank = 0; bank < NBANK(chip); bank++) {
 469                 bank_mask = mask[bank / sizeof(*mask)] >>
 470                            ((bank % sizeof(*mask)) * 8);
 471                 if (bank_mask) {
 472                         bank_val = bits[bank / sizeof(*bits)] >>
 473                                   ((bank % sizeof(*bits)) * 8);
 474                         bank_val &= bank_mask;
 475                         reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
 476                 }
 477         }
 478
 479         pca953x_write_regs(chip, chip->regs->output, reg_val);
 480 exit:
 481         mutex_unlock(&chip->i2c_lock);
 482 }
 483
 484 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
 485                                          unsigned int offset,
 486                                          unsigned long config)
 487 {
 488         u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset,
 489                                              true, false);
 490         u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset,
 491                                               true, false);
 492         u8 bit = BIT(offset % BANK_SZ);
 493         int ret;
 494
 495         /*
 496          * pull-up/pull-down configuration requires PCAL extended
 497          * registers
 498          */
 499         if (!(chip->driver_data & PCA_PCAL))
 500                 return -ENOTSUPP;
 501
 502         mutex_lock(&chip->i2c_lock);
 503
 504         /* Disable pull-up/pull-down */
 505         ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
 506         if (ret)
 507                 goto exit;
 508
 509         /* Configure pull-up/pull-down */
 510         if (config == PIN_CONFIG_BIAS_PULL_UP)
 511                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
 512         else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
 513                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
 514         if (ret)
 515                 goto exit;
 516
 517         /* Enable pull-up/pull-down */
 518         ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
 519
 520 exit:
 521         mutex_unlock(&chip->i2c_lock);
 522         return ret;
 523 }
 524
 525 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
 526                                    unsigned long config)
 527 {
 528         struct pca953x_chip *chip = gpiochip_get_data(gc);
 529
 530         switch (config) {
 531         case PIN_CONFIG_BIAS_PULL_UP:
 532         case PIN_CONFIG_BIAS_PULL_DOWN:
 533                 return pca953x_gpio_set_pull_up_down(chip, offset, config);
 534         default:
 535                 return -ENOTSUPP;
 536         }
 537 }
 538
 539 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 540 {
 541         struct gpio_chip *gc;
 542
 543         gc = &chip->gpio_chip;
 544
 545         gc->direction_input  = pca953x_gpio_direction_input;
 546         gc->direction_output = pca953x_gpio_direction_output;
 547         gc->get = pca953x_gpio_get_value;
 548         gc->set = pca953x_gpio_set_value;
 549         gc->get_direction = pca953x_gpio_get_direction;
 550         gc->set_multiple = pca953x_gpio_set_multiple;
 551         gc->set_config = pca953x_gpio_set_config;
 552         gc->can_sleep = true;
 553
 554         gc->base = chip->gpio_start;
 555         gc->ngpio = gpios;
 556         gc->label = dev_name(&chip->client->dev);
 557         gc->parent = &chip->client->dev;
 558         gc->owner = THIS_MODULE;
 559         gc->names = chip->names;
 560 }
 561
 562 #ifdef CONFIG_GPIO_PCA953X_IRQ
 563 static void pca953x_irq_mask(struct irq_data *d)
 564 {
 565         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 566         struct pca953x_chip *chip = gpiochip_get_data(gc);
 567
 568         chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
 569 }
 570
 571 static void pca953x_irq_unmask(struct irq_data *d)
 572 {
 573         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 574         struct pca953x_chip *chip = gpiochip_get_data(gc);
 575
 576         chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
 577 }
 578
 579 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
 580 {
 581         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 582         struct pca953x_chip *chip = gpiochip_get_data(gc);
 583
 584         return irq_set_irq_wake(chip->client->irq, on);
 585 }
 586
 587 static void pca953x_irq_bus_lock(struct irq_data *d)
 588 {
 589         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 590         struct pca953x_chip *chip = gpiochip_get_data(gc);
 591
 592         mutex_lock(&chip->irq_lock);
 593 }
 594
 595 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 596 {
 597         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 598         struct pca953x_chip *chip = gpiochip_get_data(gc);
 599         u8 new_irqs;
 600         int level, i;
 601         u8 invert_irq_mask[MAX_BANK];
 602         int reg_direction[MAX_BANK];
 603
 604         regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
 605                          NBANK(chip));
 606
 607         if (chip->driver_data & PCA_PCAL) {
 608                 /* Enable latch on interrupt-enabled inputs */
 609                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
 610
 611                 for (i = 0; i < NBANK(chip); i++)
 612                         invert_irq_mask[i] = ~chip->irq_mask[i];
 613
 614                 /* Unmask enabled interrupts */
 615                 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
 616         }
 617
 618         /* Look for any newly setup interrupt */
 619         for (i = 0; i < NBANK(chip); i++) {
 620                 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
 621                 new_irqs &= reg_direction[i];
 622
 623                 while (new_irqs) {
 624                         level = __ffs(new_irqs);
 625                         pca953x_gpio_direction_input(&chip->gpio_chip,
 626                                                         level + (BANK_SZ * i));
 627                         new_irqs &= ~(1 << level);
 628                 }
 629         }
 630
 631         mutex_unlock(&chip->irq_lock);
 632 }
 633
 634 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 635 {
 636         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 637         struct pca953x_chip *chip = gpiochip_get_data(gc);
 638         int bank_nb = d->hwirq / BANK_SZ;
 639         u8 mask = 1 << (d->hwirq % BANK_SZ);
 640
 641         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
 642                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
 643                         d->irq, type);
 644                 return -EINVAL;
 645         }
 646
 647         if (type & IRQ_TYPE_EDGE_FALLING)
 648                 chip->irq_trig_fall[bank_nb] |= mask;
 649         else
 650                 chip->irq_trig_fall[bank_nb] &= ~mask;
 651
 652         if (type & IRQ_TYPE_EDGE_RISING)
 653                 chip->irq_trig_raise[bank_nb] |= mask;
 654         else
 655                 chip->irq_trig_raise[bank_nb] &= ~mask;
 656
 657         return 0;
 658 }
 659
 660 static void pca953x_irq_shutdown(struct irq_data *d)
 661 {
 662         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 663         struct pca953x_chip *chip = gpiochip_get_data(gc);
 664         u8 mask = 1 << (d->hwirq % BANK_SZ);
 665
 666         chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
 667         chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
 668 }
 669
 670 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
 671 {
 672         u8 cur_stat[MAX_BANK];
 673         u8 old_stat[MAX_BANK];
 674         bool pending_seen = false;
 675         bool trigger_seen = false;
 676         u8 trigger[MAX_BANK];
 677         int reg_direction[MAX_BANK];
 678         int ret, i;
 679
 680         if (chip->driver_data & PCA_PCAL) {
 681                 /* Read the current interrupt status from the device */
 682                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
 683                 if (ret)
 684                         return false;
 685
 686                 /* Check latched inputs and clear interrupt status */
 687                 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
 688                 if (ret)
 689                         return false;
 690
 691                 for (i = 0; i < NBANK(chip); i++) {
 692                         /* Apply filter for rising/falling edge selection */
 693                         pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
 694                                 (cur_stat[i] & chip->irq_trig_raise[i]);
 695                         pending[i] &= trigger[i];
 696                         if (pending[i])
 697                                 pending_seen = true;
 698                 }
 699
 700                 return pending_seen;
 701         }
 702
 703         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 704         if (ret)
 705                 return false;
 706
 707         /* Remove output pins from the equation */
 708         regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
 709                          NBANK(chip));
 710         for (i = 0; i < NBANK(chip); i++)
 711                 cur_stat[i] &= reg_direction[i];
 712
 713         memcpy(old_stat, chip->irq_stat, NBANK(chip));
 714
 715         for (i = 0; i < NBANK(chip); i++) {
 716                 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
 717                 if (trigger[i])
 718                         trigger_seen = true;
 719         }
 720
 721         if (!trigger_seen)
 722                 return false;
 723
 724         memcpy(chip->irq_stat, cur_stat, NBANK(chip));
 725
 726         for (i = 0; i < NBANK(chip); i++) {
 727                 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
 728                         (cur_stat[i] & chip->irq_trig_raise[i]);
 729                 pending[i] &= trigger[i];
 730                 if (pending[i])
 731                         pending_seen = true;
 732         }
 733
 734         return pending_seen;
 735 }
 736
 737 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 738 {
 739         struct pca953x_chip *chip = devid;
 740         u8 pending[MAX_BANK];
 741         u8 level;
 742         unsigned nhandled = 0;
 743         int i;
 744
 745         if (!pca953x_irq_pending(chip, pending))
 746                 return IRQ_NONE;
 747
 748         for (i = 0; i < NBANK(chip); i++) {
 749                 while (pending[i]) {
 750                         level = __ffs(pending[i]);
 751                         handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
 752                                                         level + (BANK_SZ * i)));
 753                         pending[i] &= ~(1 << level);
 754                         nhandled++;
 755                 }
 756         }
 757
 758         return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
 759 }
 760
 761 static int pca953x_irq_setup(struct pca953x_chip *chip,
 762                              int irq_base)
 763 {
 764         struct i2c_client *client = chip->client;
 765         struct irq_chip *irq_chip = &chip->irq_chip;
 766         int reg_direction[MAX_BANK];
 767         int ret, i;
 768
 769         if (!client->irq)
 770                 return 0;
 771
 772         if (irq_base == -1)
 773                 return 0;
 774
 775         if (!(chip->driver_data & PCA_INT))
 776                 return 0;
 777
 778         ret = pca953x_read_regs(chip, chip->regs->input, chip->irq_stat);
 779         if (ret)
 780                 return ret;
 781
 782         /*
 783          * There is no way to know which GPIO line generated the
 784          * interrupt.  We have to rely on the previous read for
 785          * this purpose.
 786          */
 787         regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
 788                          NBANK(chip));
 789         for (i = 0; i < NBANK(chip); i++)
 790                 chip->irq_stat[i] &= reg_direction[i];
 791         mutex_init(&chip->irq_lock);
 792
 793         ret = devm_request_threaded_irq(&client->dev, client->irq,
 794                                         NULL, pca953x_irq_handler,
 795                                         IRQF_TRIGGER_LOW | IRQF_ONESHOT |
 796                                         IRQF_SHARED,
 797                                         dev_name(&client->dev), chip);
 798         if (ret) {
 799                 dev_err(&client->dev, "failed to request irq %d\n",
 800                         client->irq);
 801                 return ret;
 802         }
 803
 804         irq_chip->name = dev_name(&chip->client->dev);
 805         irq_chip->irq_mask = pca953x_irq_mask;
 806         irq_chip->irq_unmask = pca953x_irq_unmask;
 807         irq_chip->irq_set_wake = pca953x_irq_set_wake;
 808         irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
 809         irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
 810         irq_chip->irq_set_type = pca953x_irq_set_type;
 811         irq_chip->irq_shutdown = pca953x_irq_shutdown;
 812
 813         ret =  gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
 814                                            irq_base, handle_simple_irq,
 815                                            IRQ_TYPE_NONE);
 816         if (ret) {
 817                 dev_err(&client->dev,
 818                         "could not connect irqchip to gpiochip\n");
 819                 return ret;
 820         }
 821
 822         gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
 823
 824         return 0;
 825 }
 826
 827 #else /* CONFIG_GPIO_PCA953X_IRQ */
 828 static int pca953x_irq_setup(struct pca953x_chip *chip,
 829                              int irq_base)
 830 {
 831         struct i2c_client *client = chip->client;
 832
 833         if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
 834                 dev_warn(&client->dev, "interrupt support not compiled in\n");
 835
 836         return 0;
 837 }
 838 #endif
 839
 840 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
 841 {
 842         int ret;
 843         u8 val[MAX_BANK];
 844
 845         ret = regcache_sync_region(chip->regmap, chip->regs->output,
 846                                    chip->regs->output + NBANK(chip));
 847         if (ret != 0)
 848                 goto out;
 849
 850         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
 851                                    chip->regs->direction + NBANK(chip));
 852         if (ret != 0)
 853                 goto out;
 854
 855         /* set platform specific polarity inversion */
 856         if (invert)
 857                 memset(val, 0xFF, NBANK(chip));
 858         else
 859                 memset(val, 0, NBANK(chip));
 860
 861         ret = pca953x_write_regs(chip, chip->regs->invert, val);
 862 out:
 863         return ret;
 864 }
 865
 866 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 867 {
 868         int ret;
 869         u8 val[MAX_BANK];
 870
 871         ret = device_pca95xx_init(chip, invert);
 872         if (ret)
 873                 goto out;
 874
 875         /* To enable register 6, 7 to control pull up and pull down */
 876         memset(val, 0x02, NBANK(chip));
 877         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
 878         if (ret)
 879                 goto out;
 880
 881         return 0;
 882 out:
 883         return ret;
 884 }
 885
 886 static const struct of_device_id pca953x_dt_ids[];
 887
 888 static int pca953x_probe(struct i2c_client *client,
 889                                    const struct i2c_device_id *i2c_id)
 890 {
 891         struct pca953x_platform_data *pdata;
 892         struct pca953x_chip *chip;
 893         int irq_base = 0;
 894         int ret;
 895         u32 invert = 0;
 896         struct regulator *reg;
 897
 898         chip = devm_kzalloc(&client->dev,
 899                         sizeof(struct pca953x_chip), GFP_KERNEL);
 900         if (chip == NULL)
 901                 return -ENOMEM;
 902
 903         pdata = dev_get_platdata(&client->dev);
 904         if (pdata) {
 905                 irq_base = pdata->irq_base;
 906                 chip->gpio_start = pdata->gpio_base;
 907                 invert = pdata->invert;
 908                 chip->names = pdata->names;
 909         } else {
 910                 struct gpio_desc *reset_gpio;
 911
 912                 chip->gpio_start = -1;
 913                 irq_base = 0;
 914
 915                 /*
 916                  * See if we need to de-assert a reset pin.
 917                  *
 918                  * There is no known ACPI-enabled platforms that are
 919                  * using "reset" GPIO. Otherwise any of those platform
 920                  * must use _DSD method with corresponding property.
 921                  */
 922                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
 923                                                      GPIOD_OUT_LOW);
 924                 if (IS_ERR(reset_gpio))
 925                         return PTR_ERR(reset_gpio);
 926         }
 927
 928         chip->client = client;
 929
 930         reg = devm_regulator_get(&client->dev, "vcc");
 931         if (IS_ERR(reg)) {
 932                 ret = PTR_ERR(reg);
 933                 if (ret != -EPROBE_DEFER)
 934                         dev_err(&client->dev, "reg get err: %d\n", ret);
 935                 return ret;
 936         }
 937         ret = regulator_enable(reg);
 938         if (ret) {
 939                 dev_err(&client->dev, "reg en err: %d\n", ret);
 940                 return ret;
 941         }
 942         chip->regulator = reg;
 943
 944         if (i2c_id) {
 945                 chip->driver_data = i2c_id->driver_data;
 946         } else {
 947                 const struct acpi_device_id *acpi_id;
 948                 struct device *dev = &client->dev;
 949
 950                 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
 951                 if (!chip->driver_data) {
 952                         acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
 953                         if (!acpi_id) {
 954                                 ret = -ENODEV;
 955                                 goto err_exit;
 956                         }
 957
 958                         chip->driver_data = acpi_id->driver_data;
 959                 }
 960         }
 961
 962         i2c_set_clientdata(client, chip);
 963
 964         chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap);
 965         if (IS_ERR(chip->regmap)) {
 966                 ret = PTR_ERR(chip->regmap);
 967                 goto err_exit;
 968         }
 969
 970         regcache_mark_dirty(chip->regmap);
 971
 972         mutex_init(&chip->i2c_lock);
 973         /*
 974          * In case we have an i2c-mux controlled by a GPIO provided by an
 975          * expander using the same driver higher on the device tree, read the
 976          * i2c adapter nesting depth and use the retrieved value as lockdep
 977          * subclass for chip->i2c_lock.
 978          *
 979          * REVISIT: This solution is not complete. It protects us from lockdep
 980          * false positives when the expander controlling the i2c-mux is on
 981          * a different level on the device tree, but not when it's on the same
 982          * level on a different branch (in which case the subclass number
 983          * would be the same).
 984          *
 985          * TODO: Once a correct solution is developed, a similar fix should be
 986          * applied to all other i2c-controlled GPIO expanders (and potentially
 987          * regmap-i2c).
 988          */
 989         lockdep_set_subclass(&chip->i2c_lock,
 990                              i2c_adapter_depth(client->adapter));
 991
 992         /* initialize cached registers from their original values.
 993          * we can't share this chip with another i2c master.
 994          */
 995         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
 996
 997         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 998                 chip->regs = &pca953x_regs;
 999                 ret = device_pca95xx_init(chip, invert);
1000         } else {
1001                 chip->regs = &pca957x_regs;
1002                 ret = device_pca957x_init(chip, invert);
1003         }
1004         if (ret)
1005                 goto err_exit;
1006
1007         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1008         if (ret)
1009                 goto err_exit;
1010
1011         ret = pca953x_irq_setup(chip, irq_base);
1012         if (ret)
1013                 goto err_exit;
1014
1015         if (pdata && pdata->setup) {
1016                 ret = pdata->setup(client, chip->gpio_chip.base,
1017                                 chip->gpio_chip.ngpio, pdata->context);
1018                 if (ret < 0)
1019                         dev_warn(&client->dev, "setup failed, %d\n", ret);
1020         }
1021
1022         return 0;
1023
1024 err_exit:
1025         regulator_disable(chip->regulator);
1026         return ret;
1027 }
1028
1029 static int pca953x_remove(struct i2c_client *client)
1030 {
1031         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1032         struct pca953x_chip *chip = i2c_get_clientdata(client);
1033         int ret;
1034
1035         if (pdata && pdata->teardown) {
1036                 ret = pdata->teardown(client, chip->gpio_chip.base,
1037                                 chip->gpio_chip.ngpio, pdata->context);
1038                 if (ret < 0)
1039                         dev_err(&client->dev, "%s failed, %d\n",
1040                                         "teardown", ret);
1041         } else {
1042                 ret = 0;
1043         }
1044
1045         regulator_disable(chip->regulator);
1046
1047         return ret;
1048 }
1049
1050 #ifdef CONFIG_PM_SLEEP
1051 static int pca953x_regcache_sync(struct device *dev)
1052 {
1053         struct pca953x_chip *chip = dev_get_drvdata(dev);
1054         int ret;
1055
1056         /*
1057          * The ordering between direction and output is important,
1058          * sync these registers first and only then sync the rest.
1059          */
1060         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1061                                    chip->regs->direction + NBANK(chip));
1062         if (ret != 0) {
1063                 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1064                 return ret;
1065         }
1066
1067         ret = regcache_sync_region(chip->regmap, chip->regs->output,
1068                                    chip->regs->output + NBANK(chip));
1069         if (ret != 0) {
1070                 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1071                 return ret;
1072         }
1073
1074 #ifdef CONFIG_GPIO_PCA953X_IRQ
1075         if (chip->driver_data & PCA_PCAL) {
1076                 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1077                                            PCAL953X_IN_LATCH + NBANK(chip));
1078                 if (ret != 0) {
1079                         dev_err(dev, "Failed to sync INT latch registers: %d\n",
1080                                 ret);
1081                         return ret;
1082                 }
1083
1084                 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1085                                            PCAL953X_INT_MASK + NBANK(chip));
1086                 if (ret != 0) {
1087                         dev_err(dev, "Failed to sync INT mask registers: %d\n",
1088                                 ret);
1089                         return ret;
1090                 }
1091         }
1092 #endif
1093
1094         return 0;
1095 }
1096
1097 static int pca953x_suspend(struct device *dev)
1098 {
1099         struct pca953x_chip *chip = dev_get_drvdata(dev);
1100
1101         regcache_cache_only(chip->regmap, true);
1102
1103         regulator_disable(chip->regulator);
1104
1105         return 0;
1106 }
1107
1108 static int pca953x_resume(struct device *dev)
1109 {
1110         struct pca953x_chip *chip = dev_get_drvdata(dev);
1111         int ret;
1112
1113         ret = regulator_enable(chip->regulator);
1114         if (ret != 0) {
1115                 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1116                 return 0;
1117         }
1118
1119         regcache_cache_only(chip->regmap, false);
1120         regcache_mark_dirty(chip->regmap);
1121         ret = pca953x_regcache_sync(dev);
1122         if (ret)
1123                 return ret;
1124
1125         ret = regcache_sync(chip->regmap);
1126         if (ret != 0) {
1127                 dev_err(dev, "Failed to restore register map: %d\n", ret);
1128                 return ret;
1129         }
1130
1131         return 0;
1132 }
1133 #endif
1134
1135 /* convenience to stop overlong match-table lines */
1136 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1137 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1138
1139 static const struct of_device_id pca953x_dt_ids[] = {
1140         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1141         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1142         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1143         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1144         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1145         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1146         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1147         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1148         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1149         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1150         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1151         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1152         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1153         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1154
1155         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1156         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1157
1158         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1159         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1160         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1161         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1162         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1163
1164         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1165         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1166         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1167         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1168         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1169
1170         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1171
1172         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1173         { }
1174 };
1175
1176 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1177
1178 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1179
1180 static struct i2c_driver pca953x_driver = {
1181         .driver = {
1182                 .name   = "pca953x",
1183                 .pm     = &pca953x_pm_ops,
1184                 .of_match_table = pca953x_dt_ids,
1185                 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1186         },
1187         .probe          = pca953x_probe,
1188         .remove         = pca953x_remove,
1189         .id_table       = pca953x_id,
1190 };
1191
1192 static int __init pca953x_init(void)
1193 {
1194         return i2c_add_driver(&pca953x_driver);
1195 }
1196 /* register after i2c postcore initcall and before
1197  * subsys initcalls that may rely on these GPIOs
1198  */
1199 subsys_initcall(pca953x_init);
1200
1201 static void __exit pca953x_exit(void)
1202 {
1203         i2c_del_driver(&pca953x_driver);
1204 }
1205 module_exit(pca953x_exit);
1206
1207 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1208 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1209 MODULE_LICENSE("GPL");