1 // SPDX-License-Identifier: GPL-2.0-only
3 * PCA953x 4/8/16/24/40 bit I/O ports
5 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
6 * Copyright (C) 2007 Marvell International Ltd.
8 * Derived from drivers/i2c/chips/pca9539.c
11 #include <linux/acpi.h>
12 #include <linux/bitmap.h>
13 #include <linux/gpio/driver.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/module.h>
19 #include <linux/of_platform.h>
20 #include <linux/platform_data/pca953x.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
25 #include <asm/unaligned.h>
27 #define PCA953X_INPUT 0x00
28 #define PCA953X_OUTPUT 0x01
29 #define PCA953X_INVERT 0x02
30 #define PCA953X_DIRECTION 0x03
32 #define REG_ADDR_MASK GENMASK(5, 0)
33 #define REG_ADDR_EXT BIT(6)
34 #define REG_ADDR_AI BIT(7)
36 #define PCA957X_IN 0x00
37 #define PCA957X_INVRT 0x01
38 #define PCA957X_BKEN 0x02
39 #define PCA957X_PUPD 0x03
40 #define PCA957X_CFG 0x04
41 #define PCA957X_OUT 0x05
42 #define PCA957X_MSK 0x06
43 #define PCA957X_INTS 0x07
45 #define PCAL953X_OUT_STRENGTH 0x20
46 #define PCAL953X_IN_LATCH 0x22
47 #define PCAL953X_PULL_EN 0x23
48 #define PCAL953X_PULL_SEL 0x24
49 #define PCAL953X_INT_MASK 0x25
50 #define PCAL953X_INT_STAT 0x26
51 #define PCAL953X_OUT_CONF 0x27
53 #define PCAL6524_INT_EDGE 0x28
54 #define PCAL6524_INT_CLR 0x2a
55 #define PCAL6524_IN_STATUS 0x2b
56 #define PCAL6524_OUT_INDCONF 0x2c
57 #define PCAL6524_DEBOUNCE 0x2d
59 #define PCA_GPIO_MASK GENMASK(7, 0)
61 #define PCAL_GPIO_MASK GENMASK(4, 0)
62 #define PCAL_PINCTRL_MASK GENMASK(6, 5)
64 #define PCA_INT BIT(8)
65 #define PCA_PCAL BIT(9)
66 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
67 #define PCA953X_TYPE BIT(12)
68 #define PCA957X_TYPE BIT(13)
69 #define PCA_TYPE_MASK GENMASK(15, 12)
71 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
73 static const struct i2c_device_id pca953x_id[] = {
74 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
75 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
76 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
77 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
78 { "pca9536", 4 | PCA953X_TYPE, },
79 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
80 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
81 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
82 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
83 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
84 { "pca9556", 8 | PCA953X_TYPE, },
85 { "pca9557", 8 | PCA953X_TYPE, },
86 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
87 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
88 { "pca9698", 40 | PCA953X_TYPE, },
90 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
91 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
92 { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
93 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
95 { "max7310", 8 | PCA953X_TYPE, },
96 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
97 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
98 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
99 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
100 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
101 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
102 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
103 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
104 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
105 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
106 { "xra1202", 8 | PCA953X_TYPE },
109 MODULE_DEVICE_TABLE(i2c, pca953x_id);
111 #ifdef CONFIG_GPIO_PCA953X_IRQ
113 #include <linux/dmi.h>
114 #include <linux/gpio.h>
115 #include <linux/list.h>
117 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = {
120 * On Intel Galileo Gen 2 board the IRQ pin of one of
121 * the I²C GPIO expanders, which has GpioInt() resource,
122 * is provided as an absolute number instead of being
123 * relative. Since first controller (gpio-sch.c) and
124 * second (gpio-dwapb.c) are at the fixed bases, we may
125 * safely refer to the number in the global space to get
129 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
136 static int pca953x_acpi_get_pin(struct acpi_resource *ares, void *data)
138 struct acpi_resource_gpio *agpio;
141 if (acpi_gpio_get_irq_resource(ares, &agpio))
142 *pin = agpio->pin_table[0];
146 static int pca953x_acpi_find_pin(struct device *dev)
148 struct acpi_device *adev = ACPI_COMPANION(dev);
149 int pin = -ENOENT, ret;
152 ret = acpi_dev_get_resources(adev, &r, pca953x_acpi_get_pin, &pin);
153 acpi_dev_free_resource_list(&r);
160 static inline int pca953x_acpi_find_pin(struct device *dev) { return -ENXIO; }
163 static int pca953x_acpi_get_irq(struct device *dev)
167 pin = pca953x_acpi_find_pin(dev);
171 dev_info(dev, "Applying ACPI interrupt quirk (GPIO %d)\n", pin);
173 if (!gpio_is_valid(pin))
176 ret = gpio_request(pin, "pca953x interrupt");
180 ret = gpio_to_irq(pin);
182 /* When pin is used as an IRQ, no need to keep it requested */
189 static const struct acpi_device_id pca953x_acpi_ids[] = {
190 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
193 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
197 #define MAX_LINE (MAX_BANK * BANK_SZ)
199 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
201 struct pca953x_reg_config {
208 static const struct pca953x_reg_config pca953x_regs = {
209 .direction = PCA953X_DIRECTION,
210 .output = PCA953X_OUTPUT,
211 .input = PCA953X_INPUT,
212 .invert = PCA953X_INVERT,
215 static const struct pca953x_reg_config pca957x_regs = {
216 .direction = PCA957X_CFG,
217 .output = PCA957X_OUT,
219 .invert = PCA957X_INVRT,
222 struct pca953x_chip {
224 struct mutex i2c_lock;
225 struct regmap *regmap;
227 #ifdef CONFIG_GPIO_PCA953X_IRQ
228 struct mutex irq_lock;
229 DECLARE_BITMAP(irq_mask, MAX_LINE);
230 DECLARE_BITMAP(irq_stat, MAX_LINE);
231 DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
232 DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
233 struct irq_chip irq_chip;
235 atomic_t wakeup_path;
237 struct i2c_client *client;
238 struct gpio_chip gpio_chip;
239 const char *const *names;
240 unsigned long driver_data;
241 struct regulator *regulator;
243 const struct pca953x_reg_config *regs;
246 static int pca953x_bank_shift(struct pca953x_chip *chip)
248 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
251 #define PCA953x_BANK_INPUT BIT(0)
252 #define PCA953x_BANK_OUTPUT BIT(1)
253 #define PCA953x_BANK_POLARITY BIT(2)
254 #define PCA953x_BANK_CONFIG BIT(3)
256 #define PCA957x_BANK_INPUT BIT(0)
257 #define PCA957x_BANK_POLARITY BIT(1)
258 #define PCA957x_BANK_BUSHOLD BIT(2)
259 #define PCA957x_BANK_CONFIG BIT(4)
260 #define PCA957x_BANK_OUTPUT BIT(5)
262 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2)
263 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3)
264 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4)
265 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5)
266 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6)
269 * We care about the following registers:
270 * - Standard set, below 0x40, each port can be replicated up to 8 times
272 * Input port 0x00 + 0 * bank_size R
273 * Output port 0x00 + 1 * bank_size RW
274 * Polarity Inversion port 0x00 + 2 * bank_size RW
275 * Configuration port 0x00 + 3 * bank_size RW
276 * - PCA957x with mixed up registers
277 * Input port 0x00 + 0 * bank_size R
278 * Polarity Inversion port 0x00 + 1 * bank_size RW
279 * Bus hold port 0x00 + 2 * bank_size RW
280 * Configuration port 0x00 + 4 * bank_size RW
281 * Output port 0x00 + 5 * bank_size RW
283 * - Extended set, above 0x40, often chip specific.
284 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
285 * Input latch register 0x40 + 2 * bank_size RW
286 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW
287 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW
288 * Interrupt mask register 0x40 + 5 * bank_size RW
289 * Interrupt status register 0x40 + 6 * bank_size R
291 * - Registers with bit 0x80 set, the AI bit
292 * The bit is cleared and the registers fall into one of the
296 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
299 int bank_shift = pca953x_bank_shift(chip);
300 int bank = (reg & REG_ADDR_MASK) >> bank_shift;
301 int offset = reg & (BIT(bank_shift) - 1);
303 /* Special PCAL extended register check. */
304 if (reg & REG_ADDR_EXT) {
305 if (!(chip->driver_data & PCA_PCAL))
310 /* Register is not in the matching bank. */
311 if (!(BIT(bank) & checkbank))
314 /* Register is not within allowed range of bank. */
315 if (offset >= NBANK(chip))
321 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
323 struct pca953x_chip *chip = dev_get_drvdata(dev);
326 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
327 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
328 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
330 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
331 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
332 PCA957x_BANK_BUSHOLD;
335 if (chip->driver_data & PCA_PCAL) {
336 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
337 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
338 PCAL9xxx_BANK_IRQ_STAT;
341 return pca953x_check_register(chip, reg, bank);
344 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
346 struct pca953x_chip *chip = dev_get_drvdata(dev);
349 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
350 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
353 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
354 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
357 if (chip->driver_data & PCA_PCAL)
358 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
359 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
361 return pca953x_check_register(chip, reg, bank);
364 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
366 struct pca953x_chip *chip = dev_get_drvdata(dev);
369 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
370 bank = PCA953x_BANK_INPUT;
372 bank = PCA957x_BANK_INPUT;
374 if (chip->driver_data & PCA_PCAL)
375 bank |= PCAL9xxx_BANK_IRQ_STAT;
377 return pca953x_check_register(chip, reg, bank);
380 static const struct regmap_config pca953x_i2c_regmap = {
384 .readable_reg = pca953x_readable_register,
385 .writeable_reg = pca953x_writeable_register,
386 .volatile_reg = pca953x_volatile_register,
388 .disable_locking = true,
389 .cache_type = REGCACHE_RBTREE,
390 .max_register = 0x7f,
393 static const struct regmap_config pca953x_ai_i2c_regmap = {
397 .read_flag_mask = REG_ADDR_AI,
398 .write_flag_mask = REG_ADDR_AI,
400 .readable_reg = pca953x_readable_register,
401 .writeable_reg = pca953x_writeable_register,
402 .volatile_reg = pca953x_volatile_register,
404 .disable_locking = true,
405 .cache_type = REGCACHE_RBTREE,
406 .max_register = 0x7f,
409 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off)
411 int bank_shift = pca953x_bank_shift(chip);
412 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
413 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
414 u8 regaddr = pinctrl | addr | (off / BANK_SZ);
419 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
421 u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
425 for (i = 0; i < NBANK(chip); i++)
426 value[i] = bitmap_get_value8(val, i * BANK_SZ);
428 ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
430 dev_err(&chip->client->dev, "failed writing register\n");
437 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
439 u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
443 ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip));
445 dev_err(&chip->client->dev, "failed reading register\n");
449 for (i = 0; i < NBANK(chip); i++)
450 bitmap_set_value8(val, value[i], i * BANK_SZ);
455 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
457 struct pca953x_chip *chip = gpiochip_get_data(gc);
458 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
459 u8 bit = BIT(off % BANK_SZ);
462 mutex_lock(&chip->i2c_lock);
463 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
464 mutex_unlock(&chip->i2c_lock);
468 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
469 unsigned off, int val)
471 struct pca953x_chip *chip = gpiochip_get_data(gc);
472 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
473 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
474 u8 bit = BIT(off % BANK_SZ);
477 mutex_lock(&chip->i2c_lock);
478 /* set output level */
479 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
484 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
486 mutex_unlock(&chip->i2c_lock);
490 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
492 struct pca953x_chip *chip = gpiochip_get_data(gc);
493 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off);
494 u8 bit = BIT(off % BANK_SZ);
498 mutex_lock(&chip->i2c_lock);
499 ret = regmap_read(chip->regmap, inreg, ®_val);
500 mutex_unlock(&chip->i2c_lock);
504 * diagnostic already emitted; that's all we should
505 * do unless gpio_*_value_cansleep() calls become different
506 * from their nonsleeping siblings (and report faults).
511 return !!(reg_val & bit);
514 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
516 struct pca953x_chip *chip = gpiochip_get_data(gc);
517 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
518 u8 bit = BIT(off % BANK_SZ);
520 mutex_lock(&chip->i2c_lock);
521 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
522 mutex_unlock(&chip->i2c_lock);
525 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
527 struct pca953x_chip *chip = gpiochip_get_data(gc);
528 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
529 u8 bit = BIT(off % BANK_SZ);
533 mutex_lock(&chip->i2c_lock);
534 ret = regmap_read(chip->regmap, dirreg, ®_val);
535 mutex_unlock(&chip->i2c_lock);
540 return GPIO_LINE_DIRECTION_IN;
542 return GPIO_LINE_DIRECTION_OUT;
545 static int pca953x_gpio_get_multiple(struct gpio_chip *gc,
546 unsigned long *mask, unsigned long *bits)
548 struct pca953x_chip *chip = gpiochip_get_data(gc);
549 DECLARE_BITMAP(reg_val, MAX_LINE);
552 mutex_lock(&chip->i2c_lock);
553 ret = pca953x_read_regs(chip, chip->regs->input, reg_val);
554 mutex_unlock(&chip->i2c_lock);
558 bitmap_replace(bits, bits, reg_val, mask, gc->ngpio);
562 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
563 unsigned long *mask, unsigned long *bits)
565 struct pca953x_chip *chip = gpiochip_get_data(gc);
566 DECLARE_BITMAP(reg_val, MAX_LINE);
569 mutex_lock(&chip->i2c_lock);
570 ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
574 bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio);
576 pca953x_write_regs(chip, chip->regs->output, reg_val);
578 mutex_unlock(&chip->i2c_lock);
581 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
583 unsigned long config)
585 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset);
586 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset);
587 u8 bit = BIT(offset % BANK_SZ);
591 * pull-up/pull-down configuration requires PCAL extended
594 if (!(chip->driver_data & PCA_PCAL))
597 mutex_lock(&chip->i2c_lock);
599 /* Disable pull-up/pull-down */
600 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
604 /* Configure pull-up/pull-down */
605 if (config == PIN_CONFIG_BIAS_PULL_UP)
606 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
607 else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
608 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
612 /* Enable pull-up/pull-down */
613 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
616 mutex_unlock(&chip->i2c_lock);
620 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
621 unsigned long config)
623 struct pca953x_chip *chip = gpiochip_get_data(gc);
625 switch (pinconf_to_config_param(config)) {
626 case PIN_CONFIG_BIAS_PULL_UP:
627 case PIN_CONFIG_BIAS_PULL_DOWN:
628 return pca953x_gpio_set_pull_up_down(chip, offset, config);
634 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
636 struct gpio_chip *gc;
638 gc = &chip->gpio_chip;
640 gc->direction_input = pca953x_gpio_direction_input;
641 gc->direction_output = pca953x_gpio_direction_output;
642 gc->get = pca953x_gpio_get_value;
643 gc->set = pca953x_gpio_set_value;
644 gc->get_direction = pca953x_gpio_get_direction;
645 gc->get_multiple = pca953x_gpio_get_multiple;
646 gc->set_multiple = pca953x_gpio_set_multiple;
647 gc->set_config = pca953x_gpio_set_config;
648 gc->can_sleep = true;
650 gc->base = chip->gpio_start;
652 gc->label = dev_name(&chip->client->dev);
653 gc->parent = &chip->client->dev;
654 gc->owner = THIS_MODULE;
655 gc->names = chip->names;
658 #ifdef CONFIG_GPIO_PCA953X_IRQ
659 static void pca953x_irq_mask(struct irq_data *d)
661 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
662 struct pca953x_chip *chip = gpiochip_get_data(gc);
663 irq_hw_number_t hwirq = irqd_to_hwirq(d);
665 clear_bit(hwirq, chip->irq_mask);
668 static void pca953x_irq_unmask(struct irq_data *d)
670 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
671 struct pca953x_chip *chip = gpiochip_get_data(gc);
672 irq_hw_number_t hwirq = irqd_to_hwirq(d);
674 set_bit(hwirq, chip->irq_mask);
677 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
679 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
680 struct pca953x_chip *chip = gpiochip_get_data(gc);
683 atomic_inc(&chip->wakeup_path);
685 atomic_dec(&chip->wakeup_path);
687 return irq_set_irq_wake(chip->client->irq, on);
690 static void pca953x_irq_bus_lock(struct irq_data *d)
692 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
693 struct pca953x_chip *chip = gpiochip_get_data(gc);
695 mutex_lock(&chip->irq_lock);
698 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
700 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
701 struct pca953x_chip *chip = gpiochip_get_data(gc);
702 DECLARE_BITMAP(irq_mask, MAX_LINE);
703 DECLARE_BITMAP(reg_direction, MAX_LINE);
706 if (chip->driver_data & PCA_PCAL) {
707 /* Enable latch on interrupt-enabled inputs */
708 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
710 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
712 /* Unmask enabled interrupts */
713 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
716 /* Switch direction to input if needed */
717 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
719 bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
720 bitmap_complement(reg_direction, reg_direction, gc->ngpio);
721 bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);
723 /* Look for any newly setup interrupt */
724 for_each_set_bit(level, irq_mask, gc->ngpio)
725 pca953x_gpio_direction_input(&chip->gpio_chip, level);
727 mutex_unlock(&chip->irq_lock);
730 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
732 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
733 struct pca953x_chip *chip = gpiochip_get_data(gc);
734 irq_hw_number_t hwirq = irqd_to_hwirq(d);
736 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
737 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
742 assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING);
743 assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING);
748 static void pca953x_irq_shutdown(struct irq_data *d)
750 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
751 struct pca953x_chip *chip = gpiochip_get_data(gc);
752 irq_hw_number_t hwirq = irqd_to_hwirq(d);
754 clear_bit(hwirq, chip->irq_trig_raise);
755 clear_bit(hwirq, chip->irq_trig_fall);
758 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending)
760 struct gpio_chip *gc = &chip->gpio_chip;
761 DECLARE_BITMAP(reg_direction, MAX_LINE);
762 DECLARE_BITMAP(old_stat, MAX_LINE);
763 DECLARE_BITMAP(cur_stat, MAX_LINE);
764 DECLARE_BITMAP(new_stat, MAX_LINE);
765 DECLARE_BITMAP(trigger, MAX_LINE);
768 if (chip->driver_data & PCA_PCAL) {
769 /* Read the current interrupt status from the device */
770 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
774 /* Check latched inputs and clear interrupt status */
775 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
779 /* Apply filter for rising/falling edge selection */
780 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio);
782 bitmap_and(pending, new_stat, trigger, gc->ngpio);
784 return !bitmap_empty(pending, gc->ngpio);
787 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
791 /* Remove output pins from the equation */
792 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
794 bitmap_copy(old_stat, chip->irq_stat, gc->ngpio);
796 bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio);
797 bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio);
798 bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
800 if (bitmap_empty(trigger, gc->ngpio))
803 bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
805 bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
806 bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
807 bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio);
808 bitmap_and(pending, new_stat, trigger, gc->ngpio);
810 return !bitmap_empty(pending, gc->ngpio);
813 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
815 struct pca953x_chip *chip = devid;
816 struct gpio_chip *gc = &chip->gpio_chip;
817 DECLARE_BITMAP(pending, MAX_LINE);
821 mutex_lock(&chip->i2c_lock);
822 ret = pca953x_irq_pending(chip, pending);
823 mutex_unlock(&chip->i2c_lock);
825 for_each_set_bit(level, pending, gc->ngpio)
826 handle_nested_irq(irq_find_mapping(gc->irq.domain, level));
828 return IRQ_RETVAL(ret);
831 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)
833 struct i2c_client *client = chip->client;
834 struct irq_chip *irq_chip = &chip->irq_chip;
835 DECLARE_BITMAP(reg_direction, MAX_LINE);
836 DECLARE_BITMAP(irq_stat, MAX_LINE);
837 struct gpio_irq_chip *girq;
840 if (dmi_first_match(pca953x_dmi_acpi_irq_info)) {
841 ret = pca953x_acpi_get_irq(&client->dev);
852 if (!(chip->driver_data & PCA_INT))
855 ret = pca953x_read_regs(chip, chip->regs->input, irq_stat);
860 * There is no way to know which GPIO line generated the
861 * interrupt. We have to rely on the previous read for
864 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
865 bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio);
866 mutex_init(&chip->irq_lock);
868 irq_chip->name = dev_name(&client->dev);
869 irq_chip->irq_mask = pca953x_irq_mask;
870 irq_chip->irq_unmask = pca953x_irq_unmask;
871 irq_chip->irq_set_wake = pca953x_irq_set_wake;
872 irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
873 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
874 irq_chip->irq_set_type = pca953x_irq_set_type;
875 irq_chip->irq_shutdown = pca953x_irq_shutdown;
877 girq = &chip->gpio_chip.irq;
878 girq->chip = irq_chip;
879 /* This will let us handle the parent IRQ in the driver */
880 girq->parent_handler = NULL;
881 girq->num_parents = 0;
882 girq->parents = NULL;
883 girq->default_type = IRQ_TYPE_NONE;
884 girq->handler = handle_simple_irq;
885 girq->threaded = true;
886 girq->first = irq_base; /* FIXME: get rid of this */
888 ret = devm_request_threaded_irq(&client->dev, client->irq,
889 NULL, pca953x_irq_handler,
890 IRQF_ONESHOT | IRQF_SHARED,
891 dev_name(&client->dev), chip);
893 dev_err(&client->dev, "failed to request irq %d\n",
901 #else /* CONFIG_GPIO_PCA953X_IRQ */
902 static int pca953x_irq_setup(struct pca953x_chip *chip,
905 struct i2c_client *client = chip->client;
907 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
908 dev_warn(&client->dev, "interrupt support not compiled in\n");
914 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
916 DECLARE_BITMAP(val, MAX_LINE);
919 ret = regcache_sync_region(chip->regmap, chip->regs->output,
920 chip->regs->output + NBANK(chip));
924 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
925 chip->regs->direction + NBANK(chip));
929 /* set platform specific polarity inversion */
931 bitmap_fill(val, MAX_LINE);
933 bitmap_zero(val, MAX_LINE);
935 ret = pca953x_write_regs(chip, chip->regs->invert, val);
940 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
942 DECLARE_BITMAP(val, MAX_LINE);
945 ret = device_pca95xx_init(chip, invert);
949 /* To enable register 6, 7 to control pull up and pull down */
950 memset(val, 0x02, NBANK(chip));
951 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
960 static int pca953x_probe(struct i2c_client *client,
961 const struct i2c_device_id *i2c_id)
963 struct pca953x_platform_data *pdata;
964 struct pca953x_chip *chip;
968 struct regulator *reg;
969 const struct regmap_config *regmap_config;
971 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
975 pdata = dev_get_platdata(&client->dev);
977 irq_base = pdata->irq_base;
978 chip->gpio_start = pdata->gpio_base;
979 invert = pdata->invert;
980 chip->names = pdata->names;
982 struct gpio_desc *reset_gpio;
984 chip->gpio_start = -1;
988 * See if we need to de-assert a reset pin.
990 * There is no known ACPI-enabled platforms that are
991 * using "reset" GPIO. Otherwise any of those platform
992 * must use _DSD method with corresponding property.
994 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
996 if (IS_ERR(reset_gpio))
997 return PTR_ERR(reset_gpio);
1000 chip->client = client;
1002 reg = devm_regulator_get(&client->dev, "vcc");
1005 if (ret != -EPROBE_DEFER)
1006 dev_err(&client->dev, "reg get err: %d\n", ret);
1009 ret = regulator_enable(reg);
1011 dev_err(&client->dev, "reg en err: %d\n", ret);
1014 chip->regulator = reg;
1017 chip->driver_data = i2c_id->driver_data;
1021 match = device_get_match_data(&client->dev);
1027 chip->driver_data = (uintptr_t)match;
1030 i2c_set_clientdata(client, chip);
1032 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
1034 if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
1035 dev_info(&client->dev, "using AI\n");
1036 regmap_config = &pca953x_ai_i2c_regmap;
1038 dev_info(&client->dev, "using no AI\n");
1039 regmap_config = &pca953x_i2c_regmap;
1042 chip->regmap = devm_regmap_init_i2c(client, regmap_config);
1043 if (IS_ERR(chip->regmap)) {
1044 ret = PTR_ERR(chip->regmap);
1048 regcache_mark_dirty(chip->regmap);
1050 mutex_init(&chip->i2c_lock);
1052 * In case we have an i2c-mux controlled by a GPIO provided by an
1053 * expander using the same driver higher on the device tree, read the
1054 * i2c adapter nesting depth and use the retrieved value as lockdep
1055 * subclass for chip->i2c_lock.
1057 * REVISIT: This solution is not complete. It protects us from lockdep
1058 * false positives when the expander controlling the i2c-mux is on
1059 * a different level on the device tree, but not when it's on the same
1060 * level on a different branch (in which case the subclass number
1061 * would be the same).
1063 * TODO: Once a correct solution is developed, a similar fix should be
1064 * applied to all other i2c-controlled GPIO expanders (and potentially
1067 lockdep_set_subclass(&chip->i2c_lock,
1068 i2c_adapter_depth(client->adapter));
1070 /* initialize cached registers from their original values.
1071 * we can't share this chip with another i2c master.
1074 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1075 chip->regs = &pca953x_regs;
1076 ret = device_pca95xx_init(chip, invert);
1078 chip->regs = &pca957x_regs;
1079 ret = device_pca957x_init(chip, invert);
1084 ret = pca953x_irq_setup(chip, irq_base);
1088 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1092 if (pdata && pdata->setup) {
1093 ret = pdata->setup(client, chip->gpio_chip.base,
1094 chip->gpio_chip.ngpio, pdata->context);
1096 dev_warn(&client->dev, "setup failed, %d\n", ret);
1102 regulator_disable(chip->regulator);
1106 static int pca953x_remove(struct i2c_client *client)
1108 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1109 struct pca953x_chip *chip = i2c_get_clientdata(client);
1112 if (pdata && pdata->teardown) {
1113 ret = pdata->teardown(client, chip->gpio_chip.base,
1114 chip->gpio_chip.ngpio, pdata->context);
1116 dev_err(&client->dev, "teardown failed, %d\n", ret);
1121 regulator_disable(chip->regulator);
1126 #ifdef CONFIG_PM_SLEEP
1127 static int pca953x_regcache_sync(struct device *dev)
1129 struct pca953x_chip *chip = dev_get_drvdata(dev);
1133 * The ordering between direction and output is important,
1134 * sync these registers first and only then sync the rest.
1136 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1137 chip->regs->direction + NBANK(chip));
1139 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1143 ret = regcache_sync_region(chip->regmap, chip->regs->output,
1144 chip->regs->output + NBANK(chip));
1146 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1150 #ifdef CONFIG_GPIO_PCA953X_IRQ
1151 if (chip->driver_data & PCA_PCAL) {
1152 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1153 PCAL953X_IN_LATCH + NBANK(chip));
1155 dev_err(dev, "Failed to sync INT latch registers: %d\n",
1160 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1161 PCAL953X_INT_MASK + NBANK(chip));
1163 dev_err(dev, "Failed to sync INT mask registers: %d\n",
1173 static int pca953x_suspend(struct device *dev)
1175 struct pca953x_chip *chip = dev_get_drvdata(dev);
1177 regcache_cache_only(chip->regmap, true);
1179 if (atomic_read(&chip->wakeup_path))
1180 device_set_wakeup_path(dev);
1182 regulator_disable(chip->regulator);
1187 static int pca953x_resume(struct device *dev)
1189 struct pca953x_chip *chip = dev_get_drvdata(dev);
1192 if (!atomic_read(&chip->wakeup_path)) {
1193 ret = regulator_enable(chip->regulator);
1195 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1200 regcache_cache_only(chip->regmap, false);
1201 regcache_mark_dirty(chip->regmap);
1202 ret = pca953x_regcache_sync(dev);
1206 ret = regcache_sync(chip->regmap);
1208 dev_err(dev, "Failed to restore register map: %d\n", ret);
1216 /* convenience to stop overlong match-table lines */
1217 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1218 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1220 static const struct of_device_id pca953x_dt_ids[] = {
1221 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1222 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1223 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1224 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1225 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1226 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1227 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1228 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1229 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1230 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1231 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1232 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1233 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1234 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1235 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1237 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1238 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1239 { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), },
1240 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1242 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1243 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1244 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1245 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1246 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1248 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1249 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1250 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1251 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1252 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1253 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1255 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1256 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1258 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1262 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1264 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1266 static struct i2c_driver pca953x_driver = {
1269 .pm = &pca953x_pm_ops,
1270 .of_match_table = pca953x_dt_ids,
1271 .acpi_match_table = pca953x_acpi_ids,
1273 .probe = pca953x_probe,
1274 .remove = pca953x_remove,
1275 .id_table = pca953x_id,
1278 static int __init pca953x_init(void)
1280 return i2c_add_driver(&pca953x_driver);
1282 /* register after i2c postcore initcall and before
1283 * subsys initcalls that may rely on these GPIOs
1285 subsys_initcall(pca953x_init);
1287 static void __exit pca953x_exit(void)
1289 i2c_del_driver(&pca953x_driver);
1291 module_exit(pca953x_exit);
1293 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1294 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1295 MODULE_LICENSE("GPL");