drivers/gpio/gpio-pca953x.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  PCA953x 4/8/16/24/40 bit I/O ports
   4  *
   5  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
   6  *  Copyright (C) 2007 Marvell International Ltd.
   7  *
   8  *  Derived from drivers/i2c/chips/pca9539.c
   9  */
  10
  11 #include <linux/acpi.h>
  12 #include <linux/bitmap.h>
  13 #include <linux/gpio/driver.h>
  14 #include <linux/gpio/consumer.h>
  15 #include <linux/i2c.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/module.h>
  19 #include <linux/of_platform.h>
  20 #include <linux/platform_data/pca953x.h>
  21 #include <linux/regmap.h>
  22 #include <linux/regulator/consumer.h>
  23 #include <linux/slab.h>
  24
  25 #include <asm/unaligned.h>
  26
  27 #define PCA953X_INPUT           0x00
  28 #define PCA953X_OUTPUT          0x01
  29 #define PCA953X_INVERT          0x02
  30 #define PCA953X_DIRECTION       0x03
  31
  32 #define REG_ADDR_MASK           GENMASK(5, 0)
  33 #define REG_ADDR_EXT            BIT(6)
  34 #define REG_ADDR_AI             BIT(7)
  35
  36 #define PCA957X_IN              0x00
  37 #define PCA957X_INVRT           0x01
  38 #define PCA957X_BKEN            0x02
  39 #define PCA957X_PUPD            0x03
  40 #define PCA957X_CFG             0x04
  41 #define PCA957X_OUT             0x05
  42 #define PCA957X_MSK             0x06
  43 #define PCA957X_INTS            0x07
  44
  45 #define PCAL953X_OUT_STRENGTH   0x20
  46 #define PCAL953X_IN_LATCH       0x22
  47 #define PCAL953X_PULL_EN        0x23
  48 #define PCAL953X_PULL_SEL       0x24
  49 #define PCAL953X_INT_MASK       0x25
  50 #define PCAL953X_INT_STAT       0x26
  51 #define PCAL953X_OUT_CONF       0x27
  52
  53 #define PCAL6524_INT_EDGE       0x28
  54 #define PCAL6524_INT_CLR        0x2a
  55 #define PCAL6524_IN_STATUS      0x2b
  56 #define PCAL6524_OUT_INDCONF    0x2c
  57 #define PCAL6524_DEBOUNCE       0x2d
  58
  59 #define PCA_GPIO_MASK           GENMASK(7, 0)
  60
  61 #define PCAL_GPIO_MASK          GENMASK(4, 0)
  62 #define PCAL_PINCTRL_MASK       GENMASK(6, 5)
  63
  64 #define PCA_INT                 BIT(8)
  65 #define PCA_PCAL                BIT(9)
  66 #define PCA_LATCH_INT           (PCA_PCAL | PCA_INT)
  67 #define PCA953X_TYPE            BIT(12)
  68 #define PCA957X_TYPE            BIT(13)
  69 #define PCA_TYPE_MASK           GENMASK(15, 12)
  70
  71 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
  72
  73 static const struct i2c_device_id pca953x_id[] = {
  74         { "pca6408", 8  | PCA953X_TYPE | PCA_INT, },
  75         { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
  76         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
  77         { "pca9506", 40 | PCA953X_TYPE | PCA_INT, },
  78         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
  79         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  80         { "pca9536", 4  | PCA953X_TYPE, },
  81         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
  82         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
  83         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  84         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
  85         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  86         { "pca9556", 8  | PCA953X_TYPE, },
  87         { "pca9557", 8  | PCA953X_TYPE, },
  88         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
  89         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  90         { "pca9698", 40 | PCA953X_TYPE, },
  91
  92         { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  93         { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
  94         { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  95         { "pcal9554b", 8  | PCA953X_TYPE | PCA_LATCH_INT, },
  96         { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  97
  98         { "max7310", 8  | PCA953X_TYPE, },
  99         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
 100         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
 101         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
 102         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
 103         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
 104         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
 105         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
 106         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
 107         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
 108         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
 109         { "xra1202", 8  | PCA953X_TYPE },
 110         { }
 111 };
 112 MODULE_DEVICE_TABLE(i2c, pca953x_id);
 113
 114 #ifdef CONFIG_GPIO_PCA953X_IRQ
 115
 116 #include <linux/dmi.h>
 117
 118 static const struct acpi_gpio_params pca953x_irq_gpios = { 0, 0, true };
 119
 120 static const struct acpi_gpio_mapping pca953x_acpi_irq_gpios[] = {
 121         { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
 122         { }
 123 };
 124
 125 static int pca953x_acpi_get_irq(struct device *dev)
 126 {
 127         int ret;
 128
 129         ret = devm_acpi_dev_add_driver_gpios(dev, pca953x_acpi_irq_gpios);
 130         if (ret)
 131                 dev_warn(dev, "can't add GPIO ACPI mapping\n");
 132
 133         ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0);
 134         if (ret < 0)
 135                 return ret;
 136
 137         dev_info(dev, "ACPI interrupt quirk (IRQ %d)\n", ret);
 138         return ret;
 139 }
 140
 141 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = {
 142         {
 143                 /*
 144                  * On Intel Galileo Gen 2 board the IRQ pin of one of
 145                  * the I²C GPIO expanders, which has GpioInt() resource,
 146                  * is provided as an absolute number instead of being
 147                  * relative. Since first controller (gpio-sch.c) and
 148                  * second (gpio-dwapb.c) are at the fixed bases, we may
 149                  * safely refer to the number in the global space to get
 150                  * an IRQ out of it.
 151                  */
 152                 .matches = {
 153                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
 154                 },
 155         },
 156         {}
 157 };
 158 #endif
 159
 160 static const struct acpi_device_id pca953x_acpi_ids[] = {
 161         { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
 162         { }
 163 };
 164 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
 165
 166 #define MAX_BANK 5
 167 #define BANK_SZ 8
 168 #define MAX_LINE        (MAX_BANK * BANK_SZ)
 169
 170 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
 171
 172 struct pca953x_reg_config {
 173         int direction;
 174         int output;
 175         int input;
 176         int invert;
 177 };
 178
 179 static const struct pca953x_reg_config pca953x_regs = {
 180         .direction = PCA953X_DIRECTION,
 181         .output = PCA953X_OUTPUT,
 182         .input = PCA953X_INPUT,
 183         .invert = PCA953X_INVERT,
 184 };
 185
 186 static const struct pca953x_reg_config pca957x_regs = {
 187         .direction = PCA957X_CFG,
 188         .output = PCA957X_OUT,
 189         .input = PCA957X_IN,
 190         .invert = PCA957X_INVRT,
 191 };
 192
 193 struct pca953x_chip {
 194         unsigned gpio_start;
 195         struct mutex i2c_lock;
 196         struct regmap *regmap;
 197
 198 #ifdef CONFIG_GPIO_PCA953X_IRQ
 199         struct mutex irq_lock;
 200         DECLARE_BITMAP(irq_mask, MAX_LINE);
 201         DECLARE_BITMAP(irq_stat, MAX_LINE);
 202         DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
 203         DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
 204 #endif
 205         atomic_t wakeup_path;
 206
 207         struct i2c_client *client;
 208         struct gpio_chip gpio_chip;
 209         const char *const *names;
 210         unsigned long driver_data;
 211         struct regulator *regulator;
 212
 213         const struct pca953x_reg_config *regs;
 214 };
 215
 216 static int pca953x_bank_shift(struct pca953x_chip *chip)
 217 {
 218         return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 219 }
 220
 221 #define PCA953x_BANK_INPUT      BIT(0)
 222 #define PCA953x_BANK_OUTPUT     BIT(1)
 223 #define PCA953x_BANK_POLARITY   BIT(2)
 224 #define PCA953x_BANK_CONFIG     BIT(3)
 225
 226 #define PCA957x_BANK_INPUT      BIT(0)
 227 #define PCA957x_BANK_POLARITY   BIT(1)
 228 #define PCA957x_BANK_BUSHOLD    BIT(2)
 229 #define PCA957x_BANK_CONFIG     BIT(4)
 230 #define PCA957x_BANK_OUTPUT     BIT(5)
 231
 232 #define PCAL9xxx_BANK_IN_LATCH  BIT(8 + 2)
 233 #define PCAL9xxx_BANK_PULL_EN   BIT(8 + 3)
 234 #define PCAL9xxx_BANK_PULL_SEL  BIT(8 + 4)
 235 #define PCAL9xxx_BANK_IRQ_MASK  BIT(8 + 5)
 236 #define PCAL9xxx_BANK_IRQ_STAT  BIT(8 + 6)
 237
 238 /*
 239  * We care about the following registers:
 240  * - Standard set, below 0x40, each port can be replicated up to 8 times
 241  *   - PCA953x standard
 242  *     Input port                       0x00 + 0 * bank_size    R
 243  *     Output port                      0x00 + 1 * bank_size    RW
 244  *     Polarity Inversion port          0x00 + 2 * bank_size    RW
 245  *     Configuration port               0x00 + 3 * bank_size    RW
 246  *   - PCA957x with mixed up registers
 247  *     Input port                       0x00 + 0 * bank_size    R
 248  *     Polarity Inversion port          0x00 + 1 * bank_size    RW
 249  *     Bus hold port                    0x00 + 2 * bank_size    RW
 250  *     Configuration port               0x00 + 4 * bank_size    RW
 251  *     Output port                      0x00 + 5 * bank_size    RW
 252  *
 253  * - Extended set, above 0x40, often chip specific.
 254  *   - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
 255  *     Input latch register             0x40 + 2 * bank_size    RW
 256  *     Pull-up/pull-down enable reg     0x40 + 3 * bank_size    RW
 257  *     Pull-up/pull-down select reg     0x40 + 4 * bank_size    RW
 258  *     Interrupt mask register          0x40 + 5 * bank_size    RW
 259  *     Interrupt status register        0x40 + 6 * bank_size    R
 260  *
 261  * - Registers with bit 0x80 set, the AI bit
 262  *   The bit is cleared and the registers fall into one of the
 263  *   categories above.
 264  */
 265
 266 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
 267                                    u32 checkbank)
 268 {
 269         int bank_shift = pca953x_bank_shift(chip);
 270         int bank = (reg & REG_ADDR_MASK) >> bank_shift;
 271         int offset = reg & (BIT(bank_shift) - 1);
 272
 273         /* Special PCAL extended register check. */
 274         if (reg & REG_ADDR_EXT) {
 275                 if (!(chip->driver_data & PCA_PCAL))
 276                         return false;
 277                 bank += 8;
 278         }
 279
 280         /* Register is not in the matching bank. */
 281         if (!(BIT(bank) & checkbank))
 282                 return false;
 283
 284         /* Register is not within allowed range of bank. */
 285         if (offset >= NBANK(chip))
 286                 return false;
 287
 288         return true;
 289 }
 290
 291 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
 292 {
 293         struct pca953x_chip *chip = dev_get_drvdata(dev);
 294         u32 bank;
 295
 296         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 297                 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
 298                        PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
 299         } else {
 300                 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
 301                        PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
 302                        PCA957x_BANK_BUSHOLD;
 303         }
 304
 305         if (chip->driver_data & PCA_PCAL) {
 306                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 307                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
 308                         PCAL9xxx_BANK_IRQ_STAT;
 309         }
 310
 311         return pca953x_check_register(chip, reg, bank);
 312 }
 313
 314 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
 315 {
 316         struct pca953x_chip *chip = dev_get_drvdata(dev);
 317         u32 bank;
 318
 319         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 320                 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
 321                         PCA953x_BANK_CONFIG;
 322         } else {
 323                 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
 324                         PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
 325         }
 326
 327         if (chip->driver_data & PCA_PCAL)
 328                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 329                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
 330
 331         return pca953x_check_register(chip, reg, bank);
 332 }
 333
 334 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
 335 {
 336         struct pca953x_chip *chip = dev_get_drvdata(dev);
 337         u32 bank;
 338
 339         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
 340                 bank = PCA953x_BANK_INPUT;
 341         else
 342                 bank = PCA957x_BANK_INPUT;
 343
 344         if (chip->driver_data & PCA_PCAL)
 345                 bank |= PCAL9xxx_BANK_IRQ_STAT;
 346
 347         return pca953x_check_register(chip, reg, bank);
 348 }
 349
 350 static const struct regmap_config pca953x_i2c_regmap = {
 351         .reg_bits = 8,
 352         .val_bits = 8,
 353
 354         .use_single_read = true,
 355         .use_single_write = true,
 356
 357         .readable_reg = pca953x_readable_register,
 358         .writeable_reg = pca953x_writeable_register,
 359         .volatile_reg = pca953x_volatile_register,
 360
 361         .disable_locking = true,
 362         .cache_type = REGCACHE_RBTREE,
 363         .max_register = 0x7f,
 364 };
 365
 366 static const struct regmap_config pca953x_ai_i2c_regmap = {
 367         .reg_bits = 8,
 368         .val_bits = 8,
 369
 370         .read_flag_mask = REG_ADDR_AI,
 371         .write_flag_mask = REG_ADDR_AI,
 372
 373         .readable_reg = pca953x_readable_register,
 374         .writeable_reg = pca953x_writeable_register,
 375         .volatile_reg = pca953x_volatile_register,
 376
 377         .disable_locking = true,
 378         .cache_type = REGCACHE_RBTREE,
 379         .max_register = 0x7f,
 380 };
 381
 382 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off)
 383 {
 384         int bank_shift = pca953x_bank_shift(chip);
 385         int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
 386         int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 387         u8 regaddr = pinctrl | addr | (off / BANK_SZ);
 388
 389         return regaddr;
 390 }
 391
 392 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
 393 {
 394         u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
 395         u8 value[MAX_BANK];
 396         int i, ret;
 397
 398         for (i = 0; i < NBANK(chip); i++)
 399                 value[i] = bitmap_get_value8(val, i * BANK_SZ);
 400
 401         ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
 402         if (ret < 0) {
 403                 dev_err(&chip->client->dev, "failed writing register\n");
 404                 return ret;
 405         }
 406
 407         return 0;
 408 }
 409
 410 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
 411 {
 412         u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
 413         u8 value[MAX_BANK];
 414         int i, ret;
 415
 416         ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip));
 417         if (ret < 0) {
 418                 dev_err(&chip->client->dev, "failed reading register\n");
 419                 return ret;
 420         }
 421
 422         for (i = 0; i < NBANK(chip); i++)
 423                 bitmap_set_value8(val, value[i], i * BANK_SZ);
 424
 425         return 0;
 426 }
 427
 428 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
 429 {
 430         struct pca953x_chip *chip = gpiochip_get_data(gc);
 431         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 432         u8 bit = BIT(off % BANK_SZ);
 433         int ret;
 434
 435         mutex_lock(&chip->i2c_lock);
 436         ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
 437         mutex_unlock(&chip->i2c_lock);
 438         return ret;
 439 }
 440
 441 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
 442                 unsigned off, int val)
 443 {
 444         struct pca953x_chip *chip = gpiochip_get_data(gc);
 445         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 446         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
 447         u8 bit = BIT(off % BANK_SZ);
 448         int ret;
 449
 450         mutex_lock(&chip->i2c_lock);
 451         /* set output level */
 452         ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 453         if (ret)
 454                 goto exit;
 455
 456         /* then direction */
 457         ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
 458 exit:
 459         mutex_unlock(&chip->i2c_lock);
 460         return ret;
 461 }
 462
 463 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
 464 {
 465         struct pca953x_chip *chip = gpiochip_get_data(gc);
 466         u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off);
 467         u8 bit = BIT(off % BANK_SZ);
 468         u32 reg_val;
 469         int ret;
 470
 471         mutex_lock(&chip->i2c_lock);
 472         ret = regmap_read(chip->regmap, inreg, &reg_val);
 473         mutex_unlock(&chip->i2c_lock);
 474         if (ret < 0)
 475                 return ret;
 476
 477         return !!(reg_val & bit);
 478 }
 479
 480 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
 481 {
 482         struct pca953x_chip *chip = gpiochip_get_data(gc);
 483         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
 484         u8 bit = BIT(off % BANK_SZ);
 485
 486         mutex_lock(&chip->i2c_lock);
 487         regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 488         mutex_unlock(&chip->i2c_lock);
 489 }
 490
 491 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
 492 {
 493         struct pca953x_chip *chip = gpiochip_get_data(gc);
 494         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 495         u8 bit = BIT(off % BANK_SZ);
 496         u32 reg_val;
 497         int ret;
 498
 499         mutex_lock(&chip->i2c_lock);
 500         ret = regmap_read(chip->regmap, dirreg, &reg_val);
 501         mutex_unlock(&chip->i2c_lock);
 502         if (ret < 0)
 503                 return ret;
 504
 505         if (reg_val & bit)
 506                 return GPIO_LINE_DIRECTION_IN;
 507
 508         return GPIO_LINE_DIRECTION_OUT;
 509 }
 510
 511 static int pca953x_gpio_get_multiple(struct gpio_chip *gc,
 512                                      unsigned long *mask, unsigned long *bits)
 513 {
 514         struct pca953x_chip *chip = gpiochip_get_data(gc);
 515         DECLARE_BITMAP(reg_val, MAX_LINE);
 516         int ret;
 517
 518         mutex_lock(&chip->i2c_lock);
 519         ret = pca953x_read_regs(chip, chip->regs->input, reg_val);
 520         mutex_unlock(&chip->i2c_lock);
 521         if (ret)
 522                 return ret;
 523
 524         bitmap_replace(bits, bits, reg_val, mask, gc->ngpio);
 525         return 0;
 526 }
 527
 528 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
 529                                       unsigned long *mask, unsigned long *bits)
 530 {
 531         struct pca953x_chip *chip = gpiochip_get_data(gc);
 532         DECLARE_BITMAP(reg_val, MAX_LINE);
 533         int ret;
 534
 535         mutex_lock(&chip->i2c_lock);
 536         ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
 537         if (ret)
 538                 goto exit;
 539
 540         bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio);
 541
 542         pca953x_write_regs(chip, chip->regs->output, reg_val);
 543 exit:
 544         mutex_unlock(&chip->i2c_lock);
 545 }
 546
 547 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
 548                                          unsigned int offset,
 549                                          unsigned long config)
 550 {
 551         u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset);
 552         u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset);
 553         u8 bit = BIT(offset % BANK_SZ);
 554         int ret;
 555
 556         /*
 557          * pull-up/pull-down configuration requires PCAL extended
 558          * registers
 559          */
 560         if (!(chip->driver_data & PCA_PCAL))
 561                 return -ENOTSUPP;
 562
 563         mutex_lock(&chip->i2c_lock);
 564
 565         /* Configure pull-up/pull-down */
 566         if (config == PIN_CONFIG_BIAS_PULL_UP)
 567                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
 568         else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
 569                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
 570         else
 571                 ret = 0;
 572         if (ret)
 573                 goto exit;
 574
 575         /* Disable/Enable pull-up/pull-down */
 576         if (config == PIN_CONFIG_BIAS_DISABLE)
 577                 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
 578         else
 579                 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
 580
 581 exit:
 582         mutex_unlock(&chip->i2c_lock);
 583         return ret;
 584 }
 585
 586 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
 587                                    unsigned long config)
 588 {
 589         struct pca953x_chip *chip = gpiochip_get_data(gc);
 590
 591         switch (pinconf_to_config_param(config)) {
 592         case PIN_CONFIG_BIAS_PULL_UP:
 593         case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 594         case PIN_CONFIG_BIAS_PULL_DOWN:
 595         case PIN_CONFIG_BIAS_DISABLE:
 596                 return pca953x_gpio_set_pull_up_down(chip, offset, config);
 597         default:
 598                 return -ENOTSUPP;
 599         }
 600 }
 601
 602 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 603 {
 604         struct gpio_chip *gc;
 605
 606         gc = &chip->gpio_chip;
 607
 608         gc->direction_input  = pca953x_gpio_direction_input;
 609         gc->direction_output = pca953x_gpio_direction_output;
 610         gc->get = pca953x_gpio_get_value;
 611         gc->set = pca953x_gpio_set_value;
 612         gc->get_direction = pca953x_gpio_get_direction;
 613         gc->get_multiple = pca953x_gpio_get_multiple;
 614         gc->set_multiple = pca953x_gpio_set_multiple;
 615         gc->set_config = pca953x_gpio_set_config;
 616         gc->can_sleep = true;
 617
 618         gc->base = chip->gpio_start;
 619         gc->ngpio = gpios;
 620         gc->label = dev_name(&chip->client->dev);
 621         gc->parent = &chip->client->dev;
 622         gc->owner = THIS_MODULE;
 623         gc->names = chip->names;
 624 }
 625
 626 #ifdef CONFIG_GPIO_PCA953X_IRQ
 627 static void pca953x_irq_mask(struct irq_data *d)
 628 {
 629         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 630         struct pca953x_chip *chip = gpiochip_get_data(gc);
 631         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 632
 633         clear_bit(hwirq, chip->irq_mask);
 634         gpiochip_disable_irq(gc, hwirq);
 635 }
 636
 637 static void pca953x_irq_unmask(struct irq_data *d)
 638 {
 639         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 640         struct pca953x_chip *chip = gpiochip_get_data(gc);
 641         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 642
 643         gpiochip_enable_irq(gc, hwirq);
 644         set_bit(hwirq, chip->irq_mask);
 645 }
 646
 647 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
 648 {
 649         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 650         struct pca953x_chip *chip = gpiochip_get_data(gc);
 651
 652         if (on)
 653                 atomic_inc(&chip->wakeup_path);
 654         else
 655                 atomic_dec(&chip->wakeup_path);
 656
 657         return irq_set_irq_wake(chip->client->irq, on);
 658 }
 659
 660 static void pca953x_irq_bus_lock(struct irq_data *d)
 661 {
 662         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 663         struct pca953x_chip *chip = gpiochip_get_data(gc);
 664
 665         mutex_lock(&chip->irq_lock);
 666 }
 667
 668 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 669 {
 670         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 671         struct pca953x_chip *chip = gpiochip_get_data(gc);
 672         DECLARE_BITMAP(irq_mask, MAX_LINE);
 673         DECLARE_BITMAP(reg_direction, MAX_LINE);
 674         int level;
 675
 676         if (chip->driver_data & PCA_PCAL) {
 677                 /* Enable latch on interrupt-enabled inputs */
 678                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
 679
 680                 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
 681
 682                 /* Unmask enabled interrupts */
 683                 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
 684         }
 685
 686         /* Switch direction to input if needed */
 687         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 688
 689         bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
 690         bitmap_complement(reg_direction, reg_direction, gc->ngpio);
 691         bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);
 692
 693         /* Look for any newly setup interrupt */
 694         for_each_set_bit(level, irq_mask, gc->ngpio)
 695                 pca953x_gpio_direction_input(&chip->gpio_chip, level);
 696
 697         mutex_unlock(&chip->irq_lock);
 698 }
 699
 700 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 701 {
 702         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 703         struct pca953x_chip *chip = gpiochip_get_data(gc);
 704         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 705
 706         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
 707                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
 708                         d->irq, type);
 709                 return -EINVAL;
 710         }
 711
 712         assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING);
 713         assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING);
 714
 715         return 0;
 716 }
 717
 718 static void pca953x_irq_shutdown(struct irq_data *d)
 719 {
 720         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 721         struct pca953x_chip *chip = gpiochip_get_data(gc);
 722         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 723
 724         clear_bit(hwirq, chip->irq_trig_raise);
 725         clear_bit(hwirq, chip->irq_trig_fall);
 726 }
 727
 728 static void pca953x_irq_print_chip(struct irq_data *data, struct seq_file *p)
 729 {
 730         struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
 731
 732         seq_printf(p, dev_name(gc->parent));
 733 }
 734
 735 static const struct irq_chip pca953x_irq_chip = {
 736         .irq_mask               = pca953x_irq_mask,
 737         .irq_unmask             = pca953x_irq_unmask,
 738         .irq_set_wake           = pca953x_irq_set_wake,
 739         .irq_bus_lock           = pca953x_irq_bus_lock,
 740         .irq_bus_sync_unlock    = pca953x_irq_bus_sync_unlock,
 741         .irq_set_type           = pca953x_irq_set_type,
 742         .irq_shutdown           = pca953x_irq_shutdown,
 743         .irq_print_chip         = pca953x_irq_print_chip,
 744         .flags                  = IRQCHIP_IMMUTABLE,
 745         GPIOCHIP_IRQ_RESOURCE_HELPERS,
 746 };
 747
 748 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending)
 749 {
 750         struct gpio_chip *gc = &chip->gpio_chip;
 751         DECLARE_BITMAP(reg_direction, MAX_LINE);
 752         DECLARE_BITMAP(old_stat, MAX_LINE);
 753         DECLARE_BITMAP(cur_stat, MAX_LINE);
 754         DECLARE_BITMAP(new_stat, MAX_LINE);
 755         DECLARE_BITMAP(trigger, MAX_LINE);
 756         int ret;
 757
 758         if (chip->driver_data & PCA_PCAL) {
 759                 /* Read the current interrupt status from the device */
 760                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
 761                 if (ret)
 762                         return false;
 763
 764                 /* Check latched inputs and clear interrupt status */
 765                 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 766                 if (ret)
 767                         return false;
 768
 769                 /* Apply filter for rising/falling edge selection */
 770                 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio);
 771
 772                 bitmap_and(pending, new_stat, trigger, gc->ngpio);
 773
 774                 return !bitmap_empty(pending, gc->ngpio);
 775         }
 776
 777         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 778         if (ret)
 779                 return false;
 780
 781         /* Remove output pins from the equation */
 782         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 783
 784         bitmap_copy(old_stat, chip->irq_stat, gc->ngpio);
 785
 786         bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio);
 787         bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio);
 788         bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
 789
 790         bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
 791
 792         if (bitmap_empty(trigger, gc->ngpio))
 793                 return false;
 794
 795         bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
 796         bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
 797         bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio);
 798         bitmap_and(pending, new_stat, trigger, gc->ngpio);
 799
 800         return !bitmap_empty(pending, gc->ngpio);
 801 }
 802
 803 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 804 {
 805         struct pca953x_chip *chip = devid;
 806         struct gpio_chip *gc = &chip->gpio_chip;
 807         DECLARE_BITMAP(pending, MAX_LINE);
 808         int level;
 809         bool ret;
 810
 811         bitmap_zero(pending, MAX_LINE);
 812
 813         mutex_lock(&chip->i2c_lock);
 814         ret = pca953x_irq_pending(chip, pending);
 815         mutex_unlock(&chip->i2c_lock);
 816
 817         if (ret) {
 818                 ret = 0;
 819
 820                 for_each_set_bit(level, pending, gc->ngpio) {
 821                         int nested_irq = irq_find_mapping(gc->irq.domain, level);
 822
 823                         if (unlikely(nested_irq <= 0)) {
 824                                 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level);
 825                                 continue;
 826                         }
 827
 828                         handle_nested_irq(nested_irq);
 829                         ret = 1;
 830                 }
 831         }
 832
 833         return IRQ_RETVAL(ret);
 834 }
 835
 836 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)
 837 {
 838         struct i2c_client *client = chip->client;
 839         DECLARE_BITMAP(reg_direction, MAX_LINE);
 840         DECLARE_BITMAP(irq_stat, MAX_LINE);
 841         struct gpio_irq_chip *girq;
 842         int ret;
 843
 844         if (dmi_first_match(pca953x_dmi_acpi_irq_info)) {
 845                 ret = pca953x_acpi_get_irq(&client->dev);
 846                 if (ret > 0)
 847                         client->irq = ret;
 848         }
 849
 850         if (!client->irq)
 851                 return 0;
 852
 853         if (irq_base == -1)
 854                 return 0;
 855
 856         if (!(chip->driver_data & PCA_INT))
 857                 return 0;
 858
 859         ret = pca953x_read_regs(chip, chip->regs->input, irq_stat);
 860         if (ret)
 861                 return ret;
 862
 863         /*
 864          * There is no way to know which GPIO line generated the
 865          * interrupt.  We have to rely on the previous read for
 866          * this purpose.
 867          */
 868         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 869         bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio);
 870         mutex_init(&chip->irq_lock);
 871
 872         girq = &chip->gpio_chip.irq;
 873         gpio_irq_chip_set_chip(girq, &pca953x_irq_chip);
 874         /* This will let us handle the parent IRQ in the driver */
 875         girq->parent_handler = NULL;
 876         girq->num_parents = 0;
 877         girq->parents = NULL;
 878         girq->default_type = IRQ_TYPE_NONE;
 879         girq->handler = handle_simple_irq;
 880         girq->threaded = true;
 881         girq->first = irq_base; /* FIXME: get rid of this */
 882
 883         ret = devm_request_threaded_irq(&client->dev, client->irq,
 884                                         NULL, pca953x_irq_handler,
 885                                         IRQF_ONESHOT | IRQF_SHARED,
 886                                         dev_name(&client->dev), chip);
 887         if (ret) {
 888                 dev_err(&client->dev, "failed to request irq %d\n",
 889                         client->irq);
 890                 return ret;
 891         }
 892
 893         return 0;
 894 }
 895
 896 #else /* CONFIG_GPIO_PCA953X_IRQ */
 897 static int pca953x_irq_setup(struct pca953x_chip *chip,
 898                              int irq_base)
 899 {
 900         struct i2c_client *client = chip->client;
 901
 902         if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
 903                 dev_warn(&client->dev, "interrupt support not compiled in\n");
 904
 905         return 0;
 906 }
 907 #endif
 908
 909 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
 910 {
 911         DECLARE_BITMAP(val, MAX_LINE);
 912         u8 regaddr;
 913         int ret;
 914
 915         regaddr = pca953x_recalc_addr(chip, chip->regs->output, 0);
 916         ret = regcache_sync_region(chip->regmap, regaddr,
 917                                    regaddr + NBANK(chip) - 1);
 918         if (ret)
 919                 goto out;
 920
 921         regaddr = pca953x_recalc_addr(chip, chip->regs->direction, 0);
 922         ret = regcache_sync_region(chip->regmap, regaddr,
 923                                    regaddr + NBANK(chip) - 1);
 924         if (ret)
 925                 goto out;
 926
 927         /* set platform specific polarity inversion */
 928         if (invert)
 929                 bitmap_fill(val, MAX_LINE);
 930         else
 931                 bitmap_zero(val, MAX_LINE);
 932
 933         ret = pca953x_write_regs(chip, chip->regs->invert, val);
 934 out:
 935         return ret;
 936 }
 937
 938 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 939 {
 940         DECLARE_BITMAP(val, MAX_LINE);
 941         unsigned int i;
 942         int ret;
 943
 944         ret = device_pca95xx_init(chip, invert);
 945         if (ret)
 946                 goto out;
 947
 948         /* To enable register 6, 7 to control pull up and pull down */
 949         for (i = 0; i < NBANK(chip); i++)
 950                 bitmap_set_value8(val, 0x02, i * BANK_SZ);
 951
 952         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
 953         if (ret)
 954                 goto out;
 955
 956         return 0;
 957 out:
 958         return ret;
 959 }
 960
 961 static int pca953x_probe(struct i2c_client *client,
 962                          const struct i2c_device_id *i2c_id)
 963 {
 964         struct pca953x_platform_data *pdata;
 965         struct pca953x_chip *chip;
 966         int irq_base = 0;
 967         int ret;
 968         u32 invert = 0;
 969         struct regulator *reg;
 970         const struct regmap_config *regmap_config;
 971
 972         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
 973         if (chip == NULL)
 974                 return -ENOMEM;
 975
 976         pdata = dev_get_platdata(&client->dev);
 977         if (pdata) {
 978                 irq_base = pdata->irq_base;
 979                 chip->gpio_start = pdata->gpio_base;
 980                 invert = pdata->invert;
 981                 chip->names = pdata->names;
 982         } else {
 983                 struct gpio_desc *reset_gpio;
 984
 985                 chip->gpio_start = -1;
 986                 irq_base = 0;
 987
 988                 /*
 989                  * See if we need to de-assert a reset pin.
 990                  *
 991                  * There is no known ACPI-enabled platforms that are
 992                  * using "reset" GPIO. Otherwise any of those platform
 993                  * must use _DSD method with corresponding property.
 994                  */
 995                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
 996                                                      GPIOD_OUT_LOW);
 997                 if (IS_ERR(reset_gpio))
 998                         return PTR_ERR(reset_gpio);
 999         }
1000
1001         chip->client = client;
1002
1003         reg = devm_regulator_get(&client->dev, "vcc");
1004         if (IS_ERR(reg))
1005                 return dev_err_probe(&client->dev, PTR_ERR(reg), "reg get err\n");
1006
1007         ret = regulator_enable(reg);
1008         if (ret) {
1009                 dev_err(&client->dev, "reg en err: %d\n", ret);
1010                 return ret;
1011         }
1012         chip->regulator = reg;
1013
1014         if (i2c_id) {
1015                 chip->driver_data = i2c_id->driver_data;
1016         } else {
1017                 const void *match;
1018
1019                 match = device_get_match_data(&client->dev);
1020                 if (!match) {
1021                         ret = -ENODEV;
1022                         goto err_exit;
1023                 }
1024
1025                 chip->driver_data = (uintptr_t)match;
1026         }
1027
1028         i2c_set_clientdata(client, chip);
1029
1030         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
1031
1032         if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
1033                 dev_info(&client->dev, "using AI\n");
1034                 regmap_config = &pca953x_ai_i2c_regmap;
1035         } else {
1036                 dev_info(&client->dev, "using no AI\n");
1037                 regmap_config = &pca953x_i2c_regmap;
1038         }
1039
1040         chip->regmap = devm_regmap_init_i2c(client, regmap_config);
1041         if (IS_ERR(chip->regmap)) {
1042                 ret = PTR_ERR(chip->regmap);
1043                 goto err_exit;
1044         }
1045
1046         regcache_mark_dirty(chip->regmap);
1047
1048         mutex_init(&chip->i2c_lock);
1049         /*
1050          * In case we have an i2c-mux controlled by a GPIO provided by an
1051          * expander using the same driver higher on the device tree, read the
1052          * i2c adapter nesting depth and use the retrieved value as lockdep
1053          * subclass for chip->i2c_lock.
1054          *
1055          * REVISIT: This solution is not complete. It protects us from lockdep
1056          * false positives when the expander controlling the i2c-mux is on
1057          * a different level on the device tree, but not when it's on the same
1058          * level on a different branch (in which case the subclass number
1059          * would be the same).
1060          *
1061          * TODO: Once a correct solution is developed, a similar fix should be
1062          * applied to all other i2c-controlled GPIO expanders (and potentially
1063          * regmap-i2c).
1064          */
1065         lockdep_set_subclass(&chip->i2c_lock,
1066                              i2c_adapter_depth(client->adapter));
1067
1068         /* initialize cached registers from their original values.
1069          * we can't share this chip with another i2c master.
1070          */
1071
1072         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1073                 chip->regs = &pca953x_regs;
1074                 ret = device_pca95xx_init(chip, invert);
1075         } else {
1076                 chip->regs = &pca957x_regs;
1077                 ret = device_pca957x_init(chip, invert);
1078         }
1079         if (ret)
1080                 goto err_exit;
1081
1082         ret = pca953x_irq_setup(chip, irq_base);
1083         if (ret)
1084                 goto err_exit;
1085
1086         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1087         if (ret)
1088                 goto err_exit;
1089
1090         if (pdata && pdata->setup) {
1091                 ret = pdata->setup(client, chip->gpio_chip.base,
1092                                    chip->gpio_chip.ngpio, pdata->context);
1093                 if (ret < 0)
1094                         dev_warn(&client->dev, "setup failed, %d\n", ret);
1095         }
1096
1097         return 0;
1098
1099 err_exit:
1100         regulator_disable(chip->regulator);
1101         return ret;
1102 }
1103
1104 static int pca953x_remove(struct i2c_client *client)
1105 {
1106         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1107         struct pca953x_chip *chip = i2c_get_clientdata(client);
1108         int ret;
1109
1110         if (pdata && pdata->teardown) {
1111                 ret = pdata->teardown(client, chip->gpio_chip.base,
1112                                       chip->gpio_chip.ngpio, pdata->context);
1113                 if (ret < 0)
1114                         dev_err(&client->dev, "teardown failed, %d\n", ret);
1115         } else {
1116                 ret = 0;
1117         }
1118
1119         regulator_disable(chip->regulator);
1120
1121         return ret;
1122 }
1123
1124 #ifdef CONFIG_PM_SLEEP
1125 static int pca953x_regcache_sync(struct device *dev)
1126 {
1127         struct pca953x_chip *chip = dev_get_drvdata(dev);
1128         int ret;
1129         u8 regaddr;
1130
1131         /*
1132          * The ordering between direction and output is important,
1133          * sync these registers first and only then sync the rest.
1134          */
1135         regaddr = pca953x_recalc_addr(chip, chip->regs->direction, 0);
1136         ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip) - 1);
1137         if (ret) {
1138                 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1139                 return ret;
1140         }
1141
1142         regaddr = pca953x_recalc_addr(chip, chip->regs->output, 0);
1143         ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip) - 1);
1144         if (ret) {
1145                 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1146                 return ret;
1147         }
1148
1149 #ifdef CONFIG_GPIO_PCA953X_IRQ
1150         if (chip->driver_data & PCA_PCAL) {
1151                 regaddr = pca953x_recalc_addr(chip, PCAL953X_IN_LATCH, 0);
1152                 ret = regcache_sync_region(chip->regmap, regaddr,
1153                                            regaddr + NBANK(chip) - 1);
1154                 if (ret) {
1155                         dev_err(dev, "Failed to sync INT latch registers: %d\n",
1156                                 ret);
1157                         return ret;
1158                 }
1159
1160                 regaddr = pca953x_recalc_addr(chip, PCAL953X_INT_MASK, 0);
1161                 ret = regcache_sync_region(chip->regmap, regaddr,
1162                                            regaddr + NBANK(chip) - 1);
1163                 if (ret) {
1164                         dev_err(dev, "Failed to sync INT mask registers: %d\n",
1165                                 ret);
1166                         return ret;
1167                 }
1168         }
1169 #endif
1170
1171         return 0;
1172 }
1173
1174 static int pca953x_suspend(struct device *dev)
1175 {
1176         struct pca953x_chip *chip = dev_get_drvdata(dev);
1177
1178         regcache_cache_only(chip->regmap, true);
1179
1180         if (atomic_read(&chip->wakeup_path))
1181                 device_set_wakeup_path(dev);
1182         else
1183                 regulator_disable(chip->regulator);
1184
1185         return 0;
1186 }
1187
1188 static int pca953x_resume(struct device *dev)
1189 {
1190         struct pca953x_chip *chip = dev_get_drvdata(dev);
1191         int ret;
1192
1193         if (!atomic_read(&chip->wakeup_path)) {
1194                 ret = regulator_enable(chip->regulator);
1195                 if (ret) {
1196                         dev_err(dev, "Failed to enable regulator: %d\n", ret);
1197                         return 0;
1198                 }
1199         }
1200
1201         regcache_cache_only(chip->regmap, false);
1202         regcache_mark_dirty(chip->regmap);
1203         ret = pca953x_regcache_sync(dev);
1204         if (ret)
1205                 return ret;
1206
1207         ret = regcache_sync(chip->regmap);
1208         if (ret) {
1209                 dev_err(dev, "Failed to restore register map: %d\n", ret);
1210                 return ret;
1211         }
1212
1213         return 0;
1214 }
1215 #endif
1216
1217 /* convenience to stop overlong match-table lines */
1218 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1219 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1220
1221 static const struct of_device_id pca953x_dt_ids[] = {
1222         { .compatible = "nxp,pca6408", .data = OF_953X(8, PCA_INT), },
1223         { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1224         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1225         { .compatible = "nxp,pca9506", .data = OF_953X(40, PCA_INT), },
1226         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1227         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1228         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1229         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1230         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1231         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1232         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1233         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1234         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1235         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1236         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1237         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1238         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1239
1240         { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1241         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1242         { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), },
1243         { .compatible = "nxp,pcal9554b", .data = OF_953X( 8, PCA_LATCH_INT), },
1244         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1245
1246         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1247         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1248         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1249         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1250         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1251
1252         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1253         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1254         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1255         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1256         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1257         { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1258
1259         { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1260         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1261         { .compatible = "onnn,pca9655", .data = OF_953X(16, PCA_INT), },
1262
1263         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1264         { }
1265 };
1266
1267 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1268
1269 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1270
1271 static struct i2c_driver pca953x_driver = {
1272         .driver = {
1273                 .name   = "pca953x",
1274                 .pm     = &pca953x_pm_ops,
1275                 .of_match_table = pca953x_dt_ids,
1276                 .acpi_match_table = pca953x_acpi_ids,
1277         },
1278         .probe          = pca953x_probe,
1279         .remove         = pca953x_remove,
1280         .id_table       = pca953x_id,
1281 };
1282
1283 static int __init pca953x_init(void)
1284 {
1285         return i2c_add_driver(&pca953x_driver);
1286 }
1287 /* register after i2c postcore initcall and before
1288  * subsys initcalls that may rely on these GPIOs
1289  */
1290 subsys_initcall(pca953x_init);
1291
1292 static void __exit pca953x_exit(void)
1293 {
1294         i2c_del_driver(&pca953x_driver);
1295 }
1296 module_exit(pca953x_exit);
1297
1298 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1299 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1300 MODULE_LICENSE("GPL");