dc691bd52a793f44c76efdf9b58676ed9995267a
[linux-2.6-microblaze.git] / drivers / gpio / gpio-pca953x.c
1 /*
2  *  PCA953x 4/8/16/24/40 bit I/O ports
3  *
4  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5  *  Copyright (C) 2007 Marvell International Ltd.
6  *
7  *  Derived from drivers/i2c/chips/pca9539.c
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; version 2 of the License.
12  */
13
14 #include <linux/acpi.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_data/pca953x.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
25
26 #include <asm/unaligned.h>
27
28 #define PCA953X_INPUT           0x00
29 #define PCA953X_OUTPUT          0x01
30 #define PCA953X_INVERT          0x02
31 #define PCA953X_DIRECTION       0x03
32
33 #define REG_ADDR_AI             0x80
34
35 #define PCA957X_IN              0x00
36 #define PCA957X_INVRT           0x01
37 #define PCA957X_BKEN            0x02
38 #define PCA957X_PUPD            0x03
39 #define PCA957X_CFG             0x04
40 #define PCA957X_OUT             0x05
41 #define PCA957X_MSK             0x06
42 #define PCA957X_INTS            0x07
43
44 #define PCAL953X_OUT_STRENGTH   0x20
45 #define PCAL953X_IN_LATCH       0x22
46 #define PCAL953X_PULL_EN        0x23
47 #define PCAL953X_PULL_SEL       0x24
48 #define PCAL953X_INT_MASK       0x25
49 #define PCAL953X_INT_STAT       0x26
50 #define PCAL953X_OUT_CONF       0x27
51
52 #define PCAL6524_INT_EDGE       0x28
53 #define PCAL6524_INT_CLR        0x2a
54 #define PCAL6524_IN_STATUS      0x2b
55 #define PCAL6524_OUT_INDCONF    0x2c
56 #define PCAL6524_DEBOUNCE       0x2d
57
58 #define PCA_GPIO_MASK           0x00FF
59
60 #define PCAL_GPIO_MASK          0x1f
61 #define PCAL_PINCTRL_MASK       0x60
62
63 #define PCA_INT                 0x0100
64 #define PCA_PCAL                0x0200
65 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
66 #define PCA953X_TYPE            0x1000
67 #define PCA957X_TYPE            0x2000
68 #define PCA_TYPE_MASK           0xF000
69
70 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
71
72 static const struct i2c_device_id pca953x_id[] = {
73         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
74         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
75         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
76         { "pca9536", 4  | PCA953X_TYPE, },
77         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
78         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
79         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
80         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
81         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
82         { "pca9556", 8  | PCA953X_TYPE, },
83         { "pca9557", 8  | PCA953X_TYPE, },
84         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
85         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
86         { "pca9698", 40 | PCA953X_TYPE, },
87
88         { "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
89         { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
90
91         { "max7310", 8  | PCA953X_TYPE, },
92         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
93         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
94         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
95         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
96         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
97         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
98         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
99         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
100         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
101         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
102         { "xra1202", 8  | PCA953X_TYPE },
103         { }
104 };
105 MODULE_DEVICE_TABLE(i2c, pca953x_id);
106
107 static const struct acpi_device_id pca953x_acpi_ids[] = {
108         { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
109         { }
110 };
111 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
112
113 #define MAX_BANK 5
114 #define BANK_SZ 8
115
116 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
117
118 struct pca953x_reg_config {
119         int direction;
120         int output;
121         int input;
122         int invert;
123 };
124
125 static const struct pca953x_reg_config pca953x_regs = {
126         .direction = PCA953X_DIRECTION,
127         .output = PCA953X_OUTPUT,
128         .input = PCA953X_INPUT,
129         .invert = PCA953X_INVERT,
130 };
131
132 static const struct pca953x_reg_config pca957x_regs = {
133         .direction = PCA957X_CFG,
134         .output = PCA957X_OUT,
135         .input = PCA957X_IN,
136         .invert = PCA957X_INVRT,
137 };
138
139 struct pca953x_chip {
140         unsigned gpio_start;
141         u8 reg_output[MAX_BANK];
142         u8 reg_direction[MAX_BANK];
143         struct mutex i2c_lock;
144
145 #ifdef CONFIG_GPIO_PCA953X_IRQ
146         struct mutex irq_lock;
147         u8 irq_mask[MAX_BANK];
148         u8 irq_stat[MAX_BANK];
149         u8 irq_trig_raise[MAX_BANK];
150         u8 irq_trig_fall[MAX_BANK];
151 #endif
152
153         struct i2c_client *client;
154         struct gpio_chip gpio_chip;
155         const char *const *names;
156         unsigned long driver_data;
157         struct regulator *regulator;
158
159         const struct pca953x_reg_config *regs;
160 };
161
162 static int pca953x_bank_shift(struct pca953x_chip *chip)
163 {
164         return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
165 }
166
167 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
168                                 int off)
169 {
170         int ret;
171         int bank_shift = pca953x_bank_shift(chip);
172         int offset = off / BANK_SZ;
173
174         ret = i2c_smbus_read_byte_data(chip->client,
175                                 (reg << bank_shift) + offset);
176         *val = ret;
177
178         if (ret < 0) {
179                 dev_err(&chip->client->dev, "failed reading register\n");
180                 return ret;
181         }
182
183         return 0;
184 }
185
186 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
187                                 int off)
188 {
189         int ret;
190         int bank_shift = pca953x_bank_shift(chip);
191         int offset = off / BANK_SZ;
192
193         ret = i2c_smbus_write_byte_data(chip->client,
194                                         (reg << bank_shift) + offset, val);
195
196         if (ret < 0) {
197                 dev_err(&chip->client->dev, "failed writing register\n");
198                 return ret;
199         }
200
201         return 0;
202 }
203
204 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
205 {
206         int bank_shift = pca953x_bank_shift(chip);
207         int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
208         int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
209         u8 regaddr = pinctrl | addr;
210         int ret;
211
212         /* Chips with 24 and more GPIOs always support Auto Increment */
213         if (NBANK(chip) > 2)
214                 regaddr |= REG_ADDR_AI;
215
216         /* PCA9575 needs address-increment on multi-byte writes */
217         if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
218                 regaddr |= REG_ADDR_AI;
219
220         ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr,
221                                              NBANK(chip), val);
222         if (ret < 0) {
223                 dev_err(&chip->client->dev, "failed writing register\n");
224                 return ret;
225         }
226
227         return 0;
228 }
229
230 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
231 {
232         int bank_shift = pca953x_bank_shift(chip);
233         int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
234         int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
235         u8 regaddr = pinctrl | addr;
236         int ret;
237
238         /* Chips with 24 and more GPIOs always support Auto Increment */
239         if (NBANK(chip) > 2)
240                 regaddr |= REG_ADDR_AI;
241
242         ret = i2c_smbus_read_i2c_block_data(chip->client, regaddr,
243                                             NBANK(chip), val);
244         if (ret < 0) {
245                 dev_err(&chip->client->dev, "failed reading register\n");
246                 return ret;
247         }
248
249         return 0;
250 }
251
252 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
253 {
254         struct pca953x_chip *chip = gpiochip_get_data(gc);
255         u8 reg_val;
256         int ret;
257
258         mutex_lock(&chip->i2c_lock);
259         reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
260
261         ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
262         if (ret)
263                 goto exit;
264
265         chip->reg_direction[off / BANK_SZ] = reg_val;
266 exit:
267         mutex_unlock(&chip->i2c_lock);
268         return ret;
269 }
270
271 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
272                 unsigned off, int val)
273 {
274         struct pca953x_chip *chip = gpiochip_get_data(gc);
275         u8 reg_val;
276         int ret;
277
278         mutex_lock(&chip->i2c_lock);
279         /* set output level */
280         if (val)
281                 reg_val = chip->reg_output[off / BANK_SZ]
282                         | (1u << (off % BANK_SZ));
283         else
284                 reg_val = chip->reg_output[off / BANK_SZ]
285                         & ~(1u << (off % BANK_SZ));
286
287         ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
288         if (ret)
289                 goto exit;
290
291         chip->reg_output[off / BANK_SZ] = reg_val;
292
293         /* then direction */
294         reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
295         ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
296         if (ret)
297                 goto exit;
298
299         chip->reg_direction[off / BANK_SZ] = reg_val;
300 exit:
301         mutex_unlock(&chip->i2c_lock);
302         return ret;
303 }
304
305 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
306 {
307         struct pca953x_chip *chip = gpiochip_get_data(gc);
308         u32 reg_val;
309         int ret;
310
311         mutex_lock(&chip->i2c_lock);
312         ret = pca953x_read_single(chip, chip->regs->input, &reg_val, off);
313         mutex_unlock(&chip->i2c_lock);
314         if (ret < 0) {
315                 /* NOTE:  diagnostic already emitted; that's all we should
316                  * do unless gpio_*_value_cansleep() calls become different
317                  * from their nonsleeping siblings (and report faults).
318                  */
319                 return 0;
320         }
321
322         return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
323 }
324
325 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
326 {
327         struct pca953x_chip *chip = gpiochip_get_data(gc);
328         u8 reg_val;
329         int ret;
330
331         mutex_lock(&chip->i2c_lock);
332         if (val)
333                 reg_val = chip->reg_output[off / BANK_SZ]
334                         | (1u << (off % BANK_SZ));
335         else
336                 reg_val = chip->reg_output[off / BANK_SZ]
337                         & ~(1u << (off % BANK_SZ));
338
339         ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
340         if (ret)
341                 goto exit;
342
343         chip->reg_output[off / BANK_SZ] = reg_val;
344 exit:
345         mutex_unlock(&chip->i2c_lock);
346 }
347
348 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
349 {
350         struct pca953x_chip *chip = gpiochip_get_data(gc);
351         u32 reg_val;
352         int ret;
353
354         mutex_lock(&chip->i2c_lock);
355         ret = pca953x_read_single(chip, chip->regs->direction, &reg_val, off);
356         mutex_unlock(&chip->i2c_lock);
357         if (ret < 0)
358                 return ret;
359
360         return !!(reg_val & (1u << (off % BANK_SZ)));
361 }
362
363 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
364                                       unsigned long *mask, unsigned long *bits)
365 {
366         struct pca953x_chip *chip = gpiochip_get_data(gc);
367         int bank_shift = pca953x_bank_shift(chip);
368         u32 regaddr = chip->regs->output << bank_shift;
369         unsigned int bank_mask, bank_val;
370         int bank;
371         u8 reg_val[MAX_BANK];
372         int ret;
373
374         mutex_lock(&chip->i2c_lock);
375         memcpy(reg_val, chip->reg_output, NBANK(chip));
376         for (bank = 0; bank < NBANK(chip); bank++) {
377                 bank_mask = mask[bank / sizeof(*mask)] >>
378                            ((bank % sizeof(*mask)) * 8);
379                 if (bank_mask) {
380                         bank_val = bits[bank / sizeof(*bits)] >>
381                                   ((bank % sizeof(*bits)) * 8);
382                         bank_val &= bank_mask;
383                         reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
384                 }
385         }
386
387         /* PCA9575 needs address-increment on multi-byte writes */
388         if ((PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) &&
389             (NBANK(chip) > 1)) {
390                 regaddr |= REG_ADDR_AI;
391         }
392
393         ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr,
394                                              NBANK(chip), reg_val);
395         if (ret)
396                 goto exit;
397
398         memcpy(chip->reg_output, reg_val, NBANK(chip));
399 exit:
400         mutex_unlock(&chip->i2c_lock);
401 }
402
403 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
404 {
405         struct gpio_chip *gc;
406
407         gc = &chip->gpio_chip;
408
409         gc->direction_input  = pca953x_gpio_direction_input;
410         gc->direction_output = pca953x_gpio_direction_output;
411         gc->get = pca953x_gpio_get_value;
412         gc->set = pca953x_gpio_set_value;
413         gc->get_direction = pca953x_gpio_get_direction;
414         gc->set_multiple = pca953x_gpio_set_multiple;
415         gc->can_sleep = true;
416
417         gc->base = chip->gpio_start;
418         gc->ngpio = gpios;
419         gc->label = chip->client->name;
420         gc->parent = &chip->client->dev;
421         gc->owner = THIS_MODULE;
422         gc->names = chip->names;
423 }
424
425 #ifdef CONFIG_GPIO_PCA953X_IRQ
426 static void pca953x_irq_mask(struct irq_data *d)
427 {
428         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
429         struct pca953x_chip *chip = gpiochip_get_data(gc);
430
431         chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
432 }
433
434 static void pca953x_irq_unmask(struct irq_data *d)
435 {
436         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
437         struct pca953x_chip *chip = gpiochip_get_data(gc);
438
439         chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
440 }
441
442 static void pca953x_irq_bus_lock(struct irq_data *d)
443 {
444         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
445         struct pca953x_chip *chip = gpiochip_get_data(gc);
446
447         mutex_lock(&chip->irq_lock);
448 }
449
450 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
451 {
452         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
453         struct pca953x_chip *chip = gpiochip_get_data(gc);
454         u8 new_irqs;
455         int level, i;
456         u8 invert_irq_mask[MAX_BANK];
457
458         if (chip->driver_data & PCA_PCAL) {
459                 /* Enable latch on interrupt-enabled inputs */
460                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
461
462                 for (i = 0; i < NBANK(chip); i++)
463                         invert_irq_mask[i] = ~chip->irq_mask[i];
464
465                 /* Unmask enabled interrupts */
466                 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
467         }
468
469         /* Look for any newly setup interrupt */
470         for (i = 0; i < NBANK(chip); i++) {
471                 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
472                 new_irqs &= ~chip->reg_direction[i];
473
474                 while (new_irqs) {
475                         level = __ffs(new_irqs);
476                         pca953x_gpio_direction_input(&chip->gpio_chip,
477                                                         level + (BANK_SZ * i));
478                         new_irqs &= ~(1 << level);
479                 }
480         }
481
482         mutex_unlock(&chip->irq_lock);
483 }
484
485 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
486 {
487         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
488         struct pca953x_chip *chip = gpiochip_get_data(gc);
489         int bank_nb = d->hwirq / BANK_SZ;
490         u8 mask = 1 << (d->hwirq % BANK_SZ);
491
492         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
493                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
494                         d->irq, type);
495                 return -EINVAL;
496         }
497
498         if (type & IRQ_TYPE_EDGE_FALLING)
499                 chip->irq_trig_fall[bank_nb] |= mask;
500         else
501                 chip->irq_trig_fall[bank_nb] &= ~mask;
502
503         if (type & IRQ_TYPE_EDGE_RISING)
504                 chip->irq_trig_raise[bank_nb] |= mask;
505         else
506                 chip->irq_trig_raise[bank_nb] &= ~mask;
507
508         return 0;
509 }
510
511 static void pca953x_irq_shutdown(struct irq_data *d)
512 {
513         struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
514         u8 mask = 1 << (d->hwirq % BANK_SZ);
515
516         chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
517         chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
518 }
519
520 static struct irq_chip pca953x_irq_chip = {
521         .name                   = "pca953x",
522         .irq_mask               = pca953x_irq_mask,
523         .irq_unmask             = pca953x_irq_unmask,
524         .irq_bus_lock           = pca953x_irq_bus_lock,
525         .irq_bus_sync_unlock    = pca953x_irq_bus_sync_unlock,
526         .irq_set_type           = pca953x_irq_set_type,
527         .irq_shutdown           = pca953x_irq_shutdown,
528 };
529
530 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
531 {
532         u8 cur_stat[MAX_BANK];
533         u8 old_stat[MAX_BANK];
534         bool pending_seen = false;
535         bool trigger_seen = false;
536         u8 trigger[MAX_BANK];
537         int ret, i;
538
539         if (chip->driver_data & PCA_PCAL) {
540                 /* Read the current interrupt status from the device */
541                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
542                 if (ret)
543                         return false;
544
545                 /* Check latched inputs and clear interrupt status */
546                 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
547                 if (ret)
548                         return false;
549
550                 for (i = 0; i < NBANK(chip); i++) {
551                         /* Apply filter for rising/falling edge selection */
552                         pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
553                                 (cur_stat[i] & chip->irq_trig_raise[i]);
554                         pending[i] &= trigger[i];
555                         if (pending[i])
556                                 pending_seen = true;
557                 }
558
559                 return pending_seen;
560         }
561
562         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
563         if (ret)
564                 return false;
565
566         /* Remove output pins from the equation */
567         for (i = 0; i < NBANK(chip); i++)
568                 cur_stat[i] &= chip->reg_direction[i];
569
570         memcpy(old_stat, chip->irq_stat, NBANK(chip));
571
572         for (i = 0; i < NBANK(chip); i++) {
573                 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
574                 if (trigger[i])
575                         trigger_seen = true;
576         }
577
578         if (!trigger_seen)
579                 return false;
580
581         memcpy(chip->irq_stat, cur_stat, NBANK(chip));
582
583         for (i = 0; i < NBANK(chip); i++) {
584                 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
585                         (cur_stat[i] & chip->irq_trig_raise[i]);
586                 pending[i] &= trigger[i];
587                 if (pending[i])
588                         pending_seen = true;
589         }
590
591         return pending_seen;
592 }
593
594 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
595 {
596         struct pca953x_chip *chip = devid;
597         u8 pending[MAX_BANK];
598         u8 level;
599         unsigned nhandled = 0;
600         int i;
601
602         if (!pca953x_irq_pending(chip, pending))
603                 return IRQ_NONE;
604
605         for (i = 0; i < NBANK(chip); i++) {
606                 while (pending[i]) {
607                         level = __ffs(pending[i]);
608                         handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
609                                                         level + (BANK_SZ * i)));
610                         pending[i] &= ~(1 << level);
611                         nhandled++;
612                 }
613         }
614
615         return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
616 }
617
618 static int pca953x_irq_setup(struct pca953x_chip *chip,
619                              int irq_base)
620 {
621         struct i2c_client *client = chip->client;
622         int ret, i;
623
624         if (client->irq && irq_base != -1
625                         && (chip->driver_data & PCA_INT)) {
626                 ret = pca953x_read_regs(chip,
627                                         chip->regs->input, chip->irq_stat);
628                 if (ret)
629                         return ret;
630
631                 /*
632                  * There is no way to know which GPIO line generated the
633                  * interrupt.  We have to rely on the previous read for
634                  * this purpose.
635                  */
636                 for (i = 0; i < NBANK(chip); i++)
637                         chip->irq_stat[i] &= chip->reg_direction[i];
638                 mutex_init(&chip->irq_lock);
639
640                 ret = devm_request_threaded_irq(&client->dev,
641                                         client->irq,
642                                            NULL,
643                                            pca953x_irq_handler,
644                                            IRQF_TRIGGER_LOW | IRQF_ONESHOT |
645                                                    IRQF_SHARED,
646                                            dev_name(&client->dev), chip);
647                 if (ret) {
648                         dev_err(&client->dev, "failed to request irq %d\n",
649                                 client->irq);
650                         return ret;
651                 }
652
653                 ret =  gpiochip_irqchip_add_nested(&chip->gpio_chip,
654                                                    &pca953x_irq_chip,
655                                                    irq_base,
656                                                    handle_simple_irq,
657                                                    IRQ_TYPE_NONE);
658                 if (ret) {
659                         dev_err(&client->dev,
660                                 "could not connect irqchip to gpiochip\n");
661                         return ret;
662                 }
663
664                 gpiochip_set_nested_irqchip(&chip->gpio_chip,
665                                             &pca953x_irq_chip,
666                                             client->irq);
667         }
668
669         return 0;
670 }
671
672 #else /* CONFIG_GPIO_PCA953X_IRQ */
673 static int pca953x_irq_setup(struct pca953x_chip *chip,
674                              int irq_base)
675 {
676         struct i2c_client *client = chip->client;
677
678         if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
679                 dev_warn(&client->dev, "interrupt support not compiled in\n");
680
681         return 0;
682 }
683 #endif
684
685 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
686 {
687         int ret;
688         u8 val[MAX_BANK];
689
690         ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
691         if (ret)
692                 goto out;
693
694         ret = pca953x_read_regs(chip, chip->regs->direction,
695                                 chip->reg_direction);
696         if (ret)
697                 goto out;
698
699         /* set platform specific polarity inversion */
700         if (invert)
701                 memset(val, 0xFF, NBANK(chip));
702         else
703                 memset(val, 0, NBANK(chip));
704
705         ret = pca953x_write_regs(chip, chip->regs->invert, val);
706 out:
707         return ret;
708 }
709
710 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
711 {
712         int ret;
713         u8 val[MAX_BANK];
714
715         ret = device_pca95xx_init(chip, invert);
716         if (ret)
717                 goto out;
718
719         /* To enable register 6, 7 to control pull up and pull down */
720         memset(val, 0x02, NBANK(chip));
721         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
722         if (ret)
723                 goto out;
724
725         return 0;
726 out:
727         return ret;
728 }
729
730 static const struct of_device_id pca953x_dt_ids[];
731
732 static int pca953x_probe(struct i2c_client *client,
733                                    const struct i2c_device_id *i2c_id)
734 {
735         struct pca953x_platform_data *pdata;
736         struct pca953x_chip *chip;
737         int irq_base = 0;
738         int ret;
739         u32 invert = 0;
740         struct regulator *reg;
741
742         chip = devm_kzalloc(&client->dev,
743                         sizeof(struct pca953x_chip), GFP_KERNEL);
744         if (chip == NULL)
745                 return -ENOMEM;
746
747         pdata = dev_get_platdata(&client->dev);
748         if (pdata) {
749                 irq_base = pdata->irq_base;
750                 chip->gpio_start = pdata->gpio_base;
751                 invert = pdata->invert;
752                 chip->names = pdata->names;
753         } else {
754                 struct gpio_desc *reset_gpio;
755
756                 chip->gpio_start = -1;
757                 irq_base = 0;
758
759                 /*
760                  * See if we need to de-assert a reset pin.
761                  *
762                  * There is no known ACPI-enabled platforms that are
763                  * using "reset" GPIO. Otherwise any of those platform
764                  * must use _DSD method with corresponding property.
765                  */
766                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
767                                                      GPIOD_OUT_LOW);
768                 if (IS_ERR(reset_gpio))
769                         return PTR_ERR(reset_gpio);
770         }
771
772         chip->client = client;
773
774         reg = devm_regulator_get(&client->dev, "vcc");
775         if (IS_ERR(reg)) {
776                 ret = PTR_ERR(reg);
777                 if (ret != -EPROBE_DEFER)
778                         dev_err(&client->dev, "reg get err: %d\n", ret);
779                 return ret;
780         }
781         ret = regulator_enable(reg);
782         if (ret) {
783                 dev_err(&client->dev, "reg en err: %d\n", ret);
784                 return ret;
785         }
786         chip->regulator = reg;
787
788         if (i2c_id) {
789                 chip->driver_data = i2c_id->driver_data;
790         } else {
791                 const struct acpi_device_id *acpi_id;
792                 struct device *dev = &client->dev;
793
794                 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
795                 if (!chip->driver_data) {
796                         acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
797                         if (!acpi_id) {
798                                 ret = -ENODEV;
799                                 goto err_exit;
800                         }
801
802                         chip->driver_data = acpi_id->driver_data;
803                 }
804         }
805
806         mutex_init(&chip->i2c_lock);
807         /*
808          * In case we have an i2c-mux controlled by a GPIO provided by an
809          * expander using the same driver higher on the device tree, read the
810          * i2c adapter nesting depth and use the retrieved value as lockdep
811          * subclass for chip->i2c_lock.
812          *
813          * REVISIT: This solution is not complete. It protects us from lockdep
814          * false positives when the expander controlling the i2c-mux is on
815          * a different level on the device tree, but not when it's on the same
816          * level on a different branch (in which case the subclass number
817          * would be the same).
818          *
819          * TODO: Once a correct solution is developed, a similar fix should be
820          * applied to all other i2c-controlled GPIO expanders (and potentially
821          * regmap-i2c).
822          */
823         lockdep_set_subclass(&chip->i2c_lock,
824                              i2c_adapter_depth(client->adapter));
825
826         /* initialize cached registers from their original values.
827          * we can't share this chip with another i2c master.
828          */
829         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
830
831         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
832                 chip->regs = &pca953x_regs;
833                 ret = device_pca95xx_init(chip, invert);
834         } else {
835                 chip->regs = &pca957x_regs;
836                 ret = device_pca957x_init(chip, invert);
837         }
838         if (ret)
839                 goto err_exit;
840
841         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
842         if (ret)
843                 goto err_exit;
844
845         ret = pca953x_irq_setup(chip, irq_base);
846         if (ret)
847                 goto err_exit;
848
849         if (pdata && pdata->setup) {
850                 ret = pdata->setup(client, chip->gpio_chip.base,
851                                 chip->gpio_chip.ngpio, pdata->context);
852                 if (ret < 0)
853                         dev_warn(&client->dev, "setup failed, %d\n", ret);
854         }
855
856         i2c_set_clientdata(client, chip);
857         return 0;
858
859 err_exit:
860         regulator_disable(chip->regulator);
861         return ret;
862 }
863
864 static int pca953x_remove(struct i2c_client *client)
865 {
866         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
867         struct pca953x_chip *chip = i2c_get_clientdata(client);
868         int ret;
869
870         if (pdata && pdata->teardown) {
871                 ret = pdata->teardown(client, chip->gpio_chip.base,
872                                 chip->gpio_chip.ngpio, pdata->context);
873                 if (ret < 0)
874                         dev_err(&client->dev, "%s failed, %d\n",
875                                         "teardown", ret);
876         } else {
877                 ret = 0;
878         }
879
880         regulator_disable(chip->regulator);
881
882         return ret;
883 }
884
885 /* convenience to stop overlong match-table lines */
886 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
887 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
888
889 static const struct of_device_id pca953x_dt_ids[] = {
890         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
891         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
892         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
893         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
894         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
895         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
896         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
897         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
898         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
899         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
900         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
901         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
902         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
903         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
904
905         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
906         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
907
908         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
909         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
910         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
911         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
912         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
913
914         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
915         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
916         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
917         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
918         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
919
920         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
921
922         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
923         { }
924 };
925
926 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
927
928 static struct i2c_driver pca953x_driver = {
929         .driver = {
930                 .name   = "pca953x",
931                 .of_match_table = pca953x_dt_ids,
932                 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
933         },
934         .probe          = pca953x_probe,
935         .remove         = pca953x_remove,
936         .id_table       = pca953x_id,
937 };
938
939 static int __init pca953x_init(void)
940 {
941         return i2c_add_driver(&pca953x_driver);
942 }
943 /* register after i2c postcore initcall and before
944  * subsys initcalls that may rely on these GPIOs
945  */
946 subsys_initcall(pca953x_init);
947
948 static void __exit pca953x_exit(void)
949 {
950         i2c_del_driver(&pca953x_driver);
951 }
952 module_exit(pca953x_exit);
953
954 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
955 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
956 MODULE_LICENSE("GPL");