Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux...
[linux-2.6-microblaze.git] / drivers / gpio / gpio-pca953x.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  PCA953x 4/8/16/24/40 bit I/O ports
4  *
5  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
6  *  Copyright (C) 2007 Marvell International Ltd.
7  *
8  *  Derived from drivers/i2c/chips/pca9539.c
9  */
10
11 #include <linux/acpi.h>
12 #include <linux/bitmap.h>
13 #include <linux/gpio/driver.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/module.h>
19 #include <linux/of_platform.h>
20 #include <linux/platform_data/pca953x.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24
25 #include <asm/unaligned.h>
26
27 #define PCA953X_INPUT           0x00
28 #define PCA953X_OUTPUT          0x01
29 #define PCA953X_INVERT          0x02
30 #define PCA953X_DIRECTION       0x03
31
32 #define REG_ADDR_MASK           GENMASK(5, 0)
33 #define REG_ADDR_EXT            BIT(6)
34 #define REG_ADDR_AI             BIT(7)
35
36 #define PCA957X_IN              0x00
37 #define PCA957X_INVRT           0x01
38 #define PCA957X_BKEN            0x02
39 #define PCA957X_PUPD            0x03
40 #define PCA957X_CFG             0x04
41 #define PCA957X_OUT             0x05
42 #define PCA957X_MSK             0x06
43 #define PCA957X_INTS            0x07
44
45 #define PCAL953X_OUT_STRENGTH   0x20
46 #define PCAL953X_IN_LATCH       0x22
47 #define PCAL953X_PULL_EN        0x23
48 #define PCAL953X_PULL_SEL       0x24
49 #define PCAL953X_INT_MASK       0x25
50 #define PCAL953X_INT_STAT       0x26
51 #define PCAL953X_OUT_CONF       0x27
52
53 #define PCAL6524_INT_EDGE       0x28
54 #define PCAL6524_INT_CLR        0x2a
55 #define PCAL6524_IN_STATUS      0x2b
56 #define PCAL6524_OUT_INDCONF    0x2c
57 #define PCAL6524_DEBOUNCE       0x2d
58
59 #define PCA_GPIO_MASK           GENMASK(7, 0)
60
61 #define PCAL_GPIO_MASK          GENMASK(4, 0)
62 #define PCAL_PINCTRL_MASK       GENMASK(6, 5)
63
64 #define PCA_INT                 BIT(8)
65 #define PCA_PCAL                BIT(9)
66 #define PCA_LATCH_INT           (PCA_PCAL | PCA_INT)
67 #define PCA953X_TYPE            BIT(12)
68 #define PCA957X_TYPE            BIT(13)
69 #define PCA_TYPE_MASK           GENMASK(15, 12)
70
71 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
72
73 static const struct i2c_device_id pca953x_id[] = {
74         { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
75         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
76         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
77         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
78         { "pca9536", 4  | PCA953X_TYPE, },
79         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
80         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
81         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
82         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
83         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
84         { "pca9556", 8  | PCA953X_TYPE, },
85         { "pca9557", 8  | PCA953X_TYPE, },
86         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
87         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
88         { "pca9698", 40 | PCA953X_TYPE, },
89
90         { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
91         { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
92         { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
93
94         { "max7310", 8  | PCA953X_TYPE, },
95         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
96         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
97         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
98         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
99         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
100         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
101         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
102         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
103         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
104         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
105         { "xra1202", 8  | PCA953X_TYPE },
106         { }
107 };
108 MODULE_DEVICE_TABLE(i2c, pca953x_id);
109
110 #ifdef CONFIG_GPIO_PCA953X_IRQ
111
112 #include <linux/dmi.h>
113 #include <linux/gpio.h>
114 #include <linux/list.h>
115
116 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = {
117         {
118                 /*
119                  * On Intel Galileo Gen 2 board the IRQ pin of one of
120                  * the I²C GPIO expanders, which has GpioInt() resource,
121                  * is provided as an absolute number instead of being
122                  * relative. Since first controller (gpio-sch.c) and
123                  * second (gpio-dwapb.c) are at the fixed bases, we may
124                  * safely refer to the number in the global space to get
125                  * an IRQ out of it.
126                  */
127                 .matches = {
128                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
129                 },
130         },
131         {}
132 };
133
134 #ifdef CONFIG_ACPI
135 static int pca953x_acpi_get_pin(struct acpi_resource *ares, void *data)
136 {
137         struct acpi_resource_gpio *agpio;
138         int *pin = data;
139
140         if (acpi_gpio_get_irq_resource(ares, &agpio))
141                 *pin = agpio->pin_table[0];
142         return 1;
143 }
144
145 static int pca953x_acpi_find_pin(struct device *dev)
146 {
147         struct acpi_device *adev = ACPI_COMPANION(dev);
148         int pin = -ENOENT, ret;
149         LIST_HEAD(r);
150
151         ret = acpi_dev_get_resources(adev, &r, pca953x_acpi_get_pin, &pin);
152         acpi_dev_free_resource_list(&r);
153         if (ret < 0)
154                 return ret;
155
156         return pin;
157 }
158 #else
159 static inline int pca953x_acpi_find_pin(struct device *dev) { return -ENXIO; }
160 #endif
161
162 static int pca953x_acpi_get_irq(struct device *dev)
163 {
164         int pin, ret;
165
166         pin = pca953x_acpi_find_pin(dev);
167         if (pin < 0)
168                 return pin;
169
170         dev_info(dev, "Applying ACPI interrupt quirk (GPIO %d)\n", pin);
171
172         if (!gpio_is_valid(pin))
173                 return -EINVAL;
174
175         ret = gpio_request(pin, "pca953x interrupt");
176         if (ret)
177                 return ret;
178
179         ret = gpio_to_irq(pin);
180
181         /* When pin is used as an IRQ, no need to keep it requested */
182         gpio_free(pin);
183
184         return ret;
185 }
186 #endif
187
188 static const struct acpi_device_id pca953x_acpi_ids[] = {
189         { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
190         { }
191 };
192 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
193
194 #define MAX_BANK 5
195 #define BANK_SZ 8
196 #define MAX_LINE        (MAX_BANK * BANK_SZ)
197
198 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
199
200 struct pca953x_reg_config {
201         int direction;
202         int output;
203         int input;
204         int invert;
205 };
206
207 static const struct pca953x_reg_config pca953x_regs = {
208         .direction = PCA953X_DIRECTION,
209         .output = PCA953X_OUTPUT,
210         .input = PCA953X_INPUT,
211         .invert = PCA953X_INVERT,
212 };
213
214 static const struct pca953x_reg_config pca957x_regs = {
215         .direction = PCA957X_CFG,
216         .output = PCA957X_OUT,
217         .input = PCA957X_IN,
218         .invert = PCA957X_INVRT,
219 };
220
221 struct pca953x_chip {
222         unsigned gpio_start;
223         struct mutex i2c_lock;
224         struct regmap *regmap;
225
226 #ifdef CONFIG_GPIO_PCA953X_IRQ
227         struct mutex irq_lock;
228         DECLARE_BITMAP(irq_mask, MAX_LINE);
229         DECLARE_BITMAP(irq_stat, MAX_LINE);
230         DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
231         DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
232         struct irq_chip irq_chip;
233 #endif
234         atomic_t wakeup_path;
235
236         struct i2c_client *client;
237         struct gpio_chip gpio_chip;
238         const char *const *names;
239         unsigned long driver_data;
240         struct regulator *regulator;
241
242         const struct pca953x_reg_config *regs;
243 };
244
245 static int pca953x_bank_shift(struct pca953x_chip *chip)
246 {
247         return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
248 }
249
250 #define PCA953x_BANK_INPUT      BIT(0)
251 #define PCA953x_BANK_OUTPUT     BIT(1)
252 #define PCA953x_BANK_POLARITY   BIT(2)
253 #define PCA953x_BANK_CONFIG     BIT(3)
254
255 #define PCA957x_BANK_INPUT      BIT(0)
256 #define PCA957x_BANK_POLARITY   BIT(1)
257 #define PCA957x_BANK_BUSHOLD    BIT(2)
258 #define PCA957x_BANK_CONFIG     BIT(4)
259 #define PCA957x_BANK_OUTPUT     BIT(5)
260
261 #define PCAL9xxx_BANK_IN_LATCH  BIT(8 + 2)
262 #define PCAL9xxx_BANK_PULL_EN   BIT(8 + 3)
263 #define PCAL9xxx_BANK_PULL_SEL  BIT(8 + 4)
264 #define PCAL9xxx_BANK_IRQ_MASK  BIT(8 + 5)
265 #define PCAL9xxx_BANK_IRQ_STAT  BIT(8 + 6)
266
267 /*
268  * We care about the following registers:
269  * - Standard set, below 0x40, each port can be replicated up to 8 times
270  *   - PCA953x standard
271  *     Input port                       0x00 + 0 * bank_size    R
272  *     Output port                      0x00 + 1 * bank_size    RW
273  *     Polarity Inversion port          0x00 + 2 * bank_size    RW
274  *     Configuration port               0x00 + 3 * bank_size    RW
275  *   - PCA957x with mixed up registers
276  *     Input port                       0x00 + 0 * bank_size    R
277  *     Polarity Inversion port          0x00 + 1 * bank_size    RW
278  *     Bus hold port                    0x00 + 2 * bank_size    RW
279  *     Configuration port               0x00 + 4 * bank_size    RW
280  *     Output port                      0x00 + 5 * bank_size    RW
281  *
282  * - Extended set, above 0x40, often chip specific.
283  *   - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
284  *     Input latch register             0x40 + 2 * bank_size    RW
285  *     Pull-up/pull-down enable reg     0x40 + 3 * bank_size    RW
286  *     Pull-up/pull-down select reg     0x40 + 4 * bank_size    RW
287  *     Interrupt mask register          0x40 + 5 * bank_size    RW
288  *     Interrupt status register        0x40 + 6 * bank_size    R
289  *
290  * - Registers with bit 0x80 set, the AI bit
291  *   The bit is cleared and the registers fall into one of the
292  *   categories above.
293  */
294
295 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
296                                    u32 checkbank)
297 {
298         int bank_shift = pca953x_bank_shift(chip);
299         int bank = (reg & REG_ADDR_MASK) >> bank_shift;
300         int offset = reg & (BIT(bank_shift) - 1);
301
302         /* Special PCAL extended register check. */
303         if (reg & REG_ADDR_EXT) {
304                 if (!(chip->driver_data & PCA_PCAL))
305                         return false;
306                 bank += 8;
307         }
308
309         /* Register is not in the matching bank. */
310         if (!(BIT(bank) & checkbank))
311                 return false;
312
313         /* Register is not within allowed range of bank. */
314         if (offset >= NBANK(chip))
315                 return false;
316
317         return true;
318 }
319
320 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
321 {
322         struct pca953x_chip *chip = dev_get_drvdata(dev);
323         u32 bank;
324
325         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
326                 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
327                        PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
328         } else {
329                 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
330                        PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
331                        PCA957x_BANK_BUSHOLD;
332         }
333
334         if (chip->driver_data & PCA_PCAL) {
335                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
336                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
337                         PCAL9xxx_BANK_IRQ_STAT;
338         }
339
340         return pca953x_check_register(chip, reg, bank);
341 }
342
343 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
344 {
345         struct pca953x_chip *chip = dev_get_drvdata(dev);
346         u32 bank;
347
348         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
349                 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
350                         PCA953x_BANK_CONFIG;
351         } else {
352                 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
353                         PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
354         }
355
356         if (chip->driver_data & PCA_PCAL)
357                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
358                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
359
360         return pca953x_check_register(chip, reg, bank);
361 }
362
363 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
364 {
365         struct pca953x_chip *chip = dev_get_drvdata(dev);
366         u32 bank;
367
368         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
369                 bank = PCA953x_BANK_INPUT;
370         else
371                 bank = PCA957x_BANK_INPUT;
372
373         if (chip->driver_data & PCA_PCAL)
374                 bank |= PCAL9xxx_BANK_IRQ_STAT;
375
376         return pca953x_check_register(chip, reg, bank);
377 }
378
379 static const struct regmap_config pca953x_i2c_regmap = {
380         .reg_bits = 8,
381         .val_bits = 8,
382
383         .readable_reg = pca953x_readable_register,
384         .writeable_reg = pca953x_writeable_register,
385         .volatile_reg = pca953x_volatile_register,
386
387         .disable_locking = true,
388         .cache_type = REGCACHE_RBTREE,
389         .max_register = 0x7f,
390 };
391
392 static const struct regmap_config pca953x_ai_i2c_regmap = {
393         .reg_bits = 8,
394         .val_bits = 8,
395
396         .read_flag_mask = REG_ADDR_AI,
397         .write_flag_mask = REG_ADDR_AI,
398
399         .readable_reg = pca953x_readable_register,
400         .writeable_reg = pca953x_writeable_register,
401         .volatile_reg = pca953x_volatile_register,
402
403         .disable_locking = true,
404         .cache_type = REGCACHE_RBTREE,
405         .max_register = 0x7f,
406 };
407
408 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off)
409 {
410         int bank_shift = pca953x_bank_shift(chip);
411         int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
412         int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
413         u8 regaddr = pinctrl | addr | (off / BANK_SZ);
414
415         return regaddr;
416 }
417
418 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
419 {
420         u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
421         u8 value[MAX_BANK];
422         int i, ret;
423
424         for (i = 0; i < NBANK(chip); i++)
425                 value[i] = bitmap_get_value8(val, i * BANK_SZ);
426
427         ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
428         if (ret < 0) {
429                 dev_err(&chip->client->dev, "failed writing register\n");
430                 return ret;
431         }
432
433         return 0;
434 }
435
436 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
437 {
438         u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
439         u8 value[MAX_BANK];
440         int i, ret;
441
442         ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip));
443         if (ret < 0) {
444                 dev_err(&chip->client->dev, "failed reading register\n");
445                 return ret;
446         }
447
448         for (i = 0; i < NBANK(chip); i++)
449                 bitmap_set_value8(val, value[i], i * BANK_SZ);
450
451         return 0;
452 }
453
454 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
455 {
456         struct pca953x_chip *chip = gpiochip_get_data(gc);
457         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
458         u8 bit = BIT(off % BANK_SZ);
459         int ret;
460
461         mutex_lock(&chip->i2c_lock);
462         ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
463         mutex_unlock(&chip->i2c_lock);
464         return ret;
465 }
466
467 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
468                 unsigned off, int val)
469 {
470         struct pca953x_chip *chip = gpiochip_get_data(gc);
471         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
472         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
473         u8 bit = BIT(off % BANK_SZ);
474         int ret;
475
476         mutex_lock(&chip->i2c_lock);
477         /* set output level */
478         ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
479         if (ret)
480                 goto exit;
481
482         /* then direction */
483         ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
484 exit:
485         mutex_unlock(&chip->i2c_lock);
486         return ret;
487 }
488
489 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
490 {
491         struct pca953x_chip *chip = gpiochip_get_data(gc);
492         u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off);
493         u8 bit = BIT(off % BANK_SZ);
494         u32 reg_val;
495         int ret;
496
497         mutex_lock(&chip->i2c_lock);
498         ret = regmap_read(chip->regmap, inreg, &reg_val);
499         mutex_unlock(&chip->i2c_lock);
500         if (ret < 0) {
501                 /*
502                  * NOTE:
503                  * diagnostic already emitted; that's all we should
504                  * do unless gpio_*_value_cansleep() calls become different
505                  * from their nonsleeping siblings (and report faults).
506                  */
507                 return 0;
508         }
509
510         return !!(reg_val & bit);
511 }
512
513 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
514 {
515         struct pca953x_chip *chip = gpiochip_get_data(gc);
516         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
517         u8 bit = BIT(off % BANK_SZ);
518
519         mutex_lock(&chip->i2c_lock);
520         regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
521         mutex_unlock(&chip->i2c_lock);
522 }
523
524 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
525 {
526         struct pca953x_chip *chip = gpiochip_get_data(gc);
527         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
528         u8 bit = BIT(off % BANK_SZ);
529         u32 reg_val;
530         int ret;
531
532         mutex_lock(&chip->i2c_lock);
533         ret = regmap_read(chip->regmap, dirreg, &reg_val);
534         mutex_unlock(&chip->i2c_lock);
535         if (ret < 0)
536                 return ret;
537
538         if (reg_val & bit)
539                 return GPIO_LINE_DIRECTION_IN;
540
541         return GPIO_LINE_DIRECTION_OUT;
542 }
543
544 static int pca953x_gpio_get_multiple(struct gpio_chip *gc,
545                                      unsigned long *mask, unsigned long *bits)
546 {
547         struct pca953x_chip *chip = gpiochip_get_data(gc);
548         DECLARE_BITMAP(reg_val, MAX_LINE);
549         int ret;
550
551         mutex_lock(&chip->i2c_lock);
552         ret = pca953x_read_regs(chip, chip->regs->input, reg_val);
553         mutex_unlock(&chip->i2c_lock);
554         if (ret)
555                 return ret;
556
557         bitmap_replace(bits, bits, reg_val, mask, gc->ngpio);
558         return 0;
559 }
560
561 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
562                                       unsigned long *mask, unsigned long *bits)
563 {
564         struct pca953x_chip *chip = gpiochip_get_data(gc);
565         DECLARE_BITMAP(reg_val, MAX_LINE);
566         int ret;
567
568         mutex_lock(&chip->i2c_lock);
569         ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
570         if (ret)
571                 goto exit;
572
573         bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio);
574
575         pca953x_write_regs(chip, chip->regs->output, reg_val);
576 exit:
577         mutex_unlock(&chip->i2c_lock);
578 }
579
580 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
581                                          unsigned int offset,
582                                          unsigned long config)
583 {
584         u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset);
585         u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset);
586         u8 bit = BIT(offset % BANK_SZ);
587         int ret;
588
589         /*
590          * pull-up/pull-down configuration requires PCAL extended
591          * registers
592          */
593         if (!(chip->driver_data & PCA_PCAL))
594                 return -ENOTSUPP;
595
596         mutex_lock(&chip->i2c_lock);
597
598         /* Disable pull-up/pull-down */
599         ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
600         if (ret)
601                 goto exit;
602
603         /* Configure pull-up/pull-down */
604         if (config == PIN_CONFIG_BIAS_PULL_UP)
605                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
606         else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
607                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
608         if (ret)
609                 goto exit;
610
611         /* Enable pull-up/pull-down */
612         ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
613
614 exit:
615         mutex_unlock(&chip->i2c_lock);
616         return ret;
617 }
618
619 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
620                                    unsigned long config)
621 {
622         struct pca953x_chip *chip = gpiochip_get_data(gc);
623
624         switch (pinconf_to_config_param(config)) {
625         case PIN_CONFIG_BIAS_PULL_UP:
626         case PIN_CONFIG_BIAS_PULL_DOWN:
627                 return pca953x_gpio_set_pull_up_down(chip, offset, config);
628         default:
629                 return -ENOTSUPP;
630         }
631 }
632
633 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
634 {
635         struct gpio_chip *gc;
636
637         gc = &chip->gpio_chip;
638
639         gc->direction_input  = pca953x_gpio_direction_input;
640         gc->direction_output = pca953x_gpio_direction_output;
641         gc->get = pca953x_gpio_get_value;
642         gc->set = pca953x_gpio_set_value;
643         gc->get_direction = pca953x_gpio_get_direction;
644         gc->get_multiple = pca953x_gpio_get_multiple;
645         gc->set_multiple = pca953x_gpio_set_multiple;
646         gc->set_config = pca953x_gpio_set_config;
647         gc->can_sleep = true;
648
649         gc->base = chip->gpio_start;
650         gc->ngpio = gpios;
651         gc->label = dev_name(&chip->client->dev);
652         gc->parent = &chip->client->dev;
653         gc->owner = THIS_MODULE;
654         gc->names = chip->names;
655 }
656
657 #ifdef CONFIG_GPIO_PCA953X_IRQ
658 static void pca953x_irq_mask(struct irq_data *d)
659 {
660         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
661         struct pca953x_chip *chip = gpiochip_get_data(gc);
662         irq_hw_number_t hwirq = irqd_to_hwirq(d);
663
664         clear_bit(hwirq, chip->irq_mask);
665 }
666
667 static void pca953x_irq_unmask(struct irq_data *d)
668 {
669         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
670         struct pca953x_chip *chip = gpiochip_get_data(gc);
671         irq_hw_number_t hwirq = irqd_to_hwirq(d);
672
673         set_bit(hwirq, chip->irq_mask);
674 }
675
676 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
677 {
678         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
679         struct pca953x_chip *chip = gpiochip_get_data(gc);
680
681         if (on)
682                 atomic_inc(&chip->wakeup_path);
683         else
684                 atomic_dec(&chip->wakeup_path);
685
686         return irq_set_irq_wake(chip->client->irq, on);
687 }
688
689 static void pca953x_irq_bus_lock(struct irq_data *d)
690 {
691         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
692         struct pca953x_chip *chip = gpiochip_get_data(gc);
693
694         mutex_lock(&chip->irq_lock);
695 }
696
697 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
698 {
699         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
700         struct pca953x_chip *chip = gpiochip_get_data(gc);
701         DECLARE_BITMAP(irq_mask, MAX_LINE);
702         DECLARE_BITMAP(reg_direction, MAX_LINE);
703         int level;
704
705         if (chip->driver_data & PCA_PCAL) {
706                 /* Enable latch on interrupt-enabled inputs */
707                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
708
709                 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
710
711                 /* Unmask enabled interrupts */
712                 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
713         }
714
715         /* Switch direction to input if needed */
716         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
717
718         bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
719         bitmap_complement(reg_direction, reg_direction, gc->ngpio);
720         bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);
721
722         /* Look for any newly setup interrupt */
723         for_each_set_bit(level, irq_mask, gc->ngpio)
724                 pca953x_gpio_direction_input(&chip->gpio_chip, level);
725
726         mutex_unlock(&chip->irq_lock);
727 }
728
729 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
730 {
731         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
732         struct pca953x_chip *chip = gpiochip_get_data(gc);
733         irq_hw_number_t hwirq = irqd_to_hwirq(d);
734
735         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
736                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
737                         d->irq, type);
738                 return -EINVAL;
739         }
740
741         assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING);
742         assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING);
743
744         return 0;
745 }
746
747 static void pca953x_irq_shutdown(struct irq_data *d)
748 {
749         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
750         struct pca953x_chip *chip = gpiochip_get_data(gc);
751         irq_hw_number_t hwirq = irqd_to_hwirq(d);
752
753         clear_bit(hwirq, chip->irq_trig_raise);
754         clear_bit(hwirq, chip->irq_trig_fall);
755 }
756
757 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending)
758 {
759         struct gpio_chip *gc = &chip->gpio_chip;
760         DECLARE_BITMAP(reg_direction, MAX_LINE);
761         DECLARE_BITMAP(old_stat, MAX_LINE);
762         DECLARE_BITMAP(cur_stat, MAX_LINE);
763         DECLARE_BITMAP(new_stat, MAX_LINE);
764         DECLARE_BITMAP(trigger, MAX_LINE);
765         int ret;
766
767         if (chip->driver_data & PCA_PCAL) {
768                 /* Read the current interrupt status from the device */
769                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
770                 if (ret)
771                         return false;
772
773                 /* Check latched inputs and clear interrupt status */
774                 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
775                 if (ret)
776                         return false;
777
778                 /* Apply filter for rising/falling edge selection */
779                 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio);
780
781                 bitmap_and(pending, new_stat, trigger, gc->ngpio);
782
783                 return !bitmap_empty(pending, gc->ngpio);
784         }
785
786         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
787         if (ret)
788                 return false;
789
790         /* Remove output pins from the equation */
791         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
792
793         bitmap_copy(old_stat, chip->irq_stat, gc->ngpio);
794
795         bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio);
796         bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio);
797         bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
798
799         if (bitmap_empty(trigger, gc->ngpio))
800                 return false;
801
802         bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
803
804         bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
805         bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
806         bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio);
807         bitmap_and(pending, new_stat, trigger, gc->ngpio);
808
809         return !bitmap_empty(pending, gc->ngpio);
810 }
811
812 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
813 {
814         struct pca953x_chip *chip = devid;
815         struct gpio_chip *gc = &chip->gpio_chip;
816         DECLARE_BITMAP(pending, MAX_LINE);
817         int level;
818         bool ret;
819
820         mutex_lock(&chip->i2c_lock);
821         ret = pca953x_irq_pending(chip, pending);
822         mutex_unlock(&chip->i2c_lock);
823
824         for_each_set_bit(level, pending, gc->ngpio)
825                 handle_nested_irq(irq_find_mapping(gc->irq.domain, level));
826
827         return IRQ_RETVAL(ret);
828 }
829
830 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)
831 {
832         struct i2c_client *client = chip->client;
833         struct irq_chip *irq_chip = &chip->irq_chip;
834         DECLARE_BITMAP(reg_direction, MAX_LINE);
835         DECLARE_BITMAP(irq_stat, MAX_LINE);
836         int ret;
837
838         if (dmi_first_match(pca953x_dmi_acpi_irq_info)) {
839                 ret = pca953x_acpi_get_irq(&client->dev);
840                 if (ret > 0)
841                         client->irq = ret;
842         }
843
844         if (!client->irq)
845                 return 0;
846
847         if (irq_base == -1)
848                 return 0;
849
850         if (!(chip->driver_data & PCA_INT))
851                 return 0;
852
853         ret = pca953x_read_regs(chip, chip->regs->input, irq_stat);
854         if (ret)
855                 return ret;
856
857         /*
858          * There is no way to know which GPIO line generated the
859          * interrupt.  We have to rely on the previous read for
860          * this purpose.
861          */
862         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
863         bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio);
864         mutex_init(&chip->irq_lock);
865
866         ret = devm_request_threaded_irq(&client->dev, client->irq,
867                                         NULL, pca953x_irq_handler,
868                                         IRQF_ONESHOT | IRQF_SHARED,
869                                         dev_name(&client->dev), chip);
870         if (ret) {
871                 dev_err(&client->dev, "failed to request irq %d\n",
872                         client->irq);
873                 return ret;
874         }
875
876         irq_chip->name = dev_name(&chip->client->dev);
877         irq_chip->irq_mask = pca953x_irq_mask;
878         irq_chip->irq_unmask = pca953x_irq_unmask;
879         irq_chip->irq_set_wake = pca953x_irq_set_wake;
880         irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
881         irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
882         irq_chip->irq_set_type = pca953x_irq_set_type;
883         irq_chip->irq_shutdown = pca953x_irq_shutdown;
884
885         ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
886                                           irq_base, handle_simple_irq,
887                                           IRQ_TYPE_NONE);
888         if (ret) {
889                 dev_err(&client->dev,
890                         "could not connect irqchip to gpiochip\n");
891                 return ret;
892         }
893
894         gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
895
896         return 0;
897 }
898
899 #else /* CONFIG_GPIO_PCA953X_IRQ */
900 static int pca953x_irq_setup(struct pca953x_chip *chip,
901                              int irq_base)
902 {
903         struct i2c_client *client = chip->client;
904
905         if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
906                 dev_warn(&client->dev, "interrupt support not compiled in\n");
907
908         return 0;
909 }
910 #endif
911
912 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
913 {
914         DECLARE_BITMAP(val, MAX_LINE);
915         int ret;
916
917         ret = regcache_sync_region(chip->regmap, chip->regs->output,
918                                    chip->regs->output + NBANK(chip));
919         if (ret)
920                 goto out;
921
922         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
923                                    chip->regs->direction + NBANK(chip));
924         if (ret)
925                 goto out;
926
927         /* set platform specific polarity inversion */
928         if (invert)
929                 bitmap_fill(val, MAX_LINE);
930         else
931                 bitmap_zero(val, MAX_LINE);
932
933         ret = pca953x_write_regs(chip, chip->regs->invert, val);
934 out:
935         return ret;
936 }
937
938 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
939 {
940         DECLARE_BITMAP(val, MAX_LINE);
941         int ret;
942
943         ret = device_pca95xx_init(chip, invert);
944         if (ret)
945                 goto out;
946
947         /* To enable register 6, 7 to control pull up and pull down */
948         memset(val, 0x02, NBANK(chip));
949         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
950         if (ret)
951                 goto out;
952
953         return 0;
954 out:
955         return ret;
956 }
957
958 static int pca953x_probe(struct i2c_client *client,
959                          const struct i2c_device_id *i2c_id)
960 {
961         struct pca953x_platform_data *pdata;
962         struct pca953x_chip *chip;
963         int irq_base = 0;
964         int ret;
965         u32 invert = 0;
966         struct regulator *reg;
967         const struct regmap_config *regmap_config;
968
969         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
970         if (chip == NULL)
971                 return -ENOMEM;
972
973         pdata = dev_get_platdata(&client->dev);
974         if (pdata) {
975                 irq_base = pdata->irq_base;
976                 chip->gpio_start = pdata->gpio_base;
977                 invert = pdata->invert;
978                 chip->names = pdata->names;
979         } else {
980                 struct gpio_desc *reset_gpio;
981
982                 chip->gpio_start = -1;
983                 irq_base = 0;
984
985                 /*
986                  * See if we need to de-assert a reset pin.
987                  *
988                  * There is no known ACPI-enabled platforms that are
989                  * using "reset" GPIO. Otherwise any of those platform
990                  * must use _DSD method with corresponding property.
991                  */
992                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
993                                                      GPIOD_OUT_LOW);
994                 if (IS_ERR(reset_gpio))
995                         return PTR_ERR(reset_gpio);
996         }
997
998         chip->client = client;
999
1000         reg = devm_regulator_get(&client->dev, "vcc");
1001         if (IS_ERR(reg)) {
1002                 ret = PTR_ERR(reg);
1003                 if (ret != -EPROBE_DEFER)
1004                         dev_err(&client->dev, "reg get err: %d\n", ret);
1005                 return ret;
1006         }
1007         ret = regulator_enable(reg);
1008         if (ret) {
1009                 dev_err(&client->dev, "reg en err: %d\n", ret);
1010                 return ret;
1011         }
1012         chip->regulator = reg;
1013
1014         if (i2c_id) {
1015                 chip->driver_data = i2c_id->driver_data;
1016         } else {
1017                 const void *match;
1018
1019                 match = device_get_match_data(&client->dev);
1020                 if (!match) {
1021                         ret = -ENODEV;
1022                         goto err_exit;
1023                 }
1024
1025                 chip->driver_data = (uintptr_t)match;
1026         }
1027
1028         i2c_set_clientdata(client, chip);
1029
1030         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
1031
1032         if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
1033                 dev_info(&client->dev, "using AI\n");
1034                 regmap_config = &pca953x_ai_i2c_regmap;
1035         } else {
1036                 dev_info(&client->dev, "using no AI\n");
1037                 regmap_config = &pca953x_i2c_regmap;
1038         }
1039
1040         chip->regmap = devm_regmap_init_i2c(client, regmap_config);
1041         if (IS_ERR(chip->regmap)) {
1042                 ret = PTR_ERR(chip->regmap);
1043                 goto err_exit;
1044         }
1045
1046         regcache_mark_dirty(chip->regmap);
1047
1048         mutex_init(&chip->i2c_lock);
1049         /*
1050          * In case we have an i2c-mux controlled by a GPIO provided by an
1051          * expander using the same driver higher on the device tree, read the
1052          * i2c adapter nesting depth and use the retrieved value as lockdep
1053          * subclass for chip->i2c_lock.
1054          *
1055          * REVISIT: This solution is not complete. It protects us from lockdep
1056          * false positives when the expander controlling the i2c-mux is on
1057          * a different level on the device tree, but not when it's on the same
1058          * level on a different branch (in which case the subclass number
1059          * would be the same).
1060          *
1061          * TODO: Once a correct solution is developed, a similar fix should be
1062          * applied to all other i2c-controlled GPIO expanders (and potentially
1063          * regmap-i2c).
1064          */
1065         lockdep_set_subclass(&chip->i2c_lock,
1066                              i2c_adapter_depth(client->adapter));
1067
1068         /* initialize cached registers from their original values.
1069          * we can't share this chip with another i2c master.
1070          */
1071
1072         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1073                 chip->regs = &pca953x_regs;
1074                 ret = device_pca95xx_init(chip, invert);
1075         } else {
1076                 chip->regs = &pca957x_regs;
1077                 ret = device_pca957x_init(chip, invert);
1078         }
1079         if (ret)
1080                 goto err_exit;
1081
1082         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1083         if (ret)
1084                 goto err_exit;
1085
1086         ret = pca953x_irq_setup(chip, irq_base);
1087         if (ret)
1088                 goto err_exit;
1089
1090         if (pdata && pdata->setup) {
1091                 ret = pdata->setup(client, chip->gpio_chip.base,
1092                                    chip->gpio_chip.ngpio, pdata->context);
1093                 if (ret < 0)
1094                         dev_warn(&client->dev, "setup failed, %d\n", ret);
1095         }
1096
1097         return 0;
1098
1099 err_exit:
1100         regulator_disable(chip->regulator);
1101         return ret;
1102 }
1103
1104 static int pca953x_remove(struct i2c_client *client)
1105 {
1106         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1107         struct pca953x_chip *chip = i2c_get_clientdata(client);
1108         int ret;
1109
1110         if (pdata && pdata->teardown) {
1111                 ret = pdata->teardown(client, chip->gpio_chip.base,
1112                                       chip->gpio_chip.ngpio, pdata->context);
1113                 if (ret < 0)
1114                         dev_err(&client->dev, "teardown failed, %d\n", ret);
1115         } else {
1116                 ret = 0;
1117         }
1118
1119         regulator_disable(chip->regulator);
1120
1121         return ret;
1122 }
1123
1124 #ifdef CONFIG_PM_SLEEP
1125 static int pca953x_regcache_sync(struct device *dev)
1126 {
1127         struct pca953x_chip *chip = dev_get_drvdata(dev);
1128         int ret;
1129
1130         /*
1131          * The ordering between direction and output is important,
1132          * sync these registers first and only then sync the rest.
1133          */
1134         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1135                                    chip->regs->direction + NBANK(chip));
1136         if (ret) {
1137                 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1138                 return ret;
1139         }
1140
1141         ret = regcache_sync_region(chip->regmap, chip->regs->output,
1142                                    chip->regs->output + NBANK(chip));
1143         if (ret) {
1144                 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1145                 return ret;
1146         }
1147
1148 #ifdef CONFIG_GPIO_PCA953X_IRQ
1149         if (chip->driver_data & PCA_PCAL) {
1150                 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1151                                            PCAL953X_IN_LATCH + NBANK(chip));
1152                 if (ret) {
1153                         dev_err(dev, "Failed to sync INT latch registers: %d\n",
1154                                 ret);
1155                         return ret;
1156                 }
1157
1158                 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1159                                            PCAL953X_INT_MASK + NBANK(chip));
1160                 if (ret) {
1161                         dev_err(dev, "Failed to sync INT mask registers: %d\n",
1162                                 ret);
1163                         return ret;
1164                 }
1165         }
1166 #endif
1167
1168         return 0;
1169 }
1170
1171 static int pca953x_suspend(struct device *dev)
1172 {
1173         struct pca953x_chip *chip = dev_get_drvdata(dev);
1174
1175         regcache_cache_only(chip->regmap, true);
1176
1177         if (atomic_read(&chip->wakeup_path))
1178                 device_set_wakeup_path(dev);
1179         else
1180                 regulator_disable(chip->regulator);
1181
1182         return 0;
1183 }
1184
1185 static int pca953x_resume(struct device *dev)
1186 {
1187         struct pca953x_chip *chip = dev_get_drvdata(dev);
1188         int ret;
1189
1190         if (!atomic_read(&chip->wakeup_path)) {
1191                 ret = regulator_enable(chip->regulator);
1192                 if (ret) {
1193                         dev_err(dev, "Failed to enable regulator: %d\n", ret);
1194                         return 0;
1195                 }
1196         }
1197
1198         regcache_cache_only(chip->regmap, false);
1199         regcache_mark_dirty(chip->regmap);
1200         ret = pca953x_regcache_sync(dev);
1201         if (ret)
1202                 return ret;
1203
1204         ret = regcache_sync(chip->regmap);
1205         if (ret) {
1206                 dev_err(dev, "Failed to restore register map: %d\n", ret);
1207                 return ret;
1208         }
1209
1210         return 0;
1211 }
1212 #endif
1213
1214 /* convenience to stop overlong match-table lines */
1215 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1216 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1217
1218 static const struct of_device_id pca953x_dt_ids[] = {
1219         { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1220         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1221         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1222         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1223         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1224         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1225         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1226         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1227         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1228         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1229         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1230         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1231         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1232         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1233         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1234
1235         { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1236         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1237         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1238
1239         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1240         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1241         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1242         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1243         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1244
1245         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1246         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1247         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1248         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1249         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1250         { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1251
1252         { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1253         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1254
1255         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1256         { }
1257 };
1258
1259 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1260
1261 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1262
1263 static struct i2c_driver pca953x_driver = {
1264         .driver = {
1265                 .name   = "pca953x",
1266                 .pm     = &pca953x_pm_ops,
1267                 .of_match_table = pca953x_dt_ids,
1268                 .acpi_match_table = pca953x_acpi_ids,
1269         },
1270         .probe          = pca953x_probe,
1271         .remove         = pca953x_remove,
1272         .id_table       = pca953x_id,
1273 };
1274
1275 static int __init pca953x_init(void)
1276 {
1277         return i2c_add_driver(&pca953x_driver);
1278 }
1279 /* register after i2c postcore initcall and before
1280  * subsys initcalls that may rely on these GPIOs
1281  */
1282 subsys_initcall(pca953x_init);
1283
1284 static void __exit pca953x_exit(void)
1285 {
1286         i2c_del_driver(&pca953x_driver);
1287 }
1288 module_exit(pca953x_exit);
1289
1290 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1291 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1292 MODULE_LICENSE("GPL");