2 * PCA953x 4/8/16/24/40 bit I/O ports
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
7 * Derived from drivers/i2c/chips/pca9539.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
14 #include <linux/acpi.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_data/pca953x.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
26 #include <asm/unaligned.h>
28 #define PCA953X_INPUT 0x00
29 #define PCA953X_OUTPUT 0x01
30 #define PCA953X_INVERT 0x02
31 #define PCA953X_DIRECTION 0x03
33 #define REG_ADDR_AI 0x80
35 #define PCA957X_IN 0x00
36 #define PCA957X_INVRT 0x01
37 #define PCA957X_BKEN 0x02
38 #define PCA957X_PUPD 0x03
39 #define PCA957X_CFG 0x04
40 #define PCA957X_OUT 0x05
41 #define PCA957X_MSK 0x06
42 #define PCA957X_INTS 0x07
44 #define PCAL953X_OUT_STRENGTH 0x20
45 #define PCAL953X_IN_LATCH 0x22
46 #define PCAL953X_PULL_EN 0x23
47 #define PCAL953X_PULL_SEL 0x24
48 #define PCAL953X_INT_MASK 0x25
49 #define PCAL953X_INT_STAT 0x26
50 #define PCAL953X_OUT_CONF 0x27
52 #define PCAL6524_INT_EDGE 0x28
53 #define PCAL6524_INT_CLR 0x2a
54 #define PCAL6524_IN_STATUS 0x2b
55 #define PCAL6524_OUT_INDCONF 0x2c
56 #define PCAL6524_DEBOUNCE 0x2d
58 #define PCA_GPIO_MASK 0x00FF
60 #define PCAL_GPIO_MASK 0x1f
61 #define PCAL_PINCTRL_MASK 0x60
63 #define PCA_INT 0x0100
64 #define PCA_PCAL 0x0200
65 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
66 #define PCA953X_TYPE 0x1000
67 #define PCA957X_TYPE 0x2000
68 #define PCA_TYPE_MASK 0xF000
70 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
72 static const struct i2c_device_id pca953x_id[] = {
73 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
74 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
75 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
76 { "pca9536", 4 | PCA953X_TYPE, },
77 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
78 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
79 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
80 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
81 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
82 { "pca9556", 8 | PCA953X_TYPE, },
83 { "pca9557", 8 | PCA953X_TYPE, },
84 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
85 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
86 { "pca9698", 40 | PCA953X_TYPE, },
88 { "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
89 { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
91 { "max7310", 8 | PCA953X_TYPE, },
92 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
93 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
94 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
95 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
96 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
97 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
98 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
99 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
100 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
101 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
102 { "xra1202", 8 | PCA953X_TYPE },
105 MODULE_DEVICE_TABLE(i2c, pca953x_id);
107 static const struct acpi_device_id pca953x_acpi_ids[] = {
108 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
111 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
116 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
118 struct pca953x_reg_config {
124 static const struct pca953x_reg_config pca953x_regs = {
125 .direction = PCA953X_DIRECTION,
126 .output = PCA953X_OUTPUT,
127 .input = PCA953X_INPUT,
130 static const struct pca953x_reg_config pca957x_regs = {
131 .direction = PCA957X_CFG,
132 .output = PCA957X_OUT,
136 struct pca953x_chip {
138 u8 reg_output[MAX_BANK];
139 u8 reg_direction[MAX_BANK];
140 struct mutex i2c_lock;
142 #ifdef CONFIG_GPIO_PCA953X_IRQ
143 struct mutex irq_lock;
144 u8 irq_mask[MAX_BANK];
145 u8 irq_stat[MAX_BANK];
146 u8 irq_trig_raise[MAX_BANK];
147 u8 irq_trig_fall[MAX_BANK];
150 struct i2c_client *client;
151 struct gpio_chip gpio_chip;
152 const char *const *names;
153 unsigned long driver_data;
154 struct regulator *regulator;
156 const struct pca953x_reg_config *regs;
158 int (*write_regs)(struct pca953x_chip *, int, u8 *);
159 int (*read_regs)(struct pca953x_chip *, int, u8 *);
162 static int pca953x_bank_shift(struct pca953x_chip *chip)
164 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
167 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
171 int bank_shift = pca953x_bank_shift(chip);
172 int offset = off / BANK_SZ;
174 ret = i2c_smbus_read_byte_data(chip->client,
175 (reg << bank_shift) + offset);
179 dev_err(&chip->client->dev, "failed reading register\n");
186 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
190 int bank_shift = pca953x_bank_shift(chip);
191 int offset = off / BANK_SZ;
193 ret = i2c_smbus_write_byte_data(chip->client,
194 (reg << bank_shift) + offset, val);
197 dev_err(&chip->client->dev, "failed writing register\n");
204 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
206 return i2c_smbus_write_byte_data(chip->client, reg, *val);
209 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
211 u32 regaddr = (reg << 1);
213 /* PCA9575 needs address-increment on multi-byte writes */
214 if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
215 regaddr |= REG_ADDR_AI;
217 return i2c_smbus_write_i2c_block_data(chip->client, regaddr,
221 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
223 int bank_shift = pca953x_bank_shift(chip);
224 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
225 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
227 return i2c_smbus_write_i2c_block_data(chip->client,
228 pinctrl | addr | REG_ADDR_AI,
232 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
236 ret = chip->write_regs(chip, reg, val);
238 dev_err(&chip->client->dev, "failed writing register\n");
245 static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
249 ret = i2c_smbus_read_byte_data(chip->client, reg);
255 static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
259 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
260 put_unaligned(ret, (u16 *)val);
265 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
267 int bank_shift = pca953x_bank_shift(chip);
268 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
269 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
271 return i2c_smbus_read_i2c_block_data(chip->client,
272 pinctrl | addr | REG_ADDR_AI,
276 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
280 ret = chip->read_regs(chip, reg, val);
282 dev_err(&chip->client->dev, "failed reading register\n");
289 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
291 struct pca953x_chip *chip = gpiochip_get_data(gc);
295 mutex_lock(&chip->i2c_lock);
296 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
298 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
302 chip->reg_direction[off / BANK_SZ] = reg_val;
304 mutex_unlock(&chip->i2c_lock);
308 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
309 unsigned off, int val)
311 struct pca953x_chip *chip = gpiochip_get_data(gc);
315 mutex_lock(&chip->i2c_lock);
316 /* set output level */
318 reg_val = chip->reg_output[off / BANK_SZ]
319 | (1u << (off % BANK_SZ));
321 reg_val = chip->reg_output[off / BANK_SZ]
322 & ~(1u << (off % BANK_SZ));
324 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
328 chip->reg_output[off / BANK_SZ] = reg_val;
331 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
332 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
336 chip->reg_direction[off / BANK_SZ] = reg_val;
338 mutex_unlock(&chip->i2c_lock);
342 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
344 struct pca953x_chip *chip = gpiochip_get_data(gc);
348 mutex_lock(&chip->i2c_lock);
349 ret = pca953x_read_single(chip, chip->regs->input, ®_val, off);
350 mutex_unlock(&chip->i2c_lock);
352 /* NOTE: diagnostic already emitted; that's all we should
353 * do unless gpio_*_value_cansleep() calls become different
354 * from their nonsleeping siblings (and report faults).
359 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
362 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
364 struct pca953x_chip *chip = gpiochip_get_data(gc);
368 mutex_lock(&chip->i2c_lock);
370 reg_val = chip->reg_output[off / BANK_SZ]
371 | (1u << (off % BANK_SZ));
373 reg_val = chip->reg_output[off / BANK_SZ]
374 & ~(1u << (off % BANK_SZ));
376 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
380 chip->reg_output[off / BANK_SZ] = reg_val;
382 mutex_unlock(&chip->i2c_lock);
385 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
387 struct pca953x_chip *chip = gpiochip_get_data(gc);
391 mutex_lock(&chip->i2c_lock);
392 ret = pca953x_read_single(chip, chip->regs->direction, ®_val, off);
393 mutex_unlock(&chip->i2c_lock);
397 return !!(reg_val & (1u << (off % BANK_SZ)));
400 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
401 unsigned long *mask, unsigned long *bits)
403 struct pca953x_chip *chip = gpiochip_get_data(gc);
404 int bank_shift = pca953x_bank_shift(chip);
405 u32 regaddr = chip->regs->output << bank_shift;
406 unsigned int bank_mask, bank_val;
408 u8 reg_val[MAX_BANK];
411 mutex_lock(&chip->i2c_lock);
412 memcpy(reg_val, chip->reg_output, NBANK(chip));
413 for (bank = 0; bank < NBANK(chip); bank++) {
414 bank_mask = mask[bank / sizeof(*mask)] >>
415 ((bank % sizeof(*mask)) * 8);
417 bank_val = bits[bank / sizeof(*bits)] >>
418 ((bank % sizeof(*bits)) * 8);
419 bank_val &= bank_mask;
420 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
424 /* PCA9575 needs address-increment on multi-byte writes */
425 if ((PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) &&
427 regaddr |= REG_ADDR_AI;
430 ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr,
431 NBANK(chip), reg_val);
435 memcpy(chip->reg_output, reg_val, NBANK(chip));
437 mutex_unlock(&chip->i2c_lock);
440 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
442 struct gpio_chip *gc;
444 gc = &chip->gpio_chip;
446 gc->direction_input = pca953x_gpio_direction_input;
447 gc->direction_output = pca953x_gpio_direction_output;
448 gc->get = pca953x_gpio_get_value;
449 gc->set = pca953x_gpio_set_value;
450 gc->get_direction = pca953x_gpio_get_direction;
451 gc->set_multiple = pca953x_gpio_set_multiple;
452 gc->can_sleep = true;
454 gc->base = chip->gpio_start;
456 gc->label = chip->client->name;
457 gc->parent = &chip->client->dev;
458 gc->owner = THIS_MODULE;
459 gc->names = chip->names;
462 #ifdef CONFIG_GPIO_PCA953X_IRQ
463 static void pca953x_irq_mask(struct irq_data *d)
465 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
466 struct pca953x_chip *chip = gpiochip_get_data(gc);
468 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
471 static void pca953x_irq_unmask(struct irq_data *d)
473 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
474 struct pca953x_chip *chip = gpiochip_get_data(gc);
476 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
479 static void pca953x_irq_bus_lock(struct irq_data *d)
481 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
482 struct pca953x_chip *chip = gpiochip_get_data(gc);
484 mutex_lock(&chip->irq_lock);
487 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
489 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
490 struct pca953x_chip *chip = gpiochip_get_data(gc);
493 u8 invert_irq_mask[MAX_BANK];
495 if (chip->driver_data & PCA_PCAL) {
496 /* Enable latch on interrupt-enabled inputs */
497 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
499 for (i = 0; i < NBANK(chip); i++)
500 invert_irq_mask[i] = ~chip->irq_mask[i];
502 /* Unmask enabled interrupts */
503 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
506 /* Look for any newly setup interrupt */
507 for (i = 0; i < NBANK(chip); i++) {
508 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
509 new_irqs &= ~chip->reg_direction[i];
512 level = __ffs(new_irqs);
513 pca953x_gpio_direction_input(&chip->gpio_chip,
514 level + (BANK_SZ * i));
515 new_irqs &= ~(1 << level);
519 mutex_unlock(&chip->irq_lock);
522 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
524 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
525 struct pca953x_chip *chip = gpiochip_get_data(gc);
526 int bank_nb = d->hwirq / BANK_SZ;
527 u8 mask = 1 << (d->hwirq % BANK_SZ);
529 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
530 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
535 if (type & IRQ_TYPE_EDGE_FALLING)
536 chip->irq_trig_fall[bank_nb] |= mask;
538 chip->irq_trig_fall[bank_nb] &= ~mask;
540 if (type & IRQ_TYPE_EDGE_RISING)
541 chip->irq_trig_raise[bank_nb] |= mask;
543 chip->irq_trig_raise[bank_nb] &= ~mask;
548 static void pca953x_irq_shutdown(struct irq_data *d)
550 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
551 u8 mask = 1 << (d->hwirq % BANK_SZ);
553 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
554 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
557 static struct irq_chip pca953x_irq_chip = {
559 .irq_mask = pca953x_irq_mask,
560 .irq_unmask = pca953x_irq_unmask,
561 .irq_bus_lock = pca953x_irq_bus_lock,
562 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
563 .irq_set_type = pca953x_irq_set_type,
564 .irq_shutdown = pca953x_irq_shutdown,
567 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
569 u8 cur_stat[MAX_BANK];
570 u8 old_stat[MAX_BANK];
571 bool pending_seen = false;
572 bool trigger_seen = false;
573 u8 trigger[MAX_BANK];
576 if (chip->driver_data & PCA_PCAL) {
577 /* Read the current interrupt status from the device */
578 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
582 /* Check latched inputs and clear interrupt status */
583 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
587 for (i = 0; i < NBANK(chip); i++) {
588 /* Apply filter for rising/falling edge selection */
589 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
590 (cur_stat[i] & chip->irq_trig_raise[i]);
591 pending[i] &= trigger[i];
599 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
603 /* Remove output pins from the equation */
604 for (i = 0; i < NBANK(chip); i++)
605 cur_stat[i] &= chip->reg_direction[i];
607 memcpy(old_stat, chip->irq_stat, NBANK(chip));
609 for (i = 0; i < NBANK(chip); i++) {
610 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
618 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
620 for (i = 0; i < NBANK(chip); i++) {
621 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
622 (cur_stat[i] & chip->irq_trig_raise[i]);
623 pending[i] &= trigger[i];
631 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
633 struct pca953x_chip *chip = devid;
634 u8 pending[MAX_BANK];
636 unsigned nhandled = 0;
639 if (!pca953x_irq_pending(chip, pending))
642 for (i = 0; i < NBANK(chip); i++) {
644 level = __ffs(pending[i]);
645 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
646 level + (BANK_SZ * i)));
647 pending[i] &= ~(1 << level);
652 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
655 static int pca953x_irq_setup(struct pca953x_chip *chip,
658 struct i2c_client *client = chip->client;
661 if (client->irq && irq_base != -1
662 && (chip->driver_data & PCA_INT)) {
663 ret = pca953x_read_regs(chip,
664 chip->regs->input, chip->irq_stat);
669 * There is no way to know which GPIO line generated the
670 * interrupt. We have to rely on the previous read for
673 for (i = 0; i < NBANK(chip); i++)
674 chip->irq_stat[i] &= chip->reg_direction[i];
675 mutex_init(&chip->irq_lock);
677 ret = devm_request_threaded_irq(&client->dev,
681 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
683 dev_name(&client->dev), chip);
685 dev_err(&client->dev, "failed to request irq %d\n",
690 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip,
696 dev_err(&client->dev,
697 "could not connect irqchip to gpiochip\n");
701 gpiochip_set_nested_irqchip(&chip->gpio_chip,
709 #else /* CONFIG_GPIO_PCA953X_IRQ */
710 static int pca953x_irq_setup(struct pca953x_chip *chip,
713 struct i2c_client *client = chip->client;
715 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
716 dev_warn(&client->dev, "interrupt support not compiled in\n");
722 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
727 chip->regs = &pca953x_regs;
729 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
733 ret = pca953x_read_regs(chip, chip->regs->direction,
734 chip->reg_direction);
738 /* set platform specific polarity inversion */
740 memset(val, 0xFF, NBANK(chip));
742 memset(val, 0, NBANK(chip));
744 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
749 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
754 chip->regs = &pca957x_regs;
756 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
759 ret = pca953x_read_regs(chip, chip->regs->direction,
760 chip->reg_direction);
764 /* set platform specific polarity inversion */
766 memset(val, 0xFF, NBANK(chip));
768 memset(val, 0, NBANK(chip));
769 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
773 /* To enable register 6, 7 to control pull up and pull down */
774 memset(val, 0x02, NBANK(chip));
775 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
784 static const struct of_device_id pca953x_dt_ids[];
786 static int pca953x_probe(struct i2c_client *client,
787 const struct i2c_device_id *i2c_id)
789 struct pca953x_platform_data *pdata;
790 struct pca953x_chip *chip;
794 struct regulator *reg;
796 chip = devm_kzalloc(&client->dev,
797 sizeof(struct pca953x_chip), GFP_KERNEL);
801 pdata = dev_get_platdata(&client->dev);
803 irq_base = pdata->irq_base;
804 chip->gpio_start = pdata->gpio_base;
805 invert = pdata->invert;
806 chip->names = pdata->names;
808 struct gpio_desc *reset_gpio;
810 chip->gpio_start = -1;
814 * See if we need to de-assert a reset pin.
816 * There is no known ACPI-enabled platforms that are
817 * using "reset" GPIO. Otherwise any of those platform
818 * must use _DSD method with corresponding property.
820 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
822 if (IS_ERR(reset_gpio))
823 return PTR_ERR(reset_gpio);
826 chip->client = client;
828 reg = devm_regulator_get(&client->dev, "vcc");
831 if (ret != -EPROBE_DEFER)
832 dev_err(&client->dev, "reg get err: %d\n", ret);
835 ret = regulator_enable(reg);
837 dev_err(&client->dev, "reg en err: %d\n", ret);
840 chip->regulator = reg;
843 chip->driver_data = i2c_id->driver_data;
845 const struct acpi_device_id *acpi_id;
846 struct device *dev = &client->dev;
848 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
849 if (!chip->driver_data) {
850 acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
856 chip->driver_data = acpi_id->driver_data;
860 mutex_init(&chip->i2c_lock);
862 * In case we have an i2c-mux controlled by a GPIO provided by an
863 * expander using the same driver higher on the device tree, read the
864 * i2c adapter nesting depth and use the retrieved value as lockdep
865 * subclass for chip->i2c_lock.
867 * REVISIT: This solution is not complete. It protects us from lockdep
868 * false positives when the expander controlling the i2c-mux is on
869 * a different level on the device tree, but not when it's on the same
870 * level on a different branch (in which case the subclass number
871 * would be the same).
873 * TODO: Once a correct solution is developed, a similar fix should be
874 * applied to all other i2c-controlled GPIO expanders (and potentially
877 lockdep_set_subclass(&chip->i2c_lock,
878 i2c_adapter_depth(client->adapter));
880 /* initialize cached registers from their original values.
881 * we can't share this chip with another i2c master.
883 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
885 if (chip->gpio_chip.ngpio <= 8) {
886 chip->write_regs = pca953x_write_regs_8;
887 chip->read_regs = pca953x_read_regs_8;
888 } else if (chip->gpio_chip.ngpio >= 24) {
889 chip->write_regs = pca953x_write_regs_24;
890 chip->read_regs = pca953x_read_regs_24;
892 chip->write_regs = pca953x_write_regs_16;
893 chip->read_regs = pca953x_read_regs_16;
896 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
897 ret = device_pca953x_init(chip, invert);
899 ret = device_pca957x_init(chip, invert);
903 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
907 ret = pca953x_irq_setup(chip, irq_base);
911 if (pdata && pdata->setup) {
912 ret = pdata->setup(client, chip->gpio_chip.base,
913 chip->gpio_chip.ngpio, pdata->context);
915 dev_warn(&client->dev, "setup failed, %d\n", ret);
918 i2c_set_clientdata(client, chip);
922 regulator_disable(chip->regulator);
926 static int pca953x_remove(struct i2c_client *client)
928 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
929 struct pca953x_chip *chip = i2c_get_clientdata(client);
932 if (pdata && pdata->teardown) {
933 ret = pdata->teardown(client, chip->gpio_chip.base,
934 chip->gpio_chip.ngpio, pdata->context);
936 dev_err(&client->dev, "%s failed, %d\n",
942 regulator_disable(chip->regulator);
947 /* convenience to stop overlong match-table lines */
948 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
949 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
951 static const struct of_device_id pca953x_dt_ids[] = {
952 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
953 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
954 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
955 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
956 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
957 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
958 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
959 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
960 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
961 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
962 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
963 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
964 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
965 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
967 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
968 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
970 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
971 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
972 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
973 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
974 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
976 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
977 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
978 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
979 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
980 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
982 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
984 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
988 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
990 static struct i2c_driver pca953x_driver = {
993 .of_match_table = pca953x_dt_ids,
994 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
996 .probe = pca953x_probe,
997 .remove = pca953x_remove,
998 .id_table = pca953x_id,
1001 static int __init pca953x_init(void)
1003 return i2c_add_driver(&pca953x_driver);
1005 /* register after i2c postcore initcall and before
1006 * subsys initcalls that may rely on these GPIOs
1008 subsys_initcall(pca953x_init);
1010 static void __exit pca953x_exit(void)
1012 i2c_del_driver(&pca953x_driver);
1014 module_exit(pca953x_exit);
1016 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1017 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1018 MODULE_LICENSE("GPL");