1 // SPDX-License-Identifier: GPL-2.0-only
3 * PCA953x 4/8/16/24/40 bit I/O ports
5 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
6 * Copyright (C) 2007 Marvell International Ltd.
8 * Derived from drivers/i2c/chips/pca9539.c
11 #include <linux/acpi.h>
12 #include <linux/bitmap.h>
13 #include <linux/gpio/driver.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/module.h>
19 #include <linux/of_platform.h>
20 #include <linux/platform_data/pca953x.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
25 #include <asm/unaligned.h>
27 #define PCA953X_INPUT 0x00
28 #define PCA953X_OUTPUT 0x01
29 #define PCA953X_INVERT 0x02
30 #define PCA953X_DIRECTION 0x03
32 #define REG_ADDR_MASK GENMASK(5, 0)
33 #define REG_ADDR_EXT BIT(6)
34 #define REG_ADDR_AI BIT(7)
36 #define PCA957X_IN 0x00
37 #define PCA957X_INVRT 0x01
38 #define PCA957X_BKEN 0x02
39 #define PCA957X_PUPD 0x03
40 #define PCA957X_CFG 0x04
41 #define PCA957X_OUT 0x05
42 #define PCA957X_MSK 0x06
43 #define PCA957X_INTS 0x07
45 #define PCAL953X_OUT_STRENGTH 0x20
46 #define PCAL953X_IN_LATCH 0x22
47 #define PCAL953X_PULL_EN 0x23
48 #define PCAL953X_PULL_SEL 0x24
49 #define PCAL953X_INT_MASK 0x25
50 #define PCAL953X_INT_STAT 0x26
51 #define PCAL953X_OUT_CONF 0x27
53 #define PCAL6524_INT_EDGE 0x28
54 #define PCAL6524_INT_CLR 0x2a
55 #define PCAL6524_IN_STATUS 0x2b
56 #define PCAL6524_OUT_INDCONF 0x2c
57 #define PCAL6524_DEBOUNCE 0x2d
59 #define PCA_GPIO_MASK GENMASK(7, 0)
61 #define PCAL_GPIO_MASK GENMASK(4, 0)
62 #define PCAL_PINCTRL_MASK GENMASK(6, 5)
64 #define PCA_INT BIT(8)
65 #define PCA_PCAL BIT(9)
66 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
67 #define PCA953X_TYPE BIT(12)
68 #define PCA957X_TYPE BIT(13)
69 #define PCA_TYPE_MASK GENMASK(15, 12)
71 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
73 static const struct i2c_device_id pca953x_id[] = {
74 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
75 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
76 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
77 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
78 { "pca9536", 4 | PCA953X_TYPE, },
79 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
80 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
81 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
82 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
83 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
84 { "pca9556", 8 | PCA953X_TYPE, },
85 { "pca9557", 8 | PCA953X_TYPE, },
86 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
87 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
88 { "pca9698", 40 | PCA953X_TYPE, },
90 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
91 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
92 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
94 { "max7310", 8 | PCA953X_TYPE, },
95 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
96 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
97 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
98 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
99 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
100 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
101 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
102 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
103 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
104 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
105 { "xra1202", 8 | PCA953X_TYPE },
108 MODULE_DEVICE_TABLE(i2c, pca953x_id);
110 static const struct acpi_device_id pca953x_acpi_ids[] = {
111 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
114 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
118 #define MAX_LINE (MAX_BANK * BANK_SZ)
120 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
122 struct pca953x_reg_config {
129 static const struct pca953x_reg_config pca953x_regs = {
130 .direction = PCA953X_DIRECTION,
131 .output = PCA953X_OUTPUT,
132 .input = PCA953X_INPUT,
133 .invert = PCA953X_INVERT,
136 static const struct pca953x_reg_config pca957x_regs = {
137 .direction = PCA957X_CFG,
138 .output = PCA957X_OUT,
140 .invert = PCA957X_INVRT,
143 struct pca953x_chip {
145 struct mutex i2c_lock;
146 struct regmap *regmap;
148 #ifdef CONFIG_GPIO_PCA953X_IRQ
149 struct mutex irq_lock;
150 DECLARE_BITMAP(irq_mask, MAX_LINE);
151 DECLARE_BITMAP(irq_stat, MAX_LINE);
152 DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
153 DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
154 struct irq_chip irq_chip;
156 atomic_t wakeup_path;
158 struct i2c_client *client;
159 struct gpio_chip gpio_chip;
160 const char *const *names;
161 unsigned long driver_data;
162 struct regulator *regulator;
164 const struct pca953x_reg_config *regs;
167 static int pca953x_bank_shift(struct pca953x_chip *chip)
169 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
172 #define PCA953x_BANK_INPUT BIT(0)
173 #define PCA953x_BANK_OUTPUT BIT(1)
174 #define PCA953x_BANK_POLARITY BIT(2)
175 #define PCA953x_BANK_CONFIG BIT(3)
177 #define PCA957x_BANK_INPUT BIT(0)
178 #define PCA957x_BANK_POLARITY BIT(1)
179 #define PCA957x_BANK_BUSHOLD BIT(2)
180 #define PCA957x_BANK_CONFIG BIT(4)
181 #define PCA957x_BANK_OUTPUT BIT(5)
183 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2)
184 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3)
185 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4)
186 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5)
187 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6)
190 * We care about the following registers:
191 * - Standard set, below 0x40, each port can be replicated up to 8 times
193 * Input port 0x00 + 0 * bank_size R
194 * Output port 0x00 + 1 * bank_size RW
195 * Polarity Inversion port 0x00 + 2 * bank_size RW
196 * Configuration port 0x00 + 3 * bank_size RW
197 * - PCA957x with mixed up registers
198 * Input port 0x00 + 0 * bank_size R
199 * Polarity Inversion port 0x00 + 1 * bank_size RW
200 * Bus hold port 0x00 + 2 * bank_size RW
201 * Configuration port 0x00 + 4 * bank_size RW
202 * Output port 0x00 + 5 * bank_size RW
204 * - Extended set, above 0x40, often chip specific.
205 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
206 * Input latch register 0x40 + 2 * bank_size RW
207 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW
208 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW
209 * Interrupt mask register 0x40 + 5 * bank_size RW
210 * Interrupt status register 0x40 + 6 * bank_size R
212 * - Registers with bit 0x80 set, the AI bit
213 * The bit is cleared and the registers fall into one of the
217 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
220 int bank_shift = pca953x_bank_shift(chip);
221 int bank = (reg & REG_ADDR_MASK) >> bank_shift;
222 int offset = reg & (BIT(bank_shift) - 1);
224 /* Special PCAL extended register check. */
225 if (reg & REG_ADDR_EXT) {
226 if (!(chip->driver_data & PCA_PCAL))
231 /* Register is not in the matching bank. */
232 if (!(BIT(bank) & checkbank))
235 /* Register is not within allowed range of bank. */
236 if (offset >= NBANK(chip))
242 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
244 struct pca953x_chip *chip = dev_get_drvdata(dev);
247 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
248 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
249 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
251 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
252 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
253 PCA957x_BANK_BUSHOLD;
256 if (chip->driver_data & PCA_PCAL) {
257 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
258 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
259 PCAL9xxx_BANK_IRQ_STAT;
262 return pca953x_check_register(chip, reg, bank);
265 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
267 struct pca953x_chip *chip = dev_get_drvdata(dev);
270 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
271 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
274 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
275 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
278 if (chip->driver_data & PCA_PCAL)
279 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
280 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
282 return pca953x_check_register(chip, reg, bank);
285 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
287 struct pca953x_chip *chip = dev_get_drvdata(dev);
290 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
291 bank = PCA953x_BANK_INPUT;
293 bank = PCA957x_BANK_INPUT;
295 if (chip->driver_data & PCA_PCAL)
296 bank |= PCAL9xxx_BANK_IRQ_STAT;
298 return pca953x_check_register(chip, reg, bank);
301 static const struct regmap_config pca953x_i2c_regmap = {
305 .readable_reg = pca953x_readable_register,
306 .writeable_reg = pca953x_writeable_register,
307 .volatile_reg = pca953x_volatile_register,
309 .disable_locking = true,
310 .cache_type = REGCACHE_RBTREE,
311 .max_register = 0x7f,
314 static const struct regmap_config pca953x_ai_i2c_regmap = {
318 .read_flag_mask = REG_ADDR_AI,
319 .write_flag_mask = REG_ADDR_AI,
321 .readable_reg = pca953x_readable_register,
322 .writeable_reg = pca953x_writeable_register,
323 .volatile_reg = pca953x_volatile_register,
325 .cache_type = REGCACHE_RBTREE,
326 .max_register = 0x7f,
329 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off)
331 int bank_shift = pca953x_bank_shift(chip);
332 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
333 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
334 u8 regaddr = pinctrl | addr | (off / BANK_SZ);
339 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
341 u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
345 for (i = 0; i < NBANK(chip); i++)
346 value[i] = bitmap_get_value8(val, i * BANK_SZ);
348 ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
350 dev_err(&chip->client->dev, "failed writing register\n");
357 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
359 u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
363 ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip));
365 dev_err(&chip->client->dev, "failed reading register\n");
369 for (i = 0; i < NBANK(chip); i++)
370 bitmap_set_value8(val, value[i], i * BANK_SZ);
375 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
377 struct pca953x_chip *chip = gpiochip_get_data(gc);
378 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
379 u8 bit = BIT(off % BANK_SZ);
382 mutex_lock(&chip->i2c_lock);
383 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
384 mutex_unlock(&chip->i2c_lock);
388 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
389 unsigned off, int val)
391 struct pca953x_chip *chip = gpiochip_get_data(gc);
392 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
393 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
394 u8 bit = BIT(off % BANK_SZ);
397 mutex_lock(&chip->i2c_lock);
398 /* set output level */
399 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
404 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
406 mutex_unlock(&chip->i2c_lock);
410 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
412 struct pca953x_chip *chip = gpiochip_get_data(gc);
413 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off);
414 u8 bit = BIT(off % BANK_SZ);
418 mutex_lock(&chip->i2c_lock);
419 ret = regmap_read(chip->regmap, inreg, ®_val);
420 mutex_unlock(&chip->i2c_lock);
424 * diagnostic already emitted; that's all we should
425 * do unless gpio_*_value_cansleep() calls become different
426 * from their nonsleeping siblings (and report faults).
431 return !!(reg_val & bit);
434 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
436 struct pca953x_chip *chip = gpiochip_get_data(gc);
437 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
438 u8 bit = BIT(off % BANK_SZ);
440 mutex_lock(&chip->i2c_lock);
441 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
442 mutex_unlock(&chip->i2c_lock);
445 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
447 struct pca953x_chip *chip = gpiochip_get_data(gc);
448 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
449 u8 bit = BIT(off % BANK_SZ);
453 mutex_lock(&chip->i2c_lock);
454 ret = regmap_read(chip->regmap, dirreg, ®_val);
455 mutex_unlock(&chip->i2c_lock);
460 return GPIO_LINE_DIRECTION_IN;
462 return GPIO_LINE_DIRECTION_OUT;
465 static int pca953x_gpio_get_multiple(struct gpio_chip *gc,
466 unsigned long *mask, unsigned long *bits)
468 struct pca953x_chip *chip = gpiochip_get_data(gc);
469 DECLARE_BITMAP(reg_val, MAX_LINE);
472 mutex_lock(&chip->i2c_lock);
473 ret = pca953x_read_regs(chip, chip->regs->input, reg_val);
474 mutex_unlock(&chip->i2c_lock);
478 bitmap_replace(bits, bits, reg_val, mask, gc->ngpio);
482 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
483 unsigned long *mask, unsigned long *bits)
485 struct pca953x_chip *chip = gpiochip_get_data(gc);
486 DECLARE_BITMAP(reg_val, MAX_LINE);
489 mutex_lock(&chip->i2c_lock);
490 ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
494 bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio);
496 pca953x_write_regs(chip, chip->regs->output, reg_val);
498 mutex_unlock(&chip->i2c_lock);
501 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
503 unsigned long config)
505 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset);
506 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset);
507 u8 bit = BIT(offset % BANK_SZ);
511 * pull-up/pull-down configuration requires PCAL extended
514 if (!(chip->driver_data & PCA_PCAL))
517 mutex_lock(&chip->i2c_lock);
519 /* Disable pull-up/pull-down */
520 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
524 /* Configure pull-up/pull-down */
525 if (config == PIN_CONFIG_BIAS_PULL_UP)
526 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
527 else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
528 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
532 /* Enable pull-up/pull-down */
533 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
536 mutex_unlock(&chip->i2c_lock);
540 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
541 unsigned long config)
543 struct pca953x_chip *chip = gpiochip_get_data(gc);
545 switch (pinconf_to_config_param(config)) {
546 case PIN_CONFIG_BIAS_PULL_UP:
547 case PIN_CONFIG_BIAS_PULL_DOWN:
548 return pca953x_gpio_set_pull_up_down(chip, offset, config);
554 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
556 struct gpio_chip *gc;
558 gc = &chip->gpio_chip;
560 gc->direction_input = pca953x_gpio_direction_input;
561 gc->direction_output = pca953x_gpio_direction_output;
562 gc->get = pca953x_gpio_get_value;
563 gc->set = pca953x_gpio_set_value;
564 gc->get_direction = pca953x_gpio_get_direction;
565 gc->get_multiple = pca953x_gpio_get_multiple;
566 gc->set_multiple = pca953x_gpio_set_multiple;
567 gc->set_config = pca953x_gpio_set_config;
568 gc->can_sleep = true;
570 gc->base = chip->gpio_start;
572 gc->label = dev_name(&chip->client->dev);
573 gc->parent = &chip->client->dev;
574 gc->owner = THIS_MODULE;
575 gc->names = chip->names;
578 #ifdef CONFIG_GPIO_PCA953X_IRQ
579 static void pca953x_irq_mask(struct irq_data *d)
581 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
582 struct pca953x_chip *chip = gpiochip_get_data(gc);
583 irq_hw_number_t hwirq = irqd_to_hwirq(d);
585 clear_bit(hwirq, chip->irq_mask);
588 static void pca953x_irq_unmask(struct irq_data *d)
590 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
591 struct pca953x_chip *chip = gpiochip_get_data(gc);
592 irq_hw_number_t hwirq = irqd_to_hwirq(d);
594 set_bit(hwirq, chip->irq_mask);
597 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
599 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
600 struct pca953x_chip *chip = gpiochip_get_data(gc);
603 atomic_inc(&chip->wakeup_path);
605 atomic_dec(&chip->wakeup_path);
607 return irq_set_irq_wake(chip->client->irq, on);
610 static void pca953x_irq_bus_lock(struct irq_data *d)
612 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
613 struct pca953x_chip *chip = gpiochip_get_data(gc);
615 mutex_lock(&chip->irq_lock);
618 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
620 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
621 struct pca953x_chip *chip = gpiochip_get_data(gc);
622 DECLARE_BITMAP(irq_mask, MAX_LINE);
623 DECLARE_BITMAP(reg_direction, MAX_LINE);
626 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
628 if (chip->driver_data & PCA_PCAL) {
629 /* Enable latch on interrupt-enabled inputs */
630 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
632 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
634 /* Unmask enabled interrupts */
635 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
638 bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
639 bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);
641 /* Look for any newly setup interrupt */
642 for_each_set_bit(level, irq_mask, gc->ngpio)
643 pca953x_gpio_direction_input(&chip->gpio_chip, level);
645 mutex_unlock(&chip->irq_lock);
648 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
650 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
651 struct pca953x_chip *chip = gpiochip_get_data(gc);
652 irq_hw_number_t hwirq = irqd_to_hwirq(d);
654 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
655 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
660 assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING);
661 assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING);
666 static void pca953x_irq_shutdown(struct irq_data *d)
668 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
669 struct pca953x_chip *chip = gpiochip_get_data(gc);
670 irq_hw_number_t hwirq = irqd_to_hwirq(d);
672 clear_bit(hwirq, chip->irq_trig_raise);
673 clear_bit(hwirq, chip->irq_trig_fall);
676 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending)
678 struct gpio_chip *gc = &chip->gpio_chip;
679 DECLARE_BITMAP(reg_direction, MAX_LINE);
680 DECLARE_BITMAP(old_stat, MAX_LINE);
681 DECLARE_BITMAP(cur_stat, MAX_LINE);
682 DECLARE_BITMAP(new_stat, MAX_LINE);
683 DECLARE_BITMAP(trigger, MAX_LINE);
686 if (chip->driver_data & PCA_PCAL) {
687 /* Read the current interrupt status from the device */
688 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
692 /* Check latched inputs and clear interrupt status */
693 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
697 /* Apply filter for rising/falling edge selection */
698 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio);
700 bitmap_and(pending, new_stat, trigger, gc->ngpio);
702 return !bitmap_empty(pending, gc->ngpio);
705 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
709 /* Remove output pins from the equation */
710 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
712 bitmap_copy(old_stat, chip->irq_stat, gc->ngpio);
714 bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio);
715 bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio);
716 bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
718 if (bitmap_empty(trigger, gc->ngpio))
721 bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
723 bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
724 bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
725 bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio);
726 bitmap_and(pending, new_stat, trigger, gc->ngpio);
728 return !bitmap_empty(pending, gc->ngpio);
731 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
733 struct pca953x_chip *chip = devid;
734 struct gpio_chip *gc = &chip->gpio_chip;
735 DECLARE_BITMAP(pending, MAX_LINE);
738 if (!pca953x_irq_pending(chip, pending))
741 for_each_set_bit(level, pending, gc->ngpio)
742 handle_nested_irq(irq_find_mapping(gc->irq.domain, level));
747 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)
749 struct i2c_client *client = chip->client;
750 struct irq_chip *irq_chip = &chip->irq_chip;
751 DECLARE_BITMAP(reg_direction, MAX_LINE);
752 DECLARE_BITMAP(irq_stat, MAX_LINE);
761 if (!(chip->driver_data & PCA_INT))
764 ret = pca953x_read_regs(chip, chip->regs->input, irq_stat);
769 * There is no way to know which GPIO line generated the
770 * interrupt. We have to rely on the previous read for
773 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
774 bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio);
775 mutex_init(&chip->irq_lock);
777 ret = devm_request_threaded_irq(&client->dev, client->irq,
778 NULL, pca953x_irq_handler,
779 IRQF_ONESHOT | IRQF_SHARED,
780 dev_name(&client->dev), chip);
782 dev_err(&client->dev, "failed to request irq %d\n",
787 irq_chip->name = dev_name(&chip->client->dev);
788 irq_chip->irq_mask = pca953x_irq_mask;
789 irq_chip->irq_unmask = pca953x_irq_unmask;
790 irq_chip->irq_set_wake = pca953x_irq_set_wake;
791 irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
792 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
793 irq_chip->irq_set_type = pca953x_irq_set_type;
794 irq_chip->irq_shutdown = pca953x_irq_shutdown;
796 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
797 irq_base, handle_simple_irq,
800 dev_err(&client->dev,
801 "could not connect irqchip to gpiochip\n");
805 gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
810 #else /* CONFIG_GPIO_PCA953X_IRQ */
811 static int pca953x_irq_setup(struct pca953x_chip *chip,
814 struct i2c_client *client = chip->client;
816 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
817 dev_warn(&client->dev, "interrupt support not compiled in\n");
823 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
825 DECLARE_BITMAP(val, MAX_LINE);
828 ret = regcache_sync_region(chip->regmap, chip->regs->output,
829 chip->regs->output + NBANK(chip));
833 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
834 chip->regs->direction + NBANK(chip));
838 /* set platform specific polarity inversion */
840 bitmap_fill(val, MAX_LINE);
842 bitmap_zero(val, MAX_LINE);
844 ret = pca953x_write_regs(chip, chip->regs->invert, val);
849 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
851 DECLARE_BITMAP(val, MAX_LINE);
854 ret = device_pca95xx_init(chip, invert);
858 /* To enable register 6, 7 to control pull up and pull down */
859 memset(val, 0x02, NBANK(chip));
860 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
869 static int pca953x_probe(struct i2c_client *client,
870 const struct i2c_device_id *i2c_id)
872 struct pca953x_platform_data *pdata;
873 struct pca953x_chip *chip;
877 struct regulator *reg;
878 const struct regmap_config *regmap_config;
880 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
884 pdata = dev_get_platdata(&client->dev);
886 irq_base = pdata->irq_base;
887 chip->gpio_start = pdata->gpio_base;
888 invert = pdata->invert;
889 chip->names = pdata->names;
891 struct gpio_desc *reset_gpio;
893 chip->gpio_start = -1;
897 * See if we need to de-assert a reset pin.
899 * There is no known ACPI-enabled platforms that are
900 * using "reset" GPIO. Otherwise any of those platform
901 * must use _DSD method with corresponding property.
903 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
905 if (IS_ERR(reset_gpio))
906 return PTR_ERR(reset_gpio);
909 chip->client = client;
911 reg = devm_regulator_get(&client->dev, "vcc");
914 if (ret != -EPROBE_DEFER)
915 dev_err(&client->dev, "reg get err: %d\n", ret);
918 ret = regulator_enable(reg);
920 dev_err(&client->dev, "reg en err: %d\n", ret);
923 chip->regulator = reg;
926 chip->driver_data = i2c_id->driver_data;
930 match = device_get_match_data(&client->dev);
936 chip->driver_data = (uintptr_t)match;
939 i2c_set_clientdata(client, chip);
941 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
943 if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
944 dev_info(&client->dev, "using AI\n");
945 regmap_config = &pca953x_ai_i2c_regmap;
947 dev_info(&client->dev, "using no AI\n");
948 regmap_config = &pca953x_i2c_regmap;
951 chip->regmap = devm_regmap_init_i2c(client, regmap_config);
952 if (IS_ERR(chip->regmap)) {
953 ret = PTR_ERR(chip->regmap);
957 regcache_mark_dirty(chip->regmap);
959 mutex_init(&chip->i2c_lock);
961 * In case we have an i2c-mux controlled by a GPIO provided by an
962 * expander using the same driver higher on the device tree, read the
963 * i2c adapter nesting depth and use the retrieved value as lockdep
964 * subclass for chip->i2c_lock.
966 * REVISIT: This solution is not complete. It protects us from lockdep
967 * false positives when the expander controlling the i2c-mux is on
968 * a different level on the device tree, but not when it's on the same
969 * level on a different branch (in which case the subclass number
970 * would be the same).
972 * TODO: Once a correct solution is developed, a similar fix should be
973 * applied to all other i2c-controlled GPIO expanders (and potentially
976 lockdep_set_subclass(&chip->i2c_lock,
977 i2c_adapter_depth(client->adapter));
979 /* initialize cached registers from their original values.
980 * we can't share this chip with another i2c master.
983 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
984 chip->regs = &pca953x_regs;
985 ret = device_pca95xx_init(chip, invert);
987 chip->regs = &pca957x_regs;
988 ret = device_pca957x_init(chip, invert);
993 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
997 ret = pca953x_irq_setup(chip, irq_base);
1001 if (pdata && pdata->setup) {
1002 ret = pdata->setup(client, chip->gpio_chip.base,
1003 chip->gpio_chip.ngpio, pdata->context);
1005 dev_warn(&client->dev, "setup failed, %d\n", ret);
1011 regulator_disable(chip->regulator);
1015 static int pca953x_remove(struct i2c_client *client)
1017 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1018 struct pca953x_chip *chip = i2c_get_clientdata(client);
1021 if (pdata && pdata->teardown) {
1022 ret = pdata->teardown(client, chip->gpio_chip.base,
1023 chip->gpio_chip.ngpio, pdata->context);
1025 dev_err(&client->dev, "teardown failed, %d\n", ret);
1030 regulator_disable(chip->regulator);
1035 #ifdef CONFIG_PM_SLEEP
1036 static int pca953x_regcache_sync(struct device *dev)
1038 struct pca953x_chip *chip = dev_get_drvdata(dev);
1042 * The ordering between direction and output is important,
1043 * sync these registers first and only then sync the rest.
1045 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1046 chip->regs->direction + NBANK(chip));
1048 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1052 ret = regcache_sync_region(chip->regmap, chip->regs->output,
1053 chip->regs->output + NBANK(chip));
1055 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1059 #ifdef CONFIG_GPIO_PCA953X_IRQ
1060 if (chip->driver_data & PCA_PCAL) {
1061 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1062 PCAL953X_IN_LATCH + NBANK(chip));
1064 dev_err(dev, "Failed to sync INT latch registers: %d\n",
1069 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1070 PCAL953X_INT_MASK + NBANK(chip));
1072 dev_err(dev, "Failed to sync INT mask registers: %d\n",
1082 static int pca953x_suspend(struct device *dev)
1084 struct pca953x_chip *chip = dev_get_drvdata(dev);
1086 regcache_cache_only(chip->regmap, true);
1088 if (atomic_read(&chip->wakeup_path))
1089 device_set_wakeup_path(dev);
1091 regulator_disable(chip->regulator);
1096 static int pca953x_resume(struct device *dev)
1098 struct pca953x_chip *chip = dev_get_drvdata(dev);
1101 if (!atomic_read(&chip->wakeup_path)) {
1102 ret = regulator_enable(chip->regulator);
1104 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1109 regcache_cache_only(chip->regmap, false);
1110 regcache_mark_dirty(chip->regmap);
1111 ret = pca953x_regcache_sync(dev);
1115 ret = regcache_sync(chip->regmap);
1117 dev_err(dev, "Failed to restore register map: %d\n", ret);
1125 /* convenience to stop overlong match-table lines */
1126 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1127 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1129 static const struct of_device_id pca953x_dt_ids[] = {
1130 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1131 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1132 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1133 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1134 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1135 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1136 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1137 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1138 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1139 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1140 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1141 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1142 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1143 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1144 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1146 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1147 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1148 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1150 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1151 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1152 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1153 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1154 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1156 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1157 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1158 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1159 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1160 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1161 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1163 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1164 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1166 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1170 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1172 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1174 static struct i2c_driver pca953x_driver = {
1177 .pm = &pca953x_pm_ops,
1178 .of_match_table = pca953x_dt_ids,
1179 .acpi_match_table = pca953x_acpi_ids,
1181 .probe = pca953x_probe,
1182 .remove = pca953x_remove,
1183 .id_table = pca953x_id,
1186 static int __init pca953x_init(void)
1188 return i2c_add_driver(&pca953x_driver);
1190 /* register after i2c postcore initcall and before
1191 * subsys initcalls that may rely on these GPIOs
1193 subsys_initcall(pca953x_init);
1195 static void __exit pca953x_exit(void)
1197 i2c_del_driver(&pca953x_driver);
1199 module_exit(pca953x_exit);
1201 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1202 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1203 MODULE_LICENSE("GPL");