1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for FPGA Device Feature List (DFL) Support
5 * Copyright (C) 2017-2018 Intel Corporation, Inc.
8 * Kang Luwei <luwei.kang@intel.com>
9 * Zhang Yi <yi.z.zhang@intel.com>
10 * Wu Hao <hao.wu@intel.com>
11 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
13 #include <linux/dfl.h>
14 #include <linux/fpga-dfl.h>
15 #include <linux/module.h>
16 #include <linux/uaccess.h>
20 static DEFINE_MUTEX(dfl_id_mutex);
23 * when adding a new feature dev support in DFL framework, it's required to
24 * add a new item in enum dfl_id_type and provide related information in below
25 * dfl_devs table which is indexed by dfl_id_type, e.g. name string used for
26 * platform device creation (define name strings in dfl.h, as they could be
27 * reused by platform device drivers).
29 * if the new feature dev needs chardev support, then it's required to add
30 * a new item in dfl_chardevs table and configure dfl_devs[i].devt_type as
31 * index to dfl_chardevs table. If no chardev support just set devt_type
32 * as one invalid index (DFL_FPGA_DEVT_MAX).
34 enum dfl_fpga_devt_type {
40 static struct lock_class_key dfl_pdata_keys[DFL_ID_MAX];
42 static const char *dfl_pdata_key_strings[DFL_ID_MAX] = {
48 * dfl_dev_info - dfl feature device information.
49 * @name: name string of the feature platform device.
50 * @dfh_id: id value in Device Feature Header (DFH) register by DFL spec.
51 * @id: idr id of the feature dev.
52 * @devt_type: index to dfl_chrdevs[].
58 enum dfl_fpga_devt_type devt_type;
61 /* it is indexed by dfl_id_type */
62 static struct dfl_dev_info dfl_devs[] = {
63 {.name = DFL_FPGA_FEATURE_DEV_FME, .dfh_id = DFH_ID_FIU_FME,
64 .devt_type = DFL_FPGA_DEVT_FME},
65 {.name = DFL_FPGA_FEATURE_DEV_PORT, .dfh_id = DFH_ID_FIU_PORT,
66 .devt_type = DFL_FPGA_DEVT_PORT},
70 * dfl_chardev_info - chardev information of dfl feature device
71 * @name: nmae string of the char device.
72 * @devt: devt of the char device.
74 struct dfl_chardev_info {
79 /* indexed by enum dfl_fpga_devt_type */
80 static struct dfl_chardev_info dfl_chrdevs[] = {
81 {.name = DFL_FPGA_FEATURE_DEV_FME},
82 {.name = DFL_FPGA_FEATURE_DEV_PORT},
85 static void dfl_ids_init(void)
89 for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
90 idr_init(&dfl_devs[i].id);
93 static void dfl_ids_destroy(void)
97 for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
98 idr_destroy(&dfl_devs[i].id);
101 static int dfl_id_alloc(enum dfl_id_type type, struct device *dev)
105 WARN_ON(type >= DFL_ID_MAX);
106 mutex_lock(&dfl_id_mutex);
107 id = idr_alloc(&dfl_devs[type].id, dev, 0, 0, GFP_KERNEL);
108 mutex_unlock(&dfl_id_mutex);
113 static void dfl_id_free(enum dfl_id_type type, int id)
115 WARN_ON(type >= DFL_ID_MAX);
116 mutex_lock(&dfl_id_mutex);
117 idr_remove(&dfl_devs[type].id, id);
118 mutex_unlock(&dfl_id_mutex);
121 static enum dfl_id_type feature_dev_id_type(struct platform_device *pdev)
125 for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
126 if (!strcmp(dfl_devs[i].name, pdev->name))
132 static enum dfl_id_type dfh_id_to_type(u16 id)
136 for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
137 if (dfl_devs[i].dfh_id == id)
144 * introduce a global port_ops list, it allows port drivers to register ops
145 * in such list, then other feature devices (e.g. FME), could use the port
146 * functions even related port platform device is hidden. Below is one example,
147 * in virtualization case of PCIe-based FPGA DFL device, when SRIOV is
148 * enabled, port (and it's AFU) is turned into VF and port platform device
149 * is hidden from system but it's still required to access port to finish FPGA
150 * reconfiguration function in FME.
153 static DEFINE_MUTEX(dfl_port_ops_mutex);
154 static LIST_HEAD(dfl_port_ops_list);
157 * dfl_fpga_port_ops_get - get matched port ops from the global list
158 * @pdev: platform device to match with associated port ops.
159 * Return: matched port ops on success, NULL otherwise.
161 * Please note that must dfl_fpga_port_ops_put after use the port_ops.
163 struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct platform_device *pdev)
165 struct dfl_fpga_port_ops *ops = NULL;
167 mutex_lock(&dfl_port_ops_mutex);
168 if (list_empty(&dfl_port_ops_list))
171 list_for_each_entry(ops, &dfl_port_ops_list, node) {
172 /* match port_ops using the name of platform device */
173 if (!strcmp(pdev->name, ops->name)) {
174 if (!try_module_get(ops->owner))
182 mutex_unlock(&dfl_port_ops_mutex);
185 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_get);
188 * dfl_fpga_port_ops_put - put port ops
191 void dfl_fpga_port_ops_put(struct dfl_fpga_port_ops *ops)
193 if (ops && ops->owner)
194 module_put(ops->owner);
196 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_put);
199 * dfl_fpga_port_ops_add - add port_ops to global list
200 * @ops: port ops to add.
202 void dfl_fpga_port_ops_add(struct dfl_fpga_port_ops *ops)
204 mutex_lock(&dfl_port_ops_mutex);
205 list_add_tail(&ops->node, &dfl_port_ops_list);
206 mutex_unlock(&dfl_port_ops_mutex);
208 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_add);
211 * dfl_fpga_port_ops_del - remove port_ops from global list
212 * @ops: port ops to del.
214 void dfl_fpga_port_ops_del(struct dfl_fpga_port_ops *ops)
216 mutex_lock(&dfl_port_ops_mutex);
217 list_del(&ops->node);
218 mutex_unlock(&dfl_port_ops_mutex);
220 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_del);
223 * dfl_fpga_check_port_id - check the port id
224 * @pdev: port platform device.
225 * @pport_id: port id to compare.
227 * Return: 1 if port device matches with given port id, otherwise 0.
229 int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id)
231 struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
232 struct dfl_fpga_port_ops *port_ops;
234 if (pdata->id != FEATURE_DEV_ID_UNUSED)
235 return pdata->id == *(int *)pport_id;
237 port_ops = dfl_fpga_port_ops_get(pdev);
238 if (!port_ops || !port_ops->get_id)
241 pdata->id = port_ops->get_id(pdev);
242 dfl_fpga_port_ops_put(port_ops);
244 return pdata->id == *(int *)pport_id;
246 EXPORT_SYMBOL_GPL(dfl_fpga_check_port_id);
248 static DEFINE_IDA(dfl_device_ida);
250 static const struct dfl_device_id *
251 dfl_match_one_device(const struct dfl_device_id *id, struct dfl_device *ddev)
253 if (id->type == ddev->type && id->feature_id == ddev->feature_id)
259 static int dfl_bus_match(struct device *dev, struct device_driver *drv)
261 struct dfl_device *ddev = to_dfl_dev(dev);
262 struct dfl_driver *ddrv = to_dfl_drv(drv);
263 const struct dfl_device_id *id_entry;
265 id_entry = ddrv->id_table;
267 while (id_entry->feature_id) {
268 if (dfl_match_one_device(id_entry, ddev)) {
269 ddev->id_entry = id_entry;
279 static int dfl_bus_probe(struct device *dev)
281 struct dfl_driver *ddrv = to_dfl_drv(dev->driver);
282 struct dfl_device *ddev = to_dfl_dev(dev);
284 return ddrv->probe(ddev);
287 static void dfl_bus_remove(struct device *dev)
289 struct dfl_driver *ddrv = to_dfl_drv(dev->driver);
290 struct dfl_device *ddev = to_dfl_dev(dev);
296 static int dfl_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
298 struct dfl_device *ddev = to_dfl_dev(dev);
300 return add_uevent_var(env, "MODALIAS=dfl:t%04Xf%04X",
301 ddev->type, ddev->feature_id);
305 type_show(struct device *dev, struct device_attribute *attr, char *buf)
307 struct dfl_device *ddev = to_dfl_dev(dev);
309 return sprintf(buf, "0x%x\n", ddev->type);
311 static DEVICE_ATTR_RO(type);
314 feature_id_show(struct device *dev, struct device_attribute *attr, char *buf)
316 struct dfl_device *ddev = to_dfl_dev(dev);
318 return sprintf(buf, "0x%x\n", ddev->feature_id);
320 static DEVICE_ATTR_RO(feature_id);
322 static struct attribute *dfl_dev_attrs[] = {
324 &dev_attr_feature_id.attr,
327 ATTRIBUTE_GROUPS(dfl_dev);
329 static struct bus_type dfl_bus_type = {
331 .match = dfl_bus_match,
332 .probe = dfl_bus_probe,
333 .remove = dfl_bus_remove,
334 .uevent = dfl_bus_uevent,
335 .dev_groups = dfl_dev_groups,
338 static void release_dfl_dev(struct device *dev)
340 struct dfl_device *ddev = to_dfl_dev(dev);
342 if (ddev->mmio_res.parent)
343 release_resource(&ddev->mmio_res);
345 ida_simple_remove(&dfl_device_ida, ddev->id);
350 static struct dfl_device *
351 dfl_dev_add(struct dfl_feature_platform_data *pdata,
352 struct dfl_feature *feature)
354 struct platform_device *pdev = pdata->dev;
355 struct resource *parent_res;
356 struct dfl_device *ddev;
359 ddev = kzalloc(sizeof(*ddev), GFP_KERNEL);
361 return ERR_PTR(-ENOMEM);
363 id = ida_simple_get(&dfl_device_ida, 0, 0, GFP_KERNEL);
365 dev_err(&pdev->dev, "unable to get id\n");
370 /* freeing resources by put_device() after device_initialize() */
371 device_initialize(&ddev->dev);
372 ddev->dev.parent = &pdev->dev;
373 ddev->dev.bus = &dfl_bus_type;
374 ddev->dev.release = release_dfl_dev;
376 ret = dev_set_name(&ddev->dev, "dfl_dev.%d", id);
380 ddev->type = feature_dev_id_type(pdev);
381 ddev->feature_id = feature->id;
382 ddev->cdev = pdata->dfl_cdev;
384 /* add mmio resource */
385 parent_res = &pdev->resource[feature->resource_index];
386 ddev->mmio_res.flags = IORESOURCE_MEM;
387 ddev->mmio_res.start = parent_res->start;
388 ddev->mmio_res.end = parent_res->end;
389 ddev->mmio_res.name = dev_name(&ddev->dev);
390 ret = insert_resource(parent_res, &ddev->mmio_res);
392 dev_err(&pdev->dev, "%s failed to claim resource: %pR\n",
393 dev_name(&ddev->dev), &ddev->mmio_res);
397 /* then add irq resource */
398 if (feature->nr_irqs) {
399 ddev->irqs = kcalloc(feature->nr_irqs,
400 sizeof(*ddev->irqs), GFP_KERNEL);
406 for (i = 0; i < feature->nr_irqs; i++)
407 ddev->irqs[i] = feature->irq_ctx[i].irq;
409 ddev->num_irqs = feature->nr_irqs;
412 ret = device_add(&ddev->dev);
416 dev_dbg(&pdev->dev, "add dfl_dev: %s\n", dev_name(&ddev->dev));
420 /* calls release_dfl_dev() which does the clean up */
421 put_device(&ddev->dev);
425 static void dfl_devs_remove(struct dfl_feature_platform_data *pdata)
427 struct dfl_feature *feature;
429 dfl_fpga_dev_for_each_feature(pdata, feature) {
431 device_unregister(&feature->ddev->dev);
432 feature->ddev = NULL;
437 static int dfl_devs_add(struct dfl_feature_platform_data *pdata)
439 struct dfl_feature *feature;
440 struct dfl_device *ddev;
443 dfl_fpga_dev_for_each_feature(pdata, feature) {
452 ddev = dfl_dev_add(pdata, feature);
458 feature->ddev = ddev;
464 dfl_devs_remove(pdata);
468 int __dfl_driver_register(struct dfl_driver *dfl_drv, struct module *owner)
470 if (!dfl_drv || !dfl_drv->probe || !dfl_drv->id_table)
473 dfl_drv->drv.owner = owner;
474 dfl_drv->drv.bus = &dfl_bus_type;
476 return driver_register(&dfl_drv->drv);
478 EXPORT_SYMBOL(__dfl_driver_register);
480 void dfl_driver_unregister(struct dfl_driver *dfl_drv)
482 driver_unregister(&dfl_drv->drv);
484 EXPORT_SYMBOL(dfl_driver_unregister);
486 #define is_header_feature(feature) ((feature)->id == FEATURE_ID_FIU_HEADER)
489 * dfl_fpga_dev_feature_uinit - uinit for sub features of dfl feature device
490 * @pdev: feature device.
492 void dfl_fpga_dev_feature_uinit(struct platform_device *pdev)
494 struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
495 struct dfl_feature *feature;
497 dfl_devs_remove(pdata);
499 dfl_fpga_dev_for_each_feature(pdata, feature) {
501 if (feature->ops->uinit)
502 feature->ops->uinit(pdev, feature);
507 EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_uinit);
509 static int dfl_feature_instance_init(struct platform_device *pdev,
510 struct dfl_feature_platform_data *pdata,
511 struct dfl_feature *feature,
512 struct dfl_feature_driver *drv)
517 if (!is_header_feature(feature)) {
518 base = devm_platform_ioremap_resource(pdev,
519 feature->resource_index);
522 "ioremap failed for feature 0x%x!\n",
524 return PTR_ERR(base);
527 feature->ioaddr = base;
530 if (drv->ops->init) {
531 ret = drv->ops->init(pdev, feature);
536 feature->ops = drv->ops;
541 static bool dfl_feature_drv_match(struct dfl_feature *feature,
542 struct dfl_feature_driver *driver)
544 const struct dfl_feature_id *ids = driver->id_table;
548 if (ids->id == feature->id)
557 * dfl_fpga_dev_feature_init - init for sub features of dfl feature device
558 * @pdev: feature device.
559 * @feature_drvs: drvs for sub features.
561 * This function will match sub features with given feature drvs list and
562 * use matched drv to init related sub feature.
564 * Return: 0 on success, negative error code otherwise.
566 int dfl_fpga_dev_feature_init(struct platform_device *pdev,
567 struct dfl_feature_driver *feature_drvs)
569 struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
570 struct dfl_feature_driver *drv = feature_drvs;
571 struct dfl_feature *feature;
575 dfl_fpga_dev_for_each_feature(pdata, feature) {
576 if (dfl_feature_drv_match(feature, drv)) {
577 ret = dfl_feature_instance_init(pdev, pdata,
586 ret = dfl_devs_add(pdata);
592 dfl_fpga_dev_feature_uinit(pdev);
595 EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_init);
597 static void dfl_chardev_uinit(void)
601 for (i = 0; i < DFL_FPGA_DEVT_MAX; i++)
602 if (MAJOR(dfl_chrdevs[i].devt)) {
603 unregister_chrdev_region(dfl_chrdevs[i].devt,
605 dfl_chrdevs[i].devt = MKDEV(0, 0);
609 static int dfl_chardev_init(void)
613 for (i = 0; i < DFL_FPGA_DEVT_MAX; i++) {
614 ret = alloc_chrdev_region(&dfl_chrdevs[i].devt, 0,
615 MINORMASK + 1, dfl_chrdevs[i].name);
627 static dev_t dfl_get_devt(enum dfl_fpga_devt_type type, int id)
629 if (type >= DFL_FPGA_DEVT_MAX)
632 return MKDEV(MAJOR(dfl_chrdevs[type].devt), id);
636 * dfl_fpga_dev_ops_register - register cdev ops for feature dev
638 * @pdev: feature dev.
639 * @fops: file operations for feature dev's cdev.
640 * @owner: owning module/driver.
642 * Return: 0 on success, negative error code otherwise.
644 int dfl_fpga_dev_ops_register(struct platform_device *pdev,
645 const struct file_operations *fops,
646 struct module *owner)
648 struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
650 cdev_init(&pdata->cdev, fops);
651 pdata->cdev.owner = owner;
654 * set parent to the feature device so that its refcount is
655 * decreased after the last refcount of cdev is gone, that
656 * makes sure the feature device is valid during device
659 pdata->cdev.kobj.parent = &pdev->dev.kobj;
661 return cdev_add(&pdata->cdev, pdev->dev.devt, 1);
663 EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_register);
666 * dfl_fpga_dev_ops_unregister - unregister cdev ops for feature dev
667 * @pdev: feature dev.
669 void dfl_fpga_dev_ops_unregister(struct platform_device *pdev)
671 struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
673 cdev_del(&pdata->cdev);
675 EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
678 * struct build_feature_devs_info - info collected during feature dev build.
680 * @dev: device to enumerate.
681 * @cdev: the container device for all feature devices.
682 * @nr_irqs: number of irqs for all feature devices.
683 * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
685 * @feature_dev: current feature device.
686 * @ioaddr: header register region address of current FIU in enumeration.
687 * @start: register resource start of current FIU.
688 * @len: max register resource length of current FIU.
689 * @sub_features: a sub features linked list for feature device in enumeration.
690 * @feature_num: number of sub features for feature device in enumeration.
692 struct build_feature_devs_info {
694 struct dfl_fpga_cdev *cdev;
695 unsigned int nr_irqs;
698 struct platform_device *feature_dev;
699 void __iomem *ioaddr;
700 resource_size_t start;
702 struct list_head sub_features;
707 * struct dfl_feature_info - sub feature info collected during feature dev build
709 * @fid: id of this sub feature.
710 * @mmio_res: mmio resource of this sub feature.
711 * @ioaddr: mapped base address of mmio resource.
712 * @node: node in sub_features linked list.
713 * @irq_base: start of irq index in this sub feature.
714 * @nr_irqs: number of irqs of this sub feature.
716 struct dfl_feature_info {
718 struct resource mmio_res;
719 void __iomem *ioaddr;
720 struct list_head node;
721 unsigned int irq_base;
722 unsigned int nr_irqs;
725 static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev *cdev,
726 struct platform_device *port)
728 struct dfl_feature_platform_data *pdata = dev_get_platdata(&port->dev);
730 mutex_lock(&cdev->lock);
731 list_add(&pdata->node, &cdev->port_dev_list);
732 get_device(&pdata->dev->dev);
733 mutex_unlock(&cdev->lock);
737 * register current feature device, it is called when we need to switch to
738 * another feature parsing or we have parsed all features on given device
741 static int build_info_commit_dev(struct build_feature_devs_info *binfo)
743 struct platform_device *fdev = binfo->feature_dev;
744 struct dfl_feature_platform_data *pdata;
745 struct dfl_feature_info *finfo, *p;
746 enum dfl_id_type type;
747 int ret, index = 0, res_idx = 0;
749 type = feature_dev_id_type(fdev);
750 if (WARN_ON_ONCE(type >= DFL_ID_MAX))
754 * we do not need to care for the memory which is associated with
755 * the platform device. After calling platform_device_unregister(),
756 * it will be automatically freed by device's release() callback,
757 * platform_device_release().
759 pdata = kzalloc(struct_size(pdata, features, binfo->feature_num), GFP_KERNEL);
764 pdata->num = binfo->feature_num;
765 pdata->dfl_cdev = binfo->cdev;
766 pdata->id = FEATURE_DEV_ID_UNUSED;
767 mutex_init(&pdata->lock);
768 lockdep_set_class_and_name(&pdata->lock, &dfl_pdata_keys[type],
769 dfl_pdata_key_strings[type]);
772 * the count should be initialized to 0 to make sure
773 *__fpga_port_enable() following __fpga_port_disable()
774 * works properly for port device.
775 * and it should always be 0 for fme device.
777 WARN_ON(pdata->disable_count);
779 fdev->dev.platform_data = pdata;
781 /* each sub feature has one MMIO resource */
782 fdev->num_resources = binfo->feature_num;
783 fdev->resource = kcalloc(binfo->feature_num, sizeof(*fdev->resource),
788 /* fill features and resource information for feature dev */
789 list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
790 struct dfl_feature *feature = &pdata->features[index++];
791 struct dfl_feature_irq_ctx *ctx;
794 /* save resource information for each feature */
796 feature->id = finfo->fid;
799 * the FIU header feature has some fundamental functions (sriov
800 * set, port enable/disable) needed for the dfl bus device and
801 * other sub features. So its mmio resource should be mapped by
802 * DFL bus device. And we should not assign it to feature
803 * devices (dfl-fme/afu) again.
805 if (is_header_feature(feature)) {
806 feature->resource_index = -1;
808 devm_ioremap_resource(binfo->dev,
810 if (IS_ERR(feature->ioaddr))
811 return PTR_ERR(feature->ioaddr);
813 feature->resource_index = res_idx;
814 fdev->resource[res_idx++] = finfo->mmio_res;
817 if (finfo->nr_irqs) {
818 ctx = devm_kcalloc(binfo->dev, finfo->nr_irqs,
819 sizeof(*ctx), GFP_KERNEL);
823 for (i = 0; i < finfo->nr_irqs; i++)
825 binfo->irq_table[finfo->irq_base + i];
827 feature->irq_ctx = ctx;
828 feature->nr_irqs = finfo->nr_irqs;
831 list_del(&finfo->node);
835 ret = platform_device_add(binfo->feature_dev);
838 dfl_fpga_cdev_add_port_dev(binfo->cdev,
841 binfo->cdev->fme_dev =
842 get_device(&binfo->feature_dev->dev);
844 * reset it to avoid build_info_free() freeing their resource.
846 * The resource of successfully registered feature devices
847 * will be freed by platform_device_unregister(). See the
848 * comments in build_info_create_dev().
850 binfo->feature_dev = NULL;
857 build_info_create_dev(struct build_feature_devs_info *binfo,
858 enum dfl_id_type type)
860 struct platform_device *fdev;
862 if (type >= DFL_ID_MAX)
866 * we use -ENODEV as the initialization indicator which indicates
867 * whether the id need to be reclaimed
869 fdev = platform_device_alloc(dfl_devs[type].name, -ENODEV);
873 binfo->feature_dev = fdev;
874 binfo->feature_num = 0;
876 INIT_LIST_HEAD(&binfo->sub_features);
878 fdev->id = dfl_id_alloc(type, &fdev->dev);
882 fdev->dev.parent = &binfo->cdev->region->dev;
883 fdev->dev.devt = dfl_get_devt(dfl_devs[type].devt_type, fdev->id);
888 static void build_info_free(struct build_feature_devs_info *binfo)
890 struct dfl_feature_info *finfo, *p;
893 * it is a valid id, free it. See comments in
894 * build_info_create_dev()
896 if (binfo->feature_dev && binfo->feature_dev->id >= 0) {
897 dfl_id_free(feature_dev_id_type(binfo->feature_dev),
898 binfo->feature_dev->id);
900 list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
901 list_del(&finfo->node);
906 platform_device_put(binfo->feature_dev);
908 devm_kfree(binfo->dev, binfo);
911 static inline u32 feature_size(void __iomem *start)
913 u64 v = readq(start + DFH);
914 u32 ofst = FIELD_GET(DFH_NEXT_HDR_OFST, v);
915 /* workaround for private features with invalid size, use 4K instead */
916 return ofst ? ofst : 4096;
919 static u16 feature_id(void __iomem *start)
921 u64 v = readq(start + DFH);
922 u16 id = FIELD_GET(DFH_ID, v);
923 u8 type = FIELD_GET(DFH_TYPE, v);
925 if (type == DFH_TYPE_FIU)
926 return FEATURE_ID_FIU_HEADER;
927 else if (type == DFH_TYPE_PRIVATE)
929 else if (type == DFH_TYPE_AFU)
930 return FEATURE_ID_AFU;
936 static int parse_feature_irqs(struct build_feature_devs_info *binfo,
937 resource_size_t ofst, u16 fid,
938 unsigned int *irq_base, unsigned int *nr_irqs)
940 void __iomem *base = binfo->ioaddr + ofst;
941 unsigned int i, ibase, inr = 0;
946 * Ideally DFL framework should only read info from DFL header, but
947 * current version DFL only provides mmio resources information for
948 * each feature in DFL Header, no field for interrupt resources.
949 * Interrupt resource information is provided by specific mmio
950 * registers of each private feature which supports interrupt. So in
951 * order to parse and assign irq resources, DFL framework has to look
952 * into specific capability registers of these private features.
954 * Once future DFL version supports generic interrupt resource
955 * information in common DFL headers, the generic interrupt parsing
956 * code will be added. But in order to be compatible to old version
957 * DFL, the driver may still fall back to these quirks.
960 case PORT_FEATURE_ID_UINT:
961 v = readq(base + PORT_UINT_CAP);
962 ibase = FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
963 inr = FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
965 case PORT_FEATURE_ID_ERROR:
966 v = readq(base + PORT_ERROR_CAP);
967 ibase = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
968 inr = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
970 case FME_FEATURE_ID_GLOBAL_ERR:
971 v = readq(base + FME_ERROR_CAP);
972 ibase = FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
973 inr = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
983 dev_dbg(binfo->dev, "feature: 0x%x, irq_base: %u, nr_irqs: %u\n",
986 if (ibase + inr > binfo->nr_irqs) {
988 "Invalid interrupt number in feature 0x%x\n", fid);
992 for (i = 0; i < inr; i++) {
993 virq = binfo->irq_table[ibase + i];
994 if (virq < 0 || virq > NR_IRQS) {
996 "Invalid irq table entry for feature 0x%x\n",
1009 * when create sub feature instances, for private features, it doesn't need
1010 * to provide resource size and feature id as they could be read from DFH
1011 * register. For afu sub feature, its register region only contains user
1012 * defined registers, so never trust any information from it, just use the
1013 * resource size information provided by its parent FIU.
1016 create_feature_instance(struct build_feature_devs_info *binfo,
1017 resource_size_t ofst, resource_size_t size, u16 fid)
1019 unsigned int irq_base, nr_irqs;
1020 struct dfl_feature_info *finfo;
1023 /* read feature size and id if inputs are invalid */
1024 size = size ? size : feature_size(binfo->ioaddr + ofst);
1025 fid = fid ? fid : feature_id(binfo->ioaddr + ofst);
1027 if (binfo->len - ofst < size)
1030 ret = parse_feature_irqs(binfo, ofst, fid, &irq_base, &nr_irqs);
1034 finfo = kzalloc(sizeof(*finfo), GFP_KERNEL);
1039 finfo->mmio_res.start = binfo->start + ofst;
1040 finfo->mmio_res.end = finfo->mmio_res.start + size - 1;
1041 finfo->mmio_res.flags = IORESOURCE_MEM;
1042 finfo->irq_base = irq_base;
1043 finfo->nr_irqs = nr_irqs;
1045 list_add_tail(&finfo->node, &binfo->sub_features);
1046 binfo->feature_num++;
1051 static int parse_feature_port_afu(struct build_feature_devs_info *binfo,
1052 resource_size_t ofst)
1054 u64 v = readq(binfo->ioaddr + PORT_HDR_CAP);
1055 u32 size = FIELD_GET(PORT_CAP_MMIO_SIZE, v) << 10;
1059 return create_feature_instance(binfo, ofst, size, FEATURE_ID_AFU);
1062 #define is_feature_dev_detected(binfo) (!!(binfo)->feature_dev)
1064 static int parse_feature_afu(struct build_feature_devs_info *binfo,
1065 resource_size_t ofst)
1067 if (!is_feature_dev_detected(binfo)) {
1068 dev_err(binfo->dev, "this AFU does not belong to any FIU.\n");
1072 switch (feature_dev_id_type(binfo->feature_dev)) {
1074 return parse_feature_port_afu(binfo, ofst);
1076 dev_info(binfo->dev, "AFU belonging to FIU %s is not supported yet.\n",
1077 binfo->feature_dev->name);
1083 static int build_info_prepare(struct build_feature_devs_info *binfo,
1084 resource_size_t start, resource_size_t len)
1086 struct device *dev = binfo->dev;
1087 void __iomem *ioaddr;
1089 if (!devm_request_mem_region(dev, start, len, dev_name(dev))) {
1090 dev_err(dev, "request region fail, start:%pa, len:%pa\n",
1095 ioaddr = devm_ioremap(dev, start, len);
1097 dev_err(dev, "ioremap region fail, start:%pa, len:%pa\n",
1102 binfo->start = start;
1104 binfo->ioaddr = ioaddr;
1109 static void build_info_complete(struct build_feature_devs_info *binfo)
1111 devm_iounmap(binfo->dev, binfo->ioaddr);
1112 devm_release_mem_region(binfo->dev, binfo->start, binfo->len);
1115 static int parse_feature_fiu(struct build_feature_devs_info *binfo,
1116 resource_size_t ofst)
1123 if (is_feature_dev_detected(binfo)) {
1124 build_info_complete(binfo);
1126 ret = build_info_commit_dev(binfo);
1130 ret = build_info_prepare(binfo, binfo->start + ofst,
1136 v = readq(binfo->ioaddr + DFH);
1137 id = FIELD_GET(DFH_ID, v);
1139 /* create platform device for dfl feature dev */
1140 ret = build_info_create_dev(binfo, dfh_id_to_type(id));
1144 ret = create_feature_instance(binfo, 0, 0, 0);
1148 * find and parse FIU's child AFU via its NEXT_AFU register.
1149 * please note that only Port has valid NEXT_AFU pointer per spec.
1151 v = readq(binfo->ioaddr + NEXT_AFU);
1153 offset = FIELD_GET(NEXT_AFU_NEXT_DFH_OFST, v);
1155 return parse_feature_afu(binfo, offset);
1157 dev_dbg(binfo->dev, "No AFUs detected on FIU %d\n", id);
1162 static int parse_feature_private(struct build_feature_devs_info *binfo,
1163 resource_size_t ofst)
1165 if (!is_feature_dev_detected(binfo)) {
1166 dev_err(binfo->dev, "the private feature 0x%x does not belong to any AFU.\n",
1167 feature_id(binfo->ioaddr + ofst));
1171 return create_feature_instance(binfo, ofst, 0, 0);
1175 * parse_feature - parse a feature on given device feature list
1177 * @binfo: build feature devices information.
1178 * @ofst: offset to current FIU header
1180 static int parse_feature(struct build_feature_devs_info *binfo,
1181 resource_size_t ofst)
1186 v = readq(binfo->ioaddr + ofst + DFH);
1187 type = FIELD_GET(DFH_TYPE, v);
1191 return parse_feature_afu(binfo, ofst);
1192 case DFH_TYPE_PRIVATE:
1193 return parse_feature_private(binfo, ofst);
1195 return parse_feature_fiu(binfo, ofst);
1197 dev_info(binfo->dev,
1198 "Feature Type %x is not supported.\n", type);
1204 static int parse_feature_list(struct build_feature_devs_info *binfo,
1205 resource_size_t start, resource_size_t len)
1207 resource_size_t end = start + len;
1212 ret = build_info_prepare(binfo, start, len);
1216 /* walk through the device feature list via DFH's next DFH pointer. */
1217 for (; start < end; start += ofst) {
1218 if (end - start < DFH_SIZE) {
1219 dev_err(binfo->dev, "The region is too small to contain a feature.\n");
1223 ret = parse_feature(binfo, start - binfo->start);
1227 v = readq(binfo->ioaddr + start - binfo->start + DFH);
1228 ofst = FIELD_GET(DFH_NEXT_HDR_OFST, v);
1230 /* stop parsing if EOL(End of List) is set or offset is 0 */
1231 if ((v & DFH_EOL) || !ofst)
1235 /* commit current feature device when reach the end of list */
1236 build_info_complete(binfo);
1238 if (is_feature_dev_detected(binfo))
1239 ret = build_info_commit_dev(binfo);
1244 struct dfl_fpga_enum_info *dfl_fpga_enum_info_alloc(struct device *dev)
1246 struct dfl_fpga_enum_info *info;
1250 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
1257 INIT_LIST_HEAD(&info->dfls);
1261 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_alloc);
1263 void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info)
1265 struct dfl_fpga_enum_dfl *tmp, *dfl;
1273 /* remove all device feature lists in the list. */
1274 list_for_each_entry_safe(dfl, tmp, &info->dfls, node) {
1275 list_del(&dfl->node);
1276 devm_kfree(dev, dfl);
1279 /* remove irq table */
1280 if (info->irq_table)
1281 devm_kfree(dev, info->irq_table);
1283 devm_kfree(dev, info);
1286 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_free);
1289 * dfl_fpga_enum_info_add_dfl - add info of a device feature list to enum info
1291 * @info: ptr to dfl_fpga_enum_info
1292 * @start: mmio resource address of the device feature list.
1293 * @len: mmio resource length of the device feature list.
1295 * One FPGA device may have one or more Device Feature Lists (DFLs), use this
1296 * function to add information of each DFL to common data structure for next
1299 * Return: 0 on success, negative error code otherwise.
1301 int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
1302 resource_size_t start, resource_size_t len)
1304 struct dfl_fpga_enum_dfl *dfl;
1306 dfl = devm_kzalloc(info->dev, sizeof(*dfl), GFP_KERNEL);
1313 list_add_tail(&dfl->node, &info->dfls);
1317 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_dfl);
1320 * dfl_fpga_enum_info_add_irq - add irq table to enum info
1322 * @info: ptr to dfl_fpga_enum_info
1323 * @nr_irqs: number of irqs of the DFL fpga device to be enumerated.
1324 * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
1327 * One FPGA device may have several interrupts. This function adds irq
1328 * information of the DFL fpga device to enum info for next step enumeration.
1329 * This function should be called before dfl_fpga_feature_devs_enumerate().
1330 * As we only support one irq domain for all DFLs in the same enum info, adding
1331 * irq table a second time for the same enum info will return error.
1333 * If we need to enumerate DFLs which belong to different irq domains, we
1334 * should fill more enum info and enumerate them one by one.
1336 * Return: 0 on success, negative error code otherwise.
1338 int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
1339 unsigned int nr_irqs, int *irq_table)
1341 if (!nr_irqs || !irq_table)
1344 if (info->irq_table)
1347 info->irq_table = devm_kmemdup(info->dev, irq_table,
1348 sizeof(int) * nr_irqs, GFP_KERNEL);
1349 if (!info->irq_table)
1352 info->nr_irqs = nr_irqs;
1356 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq);
1358 static int remove_feature_dev(struct device *dev, void *data)
1360 struct platform_device *pdev = to_platform_device(dev);
1361 enum dfl_id_type type = feature_dev_id_type(pdev);
1364 platform_device_unregister(pdev);
1366 dfl_id_free(type, id);
1371 static void remove_feature_devs(struct dfl_fpga_cdev *cdev)
1373 device_for_each_child(&cdev->region->dev, NULL, remove_feature_dev);
1377 * dfl_fpga_feature_devs_enumerate - enumerate feature devices
1378 * @info: information for enumeration.
1380 * This function creates a container device (base FPGA region), enumerates
1381 * feature devices based on the enumeration info and creates platform devices
1382 * under the container device.
1384 * Return: dfl_fpga_cdev struct on success, -errno on failure
1386 struct dfl_fpga_cdev *
1387 dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info)
1389 struct build_feature_devs_info *binfo;
1390 struct dfl_fpga_enum_dfl *dfl;
1391 struct dfl_fpga_cdev *cdev;
1395 return ERR_PTR(-ENODEV);
1397 cdev = devm_kzalloc(info->dev, sizeof(*cdev), GFP_KERNEL);
1399 return ERR_PTR(-ENOMEM);
1401 cdev->region = devm_fpga_region_create(info->dev, NULL, NULL);
1402 if (!cdev->region) {
1404 goto free_cdev_exit;
1407 cdev->parent = info->dev;
1408 mutex_init(&cdev->lock);
1409 INIT_LIST_HEAD(&cdev->port_dev_list);
1411 ret = fpga_region_register(cdev->region);
1413 goto free_cdev_exit;
1415 /* create and init build info for enumeration */
1416 binfo = devm_kzalloc(info->dev, sizeof(*binfo), GFP_KERNEL);
1419 goto unregister_region_exit;
1422 binfo->dev = info->dev;
1425 binfo->nr_irqs = info->nr_irqs;
1427 binfo->irq_table = info->irq_table;
1430 * start enumeration for all feature devices based on Device Feature
1433 list_for_each_entry(dfl, &info->dfls, node) {
1434 ret = parse_feature_list(binfo, dfl->start, dfl->len);
1436 remove_feature_devs(cdev);
1437 build_info_free(binfo);
1438 goto unregister_region_exit;
1442 build_info_free(binfo);
1446 unregister_region_exit:
1447 fpga_region_unregister(cdev->region);
1449 devm_kfree(info->dev, cdev);
1450 return ERR_PTR(ret);
1452 EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_enumerate);
1455 * dfl_fpga_feature_devs_remove - remove all feature devices
1456 * @cdev: fpga container device.
1458 * Remove the container device and all feature devices under given container
1461 void dfl_fpga_feature_devs_remove(struct dfl_fpga_cdev *cdev)
1463 struct dfl_feature_platform_data *pdata, *ptmp;
1465 mutex_lock(&cdev->lock);
1467 put_device(cdev->fme_dev);
1469 list_for_each_entry_safe(pdata, ptmp, &cdev->port_dev_list, node) {
1470 struct platform_device *port_dev = pdata->dev;
1472 /* remove released ports */
1473 if (!device_is_registered(&port_dev->dev)) {
1474 dfl_id_free(feature_dev_id_type(port_dev),
1476 platform_device_put(port_dev);
1479 list_del(&pdata->node);
1480 put_device(&port_dev->dev);
1482 mutex_unlock(&cdev->lock);
1484 remove_feature_devs(cdev);
1486 fpga_region_unregister(cdev->region);
1487 devm_kfree(cdev->parent, cdev);
1489 EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_remove);
1492 * __dfl_fpga_cdev_find_port - find a port under given container device
1494 * @cdev: container device
1495 * @data: data passed to match function
1496 * @match: match function used to find specific port from the port device list
1498 * Find a port device under container device. This function needs to be
1499 * invoked with lock held.
1501 * Return: pointer to port's platform device if successful, NULL otherwise.
1503 * NOTE: you will need to drop the device reference with put_device() after use.
1505 struct platform_device *
1506 __dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data,
1507 int (*match)(struct platform_device *, void *))
1509 struct dfl_feature_platform_data *pdata;
1510 struct platform_device *port_dev;
1512 list_for_each_entry(pdata, &cdev->port_dev_list, node) {
1513 port_dev = pdata->dev;
1515 if (match(port_dev, data) && get_device(&port_dev->dev))
1521 EXPORT_SYMBOL_GPL(__dfl_fpga_cdev_find_port);
1523 static int __init dfl_fpga_init(void)
1527 ret = bus_register(&dfl_bus_type);
1533 ret = dfl_chardev_init();
1536 bus_unregister(&dfl_bus_type);
1543 * dfl_fpga_cdev_release_port - release a port platform device
1545 * @cdev: parent container device.
1546 * @port_id: id of the port platform device.
1548 * This function allows user to release a port platform device. This is a
1549 * mandatory step before turn a port from PF into VF for SRIOV support.
1551 * Return: 0 on success, negative error code otherwise.
1553 int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id)
1555 struct dfl_feature_platform_data *pdata;
1556 struct platform_device *port_pdev;
1559 mutex_lock(&cdev->lock);
1560 port_pdev = __dfl_fpga_cdev_find_port(cdev, &port_id,
1561 dfl_fpga_check_port_id);
1565 if (!device_is_registered(&port_pdev->dev)) {
1570 pdata = dev_get_platdata(&port_pdev->dev);
1572 mutex_lock(&pdata->lock);
1573 ret = dfl_feature_dev_use_begin(pdata, true);
1574 mutex_unlock(&pdata->lock);
1578 platform_device_del(port_pdev);
1579 cdev->released_port_num++;
1581 put_device(&port_pdev->dev);
1583 mutex_unlock(&cdev->lock);
1586 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_release_port);
1589 * dfl_fpga_cdev_assign_port - assign a port platform device back
1591 * @cdev: parent container device.
1592 * @port_id: id of the port platform device.
1594 * This function allows user to assign a port platform device back. This is
1595 * a mandatory step after disable SRIOV support.
1597 * Return: 0 on success, negative error code otherwise.
1599 int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id)
1601 struct dfl_feature_platform_data *pdata;
1602 struct platform_device *port_pdev;
1605 mutex_lock(&cdev->lock);
1606 port_pdev = __dfl_fpga_cdev_find_port(cdev, &port_id,
1607 dfl_fpga_check_port_id);
1611 if (device_is_registered(&port_pdev->dev)) {
1616 ret = platform_device_add(port_pdev);
1620 pdata = dev_get_platdata(&port_pdev->dev);
1622 mutex_lock(&pdata->lock);
1623 dfl_feature_dev_use_end(pdata);
1624 mutex_unlock(&pdata->lock);
1626 cdev->released_port_num--;
1628 put_device(&port_pdev->dev);
1630 mutex_unlock(&cdev->lock);
1633 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_assign_port);
1635 static void config_port_access_mode(struct device *fme_dev, int port_id,
1641 base = dfl_get_feature_ioaddr_by_id(fme_dev, FME_FEATURE_ID_HEADER);
1643 v = readq(base + FME_HDR_PORT_OFST(port_id));
1645 v &= ~FME_PORT_OFST_ACC_CTRL;
1646 v |= FIELD_PREP(FME_PORT_OFST_ACC_CTRL,
1647 is_vf ? FME_PORT_OFST_ACC_VF : FME_PORT_OFST_ACC_PF);
1649 writeq(v, base + FME_HDR_PORT_OFST(port_id));
1652 #define config_port_vf_mode(dev, id) config_port_access_mode(dev, id, true)
1653 #define config_port_pf_mode(dev, id) config_port_access_mode(dev, id, false)
1656 * dfl_fpga_cdev_config_ports_pf - configure ports to PF access mode
1658 * @cdev: parent container device.
1660 * This function is needed in sriov configuration routine. It could be used to
1661 * configure the all released ports from VF access mode to PF.
1663 void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev)
1665 struct dfl_feature_platform_data *pdata;
1667 mutex_lock(&cdev->lock);
1668 list_for_each_entry(pdata, &cdev->port_dev_list, node) {
1669 if (device_is_registered(&pdata->dev->dev))
1672 config_port_pf_mode(cdev->fme_dev, pdata->id);
1674 mutex_unlock(&cdev->lock);
1676 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_pf);
1679 * dfl_fpga_cdev_config_ports_vf - configure ports to VF access mode
1681 * @cdev: parent container device.
1682 * @num_vfs: VF device number.
1684 * This function is needed in sriov configuration routine. It could be used to
1685 * configure the released ports from PF access mode to VF.
1687 * Return: 0 on success, negative error code otherwise.
1689 int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs)
1691 struct dfl_feature_platform_data *pdata;
1694 mutex_lock(&cdev->lock);
1696 * can't turn multiple ports into 1 VF device, only 1 port for 1 VF
1697 * device, so if released port number doesn't match VF device number,
1698 * then reject the request with -EINVAL error code.
1700 if (cdev->released_port_num != num_vfs) {
1705 list_for_each_entry(pdata, &cdev->port_dev_list, node) {
1706 if (device_is_registered(&pdata->dev->dev))
1709 config_port_vf_mode(cdev->fme_dev, pdata->id);
1712 mutex_unlock(&cdev->lock);
1715 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_vf);
1717 static irqreturn_t dfl_irq_handler(int irq, void *arg)
1719 struct eventfd_ctx *trigger = arg;
1721 eventfd_signal(trigger, 1);
1725 static int do_set_irq_trigger(struct dfl_feature *feature, unsigned int idx,
1728 struct platform_device *pdev = feature->dev;
1729 struct eventfd_ctx *trigger;
1732 irq = feature->irq_ctx[idx].irq;
1734 if (feature->irq_ctx[idx].trigger) {
1735 free_irq(irq, feature->irq_ctx[idx].trigger);
1736 kfree(feature->irq_ctx[idx].name);
1737 eventfd_ctx_put(feature->irq_ctx[idx].trigger);
1738 feature->irq_ctx[idx].trigger = NULL;
1744 feature->irq_ctx[idx].name =
1745 kasprintf(GFP_KERNEL, "fpga-irq[%u](%s-%x)", idx,
1746 dev_name(&pdev->dev), feature->id);
1747 if (!feature->irq_ctx[idx].name)
1750 trigger = eventfd_ctx_fdget(fd);
1751 if (IS_ERR(trigger)) {
1752 ret = PTR_ERR(trigger);
1756 ret = request_irq(irq, dfl_irq_handler, 0,
1757 feature->irq_ctx[idx].name, trigger);
1759 feature->irq_ctx[idx].trigger = trigger;
1763 eventfd_ctx_put(trigger);
1765 kfree(feature->irq_ctx[idx].name);
1771 * dfl_fpga_set_irq_triggers - set eventfd triggers for dfl feature interrupts
1773 * @feature: dfl sub feature.
1774 * @start: start of irq index in this dfl sub feature.
1775 * @count: number of irqs.
1776 * @fds: eventfds to bind with irqs. unbind related irq if fds[n] is negative.
1777 * unbind "count" specified number of irqs if fds ptr is NULL.
1779 * Bind given eventfds with irqs in this dfl sub feature. Unbind related irq if
1780 * fds[n] is negative. Unbind "count" specified number of irqs if fds ptr is
1783 * Return: 0 on success, negative error code otherwise.
1785 int dfl_fpga_set_irq_triggers(struct dfl_feature *feature, unsigned int start,
1786 unsigned int count, int32_t *fds)
1792 if (unlikely(start + count < start))
1795 /* exceeds nr_irqs */
1796 if (start + count > feature->nr_irqs)
1799 for (i = 0; i < count; i++) {
1800 int fd = fds ? fds[i] : -1;
1802 ret = do_set_irq_trigger(feature, start + i, fd);
1805 do_set_irq_trigger(feature, start + i, -1);
1812 EXPORT_SYMBOL_GPL(dfl_fpga_set_irq_triggers);
1815 * dfl_feature_ioctl_get_num_irqs - dfl feature _GET_IRQ_NUM ioctl interface.
1816 * @pdev: the feature device which has the sub feature
1817 * @feature: the dfl sub feature
1818 * @arg: ioctl argument
1820 * Return: 0 on success, negative error code otherwise.
1822 long dfl_feature_ioctl_get_num_irqs(struct platform_device *pdev,
1823 struct dfl_feature *feature,
1826 return put_user(feature->nr_irqs, (__u32 __user *)arg);
1828 EXPORT_SYMBOL_GPL(dfl_feature_ioctl_get_num_irqs);
1831 * dfl_feature_ioctl_set_irq - dfl feature _SET_IRQ ioctl interface.
1832 * @pdev: the feature device which has the sub feature
1833 * @feature: the dfl sub feature
1834 * @arg: ioctl argument
1836 * Return: 0 on success, negative error code otherwise.
1838 long dfl_feature_ioctl_set_irq(struct platform_device *pdev,
1839 struct dfl_feature *feature,
1842 struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
1843 struct dfl_fpga_irq_set hdr;
1847 if (!feature->nr_irqs)
1850 if (copy_from_user(&hdr, (void __user *)arg, sizeof(hdr)))
1853 if (!hdr.count || (hdr.start + hdr.count > feature->nr_irqs) ||
1854 (hdr.start + hdr.count < hdr.start))
1857 fds = memdup_user((void __user *)(arg + sizeof(hdr)),
1858 hdr.count * sizeof(s32));
1860 return PTR_ERR(fds);
1862 mutex_lock(&pdata->lock);
1863 ret = dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds);
1864 mutex_unlock(&pdata->lock);
1869 EXPORT_SYMBOL_GPL(dfl_feature_ioctl_set_irq);
1871 static void __exit dfl_fpga_exit(void)
1873 dfl_chardev_uinit();
1875 bus_unregister(&dfl_bus_type);
1878 module_init(dfl_fpga_init);
1879 module_exit(dfl_fpga_exit);
1881 MODULE_DESCRIPTION("FPGA Device Feature List (DFL) Support");
1882 MODULE_AUTHOR("Intel Corporation");
1883 MODULE_LICENSE("GPL v2");